Better support for multi-core AMP SoCs

[mbolivar-nordic]

Is your enhancement proposal related to a problem?

Zephyr's support for AMP SoCs... works, but has several well-known usability problems due to workarounds for deficiencies in our hardware support features at the following layers:

• devicetree
• hardware model
• build system

This is an umbrella issue that tracks the combined usage of several related enhancements to Zephyr's hardware support which are described further in individual issues listed below.

Describe the solution you'd like

I would like Zephyr to:

• support system devicetree: see System devicetree support #51830 : POSTPONED. This is still a long-term goal, but we propose an initial implementation with standard devicetrees.

• define a new, future-proof hardware model which works for AMP SoCs: see Hardware model v2 #51831

• allow using sysbuild as a convenient entry point to the above:

  • Sysbuild support for hardware model v2 #51832
  • Sysbuild support for system devicetree #57623 (also POSTPONED)

• Support simulation of AMP targets [RFC] New host simulation target: Native simulator #58305

I would like the implementation to be backwards compatible in the sense that merging it shall not break existing users of our current hardware support features, and shall be opt-in at the SoC (and therefore board) level.

Describe alternatives you've considered

Nordic previously tried to solve these problems in #13672 in 2019. This was rejected upstream for (valid) reasons. We have learned from this initial work and believe the above proposal can address the limitations and issues that led to its rejection.

Change history

• 2022-10-31: initial proposal