SPI DMA with SPI FLASH not working for STM32H7XX

[bhardadinesh-eaton]

Describe the bug
SPI DMA with serial flash not working for STM32H7XX due to cache memory validation which got added in this PR,
#57786

To Reproduce

Steps to reproduce the behavior:

1. We have tested this example with some modification for NUCLEO STM32H743ZI with Click 11 ( External Flash - https://www.mikroe.com/flash-11-click) for this https://github.com/zephyrproject-rtos/zephyr/tree/v3.6.0/samples/drivers/spi_flash
2. I will attached the modified code soon.
3. In Project Config ( Prj.conf ), If we disable this CONFIG_SPI_STM32_DMA=n, SPI Flash is working.
4. In Project Config ( Prj.conf ), If we enable this CONFIG_SPI_STM32_DMA=y, SPI Flash is not working.
5. If we keep CONFIG_SPI_STM32_DMA=y and comment this code at line number 959 to 964, it is working
   
6. By further debugging, It is failing buf_within_nocache memory validation.
   

Expected behavior
It should work with buf_within_nocache along with SPI DMA

Logs and console output
Not working Logs :

Working Logs after commenting below code :

Environment (please complete the following information):

• OS: Windows
• Toolchain : Zephyr SDK, ...
• Commit SHA or Version used : Zephyr v3.6.0

cc : @darshanmirajkar-eaton

[kartben]

triaging as low as this seems to be specific to just one SoC series

[JarmouniA]

@bhardadinesh-eaton Note that v3.6.0 is no longer supported (see https://github.com/zephyrproject-rtos/zephyr/wiki/Release-Management).

[bhardadinesh-eaton]

@JarmouniA Thank you prompt response. We have tried your suggestions which you have mentioned above and debugged the same. Still looks like validation is getting failed,

buf_within_nocache = (buf >= ((uintptr_t)__rodata regionstart)) && ((buf + len bytes - 1) <= ((uintptr_t)__rodata region_end)); printk("__rodata_region_start: %p, __rodata_region_end: %p\n", __rodata_region_start, __rodata_region_end);

Logs :

@SadanandPenore-eaton, @prayassamriya

[erwango]

Commit SHA or Version used : Zephyr v3.6.0

As mentionned V3.6.0 is no longer supported. Would you m mind confirming that your seeing the same issue on v3.7.0 ?

[bhardadinesh-eaton]

@erwango We have manually checked the code for latest version too. The code is same only. So, Issue should be there in latest version too. I might need to setup for latest version for test and debug.

[JarmouniA]

@erwango We have manually checked the code for latest version too. The code is same only. So, Issue should be there in latest version too. I might need to setup for latest version for test and debug.

@bhardadinesh-eaton there were multiple changes to the Cache management part of the driver since, notably in this PR #71048.

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[GeorgeCGV]

I didn't observe any issues on H730 as long as the buffers used in SPI transactions are correctly aligned and located within the no cache region. However, the current approach is not sustainable, as drivers that use SPI DMA on H7 require modification.

[FRASTM]

@bhardadinesh-eaton
could you please check with a more recent version ?