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Description
MCU's in TI can be broadly classified into,
- ARM - Cortex M0+, M4 and R
 - C2000
 
Although MSP430, DSP is part, which isn't considered in this status matrix now (can be extended).
| MSPM0 | Arm Cortex-R (K3) | 
  ||||
|---|---|---|---|---|---|
| PERIPHERAL | 
    MSPM0Cx | MSPM0Lx | MSPM0Gx | AM2x | Hercules | 
| CPU | |||||
| Clock Control | |||||
| GPIO | |||||
| Pincontrol | |||||
| UART | |||||
| I2C | |||||
| SPI | |||||
| DMA | |||||
| Flash | |||||
| Timers | |||||
| CAN | |||||
| Watchdog | |||||
Last update: 27.03.2025
Each will be allocated with following fields,
- Assignee
 - Link to the PR
 - Status
 
Introduction:
This RFC gives an overview of features and enhancements we plan to contribute for Texas Instruments SoC device. It is not intended to be a proper roadmap but it gives some information about our effort on having more support for Zephyr RTOS.
Problem description
Currently Texas Instruments support for various series like R5, M0, M4 and C2000 supports few peripherals, but the development status is scattered. But largely many peripheral blocks are not yet supported.
Proposed change:
The initial idea is to handle M0 and R series as part of the development plan. The main idea of this proposal/plan is the resultant of discussion with Texas Instruments (TI)'s MSPM0 effort here.
Note: I will add/edit more detailed version of the proposal to this issue with roadmap.
Upstream effort will be based on on-going efforts from https://github.com/linumiz/zephyr/tree/dev/ti/mspm0