Handle instruction and data synchronization for __ramfunc initialization

[jimmyzhe]

Summary

The ram function initialization copies code from ROM to RAM in the early stage

zephyr/arch/common/xip.c

Lines 27 to 33 in b677e82

	void arch_data_copy(void)
	{
	arch_early_memcpy(&__data_region_start, &__data_region_load_start,
	__data_region_end - __data_region_start);
	#ifdef CONFIG_ARCH_HAS_RAMFUNC_SUPPORT
	arch_early_memcpy(&__ramfunc_region_start, &__ramfunc_load_start,
	__ramfunc_end - __ramfunc_region_start);

However, some SoC enable I/D Cache in low level initialization (AE350, ET171 .etc) before the ram function initialization.

This may cause the ram function to become unsynchronized when:

1. D-cache is enabled
   The copied ram function remains in D-cache and is not flushed back to memory.
2. I-cache is enabled
   Old I-Cache lines may exist for the same address range as the ram function, preventing the CPU from fetching the updated instructions from memory.

The current ram function initialization or arch_early_memcpy is not sufficient to ensure instruction and data synchronization.

This problem is feedback from #97960.

Describe the solution you'd like

Introduce arch_early_ramfunc_memcpy() to handle instruction, data synchronization (barriers + I/D-cache).
RISC-V port can add fence.i after copy ram function.

Alternatives

Add cache operations sys_cache_data_flush_* and sys_cache_instr_invd_* after ram function initialization. (but cache driver may not ready in the early stage)

Additional Context

No response