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Support for STM32F7XX MCU's that have 512k of SRAM.

@Hobbs1210 Hobbs1210 requested a review from erwango as a code owner March 16, 2019 05:01
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zephyrbot commented Mar 16, 2019

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codecov-io commented Mar 16, 2019

Codecov Report

Merging #14600 into master will decrease coverage by 0.96%.
The diff coverage is n/a.

Impacted file tree graph

@@            Coverage Diff             @@
##           master   #14600      +/-   ##
==========================================
- Coverage   52.93%   51.96%   -0.97%     
==========================================
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==========================================
- Hits        23953    23683     -270     
- Misses      16533    17083     +550     
- Partials     4765     4810      +45
Impacted Files Coverage Δ
subsys/testsuite/ztest/include/ztest_assert.h 38.88% <0%> (-38.89%) ⬇️
subsys/net/ip/net_pkt.c 44.92% <0%> (-26.51%) ⬇️
subsys/net/ip/udp.c 47.66% <0%> (-21.79%) ⬇️
include/spinlock.h 57.14% <0%> (-17.86%) ⬇️
drivers/net/loopback.c 77.27% <0%> (-13.64%) ⬇️
kernel/mutex.c 83.82% <0%> (-13.28%) ⬇️
subsys/net/ip/ipv4.c 51.9% <0%> (-12.96%) ⬇️
subsys/net/ip/net_context.c 49.41% <0%> (-9.47%) ⬇️
kernel/timeout.c 75.92% <0%> (-9.26%) ⬇️
kernel/include/kernel_structs.h 90.9% <0%> (-9.1%) ⬇️
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Commit title prefix should, probably be: "soc: arm: stm32:"
It's not really an ARM architecture patch

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adding this to 1.15, unless it is a bug affecting current boards/SOCs. If so, please indicate and re-scope.

@ioannisg ioannisg added this to the v1.15.0 milestone Mar 16, 2019
@Hobbs1210 Hobbs1210 changed the title arch: arm: mpu: add support for 512k SRAM soc: arm: stm32: add support for 512k SRAM Mar 16, 2019
@aescolar aescolar added the platform: STM32 ST Micro STM32 label Mar 17, 2019
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So, the patch is now OK to me, however, the commit history looks confusing.
Could you please clean this up? I.e. commit this diff in a single commit, and force-push to this pull-request, so the PR is a single commit. Refer to the Zephyr contribution guidelines if needed :)

Then we can approve the PR and add it to the queue for merging to master.

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As requested by @ioannisg, please restructure your change into a single commit and fix commit message issues reported by @zephyrbot

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Fixed per request

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psidhu commented Mar 25, 2019

@erwango might know better than me, but shouldn't you split this up into two REGION_256K's?

For example, even the 128k support uses two REGION_64K's to split the RAM up instead of a single REGION_128K.

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ioannisg commented Mar 25, 2019

@erwango might know better than me, but shouldn't you split this up into two REGION_256K's?

For example, even the 128k support uses two REGION_64K's to split the RAM up instead of a single REGION_128K.

Yes, it looks like this file needs rework.
So, the rule should be the following:
SRAM sizes that are power-of-two shall use a single SRAM MPU region (Region 0).
If not a power-of-two, we shall use as few MPU regions as possible.
@Hobbs1210 could you please, enhance this PR so it fixes all issues?

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@erwango might know better than me, but shouldn't you split this up into two REGION_256K's?
For example, even the 128k support uses two REGION_64K's to split the RAM up instead of a single REGION_128K.

Yes, it looks like this file needs rework.
So, the rule should be the following:
SRAM sizes that are power-of-two shall use a single SRAM MPU region (Region 0).
If not a power-of-two, we shall use as few MPU regions as possible.
@Hobbs1210 could you please, enhance this PR so it fixes all issues?

@ioannisg please review the latest push. please let me know if there are any further changes required.

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erwango commented Mar 26, 2019

@Hobbs1210, you'll need to also fix soc/arm/st_stm32/common/arm_mpu_regions.c which was implemented on the assumption there would always be 2 RAM zones.

Btw, this was implemented this way to have same number of available zones, whether RAM size is a power of 2 or not. This indeed can be optimized and save one MPU region when size is directly a power of 2. Which leaves one region free in this case.
@ioannisg, is there anything we can do with this available MPU region?

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@Hobbs1210, you'll need to also fix soc/arm/st_stm32/common/arm_mpu_regions.c which was implemented on the assumption there would always be 2 RAM zones.

Btw, this was implemented this way to have same number of available zones, whether RAM size is a power of 2 or not. This indeed can be optimized and save one MPU region when size is directly a power of 2. Which leaves one region free in this case.
@ioannisg, is there anything we can do with this available MPU region?

@erwango please review my latest push.

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Please add a one liner comment in commit message to get git check happy

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@ioannisg, is there anything we can do with this available MPU region?

Yes, we can use it for application memory partitions. The more we have the better.

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erwango commented Apr 11, 2019

Yes, we can use it for application memory partitions. The more we have the better.

What bothers me is you'll have one extra partition depending on the memory size, so a 256K config will enjoy one more partition than a 384K..

@Hobbs1210 Hobbs1210 changed the title soc: arm: stm32: add support for 512k SRAM soc: arm: stm32: Updated SRAM Region Definitions Apr 14, 2019
This updates the SRAM region definition for stm32

Signed-off-by: Habib Zaid <[email protected]>
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thanks

@ioannisg ioannisg requested a review from galak April 24, 2019 16:06
@galak galak merged commit 32367c0 into zephyrproject-rtos:master Apr 24, 2019
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