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@ikmdani ikmdani commented Apr 16, 2021

These commits will do the following:

  1. Add 'clocks' property in device tree files of f0, f1, f3, g0, g4, l1, l4 and wb series.
  2. Modify the stm32 flash driver to use device tree APIs to get the clock settings from the dtsi file.

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Can you check please, in the Ref Manual RM0434 of the stm32wb55, I see RCC_AHB3ENR bit 25 for the FLASHEN

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@FRASTM yes you are right, i have put the right offset (bit 25) but not the right register.

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WB instead of WB55g ?

@ikmdani ikmdani force-pushed the flash_clksettings_from_DT branch from e6635ad to 72810de Compare April 19, 2021 12:40
@ikmdani ikmdani requested a review from FRASTM April 19, 2021 12:42
@ikmdani ikmdani force-pushed the flash_clksettings_from_DT branch from 72810de to e1b5ded Compare April 20, 2021 19:37
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FRASTM commented Apr 22, 2021

Error in the build of the emsdp_em4 has probably nothing to do with the change. It looks like a pb in the master branch, since other build operations, for other PRs also fail.
I do not report any error with my own environment on the 5cc20fa branch
west build -p auto -b emsdp_em4 tests/kernel/common

-- west build: making build dir ./zephyrproject/zephyr/build pristine
-- west build: generating a build system
Including boilerplate (Zephyr base): ./zephyrproject/zephyr/cmake/app/boilerplate.cmake
-- Application: ./zephyrproject/zephyr/tests/kernel/common
-- Zephyr version: 2.5.99 (./zephyrproject/zephyr)
-- Found Python3: /usr/bin/python3.6 (found suitable exact version "3.6.9") found components: Interpreter 
-- Found west (found suitable version "0.7.2", minimum required is "0.7.1")
-- Board: emsdp_em4
-- Cache files will be written to: ./.cache/zephyr
-- Using toolchain: zephyr 0.11.3 (./zephyr-sdk-0.11.3)
-- Found dtc: ./zephyr-sdk-0.11.3/sysroots/x86_64-pokysdk-linux/usr/bin/dtc (found suitable version "1.5.0", minimum required is "1.4.6")
-- Found BOARD.dts: ./zephyrproject/zephyr/boards/arc/emsdp/emsdp_em4.dts
-- Generated zephyr.dts: ./zephyrproject/zephyr/build/zephyr/zephyr.dts
-- Generated devicetree_unfixed.h: ./zephyrproject/zephyr/build/zephyr/include/generated/devicetree_unfixed.h
-- Generated device_extern.h: ./zephyrproject/zephyr/build/zephyr/include/generated/device_extern.h
Parsing ./zephyrproject/zephyr/Kconfig
Loaded configuration './zephyrproject/zephyr/boards/arc/emsdp/emsdp_em4_defconfig'
Merged configuration './zephyrproject/zephyr/tests/kernel/common/prj.conf'
Configuration saved to './zephyrproject/zephyr/build/zephyr/.config'
Kconfig header saved to './zephyrproject/zephyr/build/zephyr/include/generated/autoconf.h'
-- The C compiler identification is GNU 9.2.0
-- The CXX compiler identification is GNU 9.2.0
-- The ASM compiler identification is GNU
-- Found assembler: ./zephyr-sdk-0.11.3/arc-zephyr-elf/bin/arc-zephyr-elf-gcc
-- Configuring done
-- Generating done
-- Build files have been written to: ./zephyrproject/zephyr/build
-- west build: building application

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ikmdani commented Apr 22, 2021

@FRASTM , thanks for clarification.

Do we have to report this to anyone? Isn't it blocking our PR from merging?

I had raised another PR for correcting the i2s channel number here: #34394 and that too is stuck in a similar build problem.

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FRASTM commented Apr 22, 2021

Reported by other like the #34427 "It looks like buildkite had errors on tests that don't seems to be related to this PR changes (e.g. tests/kernel/workq/work/kernel.work.api)."

ikmdani added 8 commits April 23, 2021 13:35
This patch adds flash clock settings in device tree for F0, F1 and
F3 sub-families.

Signed-off-by: Krishna Mohan Dani <[email protected]>
This patch adds flash clock settings in device tree for stm32g0
 series so that the stm32 flash driver can get the clock settings
from this dtsi file.

Signed-off-by: Krishna Mohan Dani <[email protected]>
This patch adds flash clock settings in device tree for stm32g4
series so that the stm32 flash driver can get the clock settings
from this dtsi file.

Signed-off-by: Krishna Mohan Dani <[email protected]>
This patch adds flash clock settings in device tree for stm32l1
series so that the stm32 flash driver can get the clock settings
from this dtsi file.

Signed-off-by: Krishna Mohan Dani <[email protected]>
This patch adds flash clock settings in device tree for stm32l4
series so that the stm32 flash driver can get the clock settings
from this dtsi file.

Signed-off-by: Krishna Mohan Dani <[email protected]>
This patch adds flash clock settings in device tree for stm32wb
series so that the stm32 flash driver can get the clock settings
from this dtsi file.

Signed-off-by: Krishna Mohan Dani <[email protected]>
This commit uses DT APIs to get the flash clock settings.

Signed-off-by: Krishna Mohan Dani <[email protected]>
…ies.

This commit adds changes to enable HSI clock for stm32l1 series.

Signed-off-by: Krishna Mohan Dani <[email protected]>
@ikmdani ikmdani force-pushed the flash_clksettings_from_DT branch from e1b5ded to 067c7a5 Compare April 23, 2021 08:26
@carlescufi carlescufi merged commit 5de1b09 into zephyrproject-rtos:master Apr 23, 2021
@ikmdani ikmdani deleted the flash_clksettings_from_DT branch June 8, 2021 19:10
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5 participants