diff --git a/boards/arm/mps3_an547/board.cmake b/boards/arm/mps3_an547/board.cmake index d603ff446094b..a5b85935fa5b3 100644 --- a/boards/arm/mps3_an547/board.cmake +++ b/boards/arm/mps3_an547/board.cmake @@ -21,6 +21,13 @@ set(QEMU_FLAGS_${ARCH} ) board_set_debugger_ifnset(qemu) +if (CONFIG_BUILD_WITH_TFM) + # Override the binary used by qemu, to use the combined + # TF-M (Secure) & Zephyr (Non Secure) image (when running + # in-tree tests). + set(QEMU_KERNEL_OPTION "-device;loader,file=${CMAKE_BINARY_DIR}/tfm_merged.hex") +endif() + # FVP settings set(ARMFVP_BIN_NAME FVP_Corstone_SSE-300_Ethos-U55) diff --git a/boards/arm/mps3_an547/doc/index.rst b/boards/arm/mps3_an547/doc/index.rst index c1f2a82e7aea3..df6568e3debde 100644 --- a/boards/arm/mps3_an547/doc/index.rst +++ b/boards/arm/mps3_an547/doc/index.rst @@ -35,6 +35,22 @@ To run the Fixed Virtual Platform simulation tool you must download "FVP model for the Corstone-300 MPS3" from Arm and install it on your host PC. This board has been tested with version 11.12.57 (Nov 2 2020). +Zephyr board options +==================== + +The MPS3+ AN547 is an SoC with Cortex-M55 architecture. Zephyr provides support +for building for both Secure and Non-Secure firmware. + +The BOARD options are summarized below: + ++----------------------+-----------------------------------------------+ +| BOARD | Description | ++======================+===============================================+ +| mps3_an547 | For building Secure (or Secure-only) firmware | ++----------------------+-----------------------------------------------+ +| mps3_an547_ns | For building Non-Secure firmware | ++----------------------+-----------------------------------------------+ + Hardware ******** diff --git a/boards/arm/mps3_an547/mps3_an547_ns.dts b/boards/arm/mps3_an547/mps3_an547_ns.dts new file mode 100644 index 0000000000000..505f05c2311a1 --- /dev/null +++ b/boards/arm/mps3_an547/mps3_an547_ns.dts @@ -0,0 +1,142 @@ +/* + * Copyright (c) 2018-2021 Linaro Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include +#include + +/ { + compatible = "arm,mps3-an547"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + led0 = &led_0; + led1 = &led_1; + sw0 = &user_button_0; + sw1 = &user_button_1; + }; + + chosen { + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,sram = &ram; + zephyr,flash = &code; + }; + + leds { + compatible = "gpio-leds"; + led_0: led_0 { + gpios = <&gpio_led0 0>; + label = "USERLED0"; + }; + led_1: led_1 { + gpios = <&gpio_led0 1>; + label = "USERLED1"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button_0: button_0 { + label = "USERPB0"; + gpios = <&gpio_button 0>; + }; + user_button_1: button_1 { + label = "USERPB1"; + gpios = <&gpio_button 1>; + }; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m55"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + mpu: mpu@e000ed90 { + compatible = "arm,armv8.1m-mpu"; + reg = <0xe000ed90 0x40>; + arm,num-mpu-regions = <16>; + }; + }; + }; + + /* We utilize the secure addresses, if you subtract 0x10000000 + * you'll get the non-secure alias + */ + itcm: itcm@10000000 { /* alias @ 0x0 */ + reg = <0x10000000 DT_SIZE_K(512)>; + }; + + sram: sram@1000000 { /* alias @ 0x11000000 */ + compatible = "mmio-sram"; + reg = <0x1000000 DT_SIZE_M(2)>; + }; + + dtcm: dtcm@20000000 { /* alias @ 0x30000000 */ + reg = <0x20000000 DT_SIZE_K(512)>; + }; + + isram: sram@31000000 {/* alias @ 0x21000000 */ + compatible = "mmio-sram"; + reg = <0x31000000 DT_SIZE_M(4)>; + }; + + /* DDR4 - 2G, alternates non-secure/secure every 256M */ + ddr4: memory@60000000 { + device_type = "memory"; + reg = <0x60000000 DT_SIZE_M(256) + 0x70000000 DT_SIZE_M(256) + 0x80000000 DT_SIZE_M(256) + 0x90000000 DT_SIZE_M(256) + 0xa0000000 DT_SIZE_M(256) + 0xb0000000 DT_SIZE_M(256) + 0xc0000000 DT_SIZE_M(256) + 0xd0000000 DT_SIZE_M(256)>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* The memory regions defined below must match what the TF-M + * project has defined for that board - a single image boot is + * assumed. Please see the memory layout in: + * https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/platform/ext/target/mps3/an547/partition/flash_layout.h + */ + + code: memory@01060000 { + reg = <0x01060000 DT_SIZE_K(384)>; + }; + + ram: memory@21000000 { + reg = <0x21000000 DT_SIZE_M(2)>; + }; + }; + + soc { + peripheral@40000000 { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x40000000 0x10000000>; + + #include "mps3_an547-common.dtsi" + }; + }; +}; + +&nvic { + arm,num-irq-priority-bits = <3>; +}; diff --git a/boards/arm/mps3_an547/mps3_an547_ns.yaml b/boards/arm/mps3_an547/mps3_an547_ns.yaml new file mode 100644 index 0000000000000..46b090a9a5dca --- /dev/null +++ b/boards/arm/mps3_an547/mps3_an547_ns.yaml @@ -0,0 +1,19 @@ +# +# Copyright (c) 2019-2021 Linaro Limited +# +# SPDX-License-Identifier: Apache-2.0 +# + +identifier: mps3_an547_ns +name: Arm MPS3-AN547_ns +type: mcu +arch: arm +simulation: qemu +toolchain: + - gnuarmemb + - zephyr + - xtools +testing: + default: true + only_tags: + - tfm diff --git a/boards/arm/mps3_an547/mps3_an547_ns_defconfig b/boards/arm/mps3_an547/mps3_an547_ns_defconfig new file mode 100644 index 0000000000000..61502d0f98084 --- /dev/null +++ b/boards/arm/mps3_an547/mps3_an547_ns_defconfig @@ -0,0 +1,26 @@ +# +# Copyright (c) 2018-2021 Linaro Limited +# +# SPDX-License-Identifier: Apache-2.0 +# + +CONFIG_SOC_SERIES_MPS3=y +CONFIG_SOC_MPS3_AN547=y +CONFIG_BOARD_MPS3_AN547=y +CONFIG_ARM_TRUSTZONE_M=y +CONFIG_CORTEX_M_SYSTICK=y +CONFIG_RUNTIME_NMI=y +CONFIG_TRUSTED_EXECUTION_NONSECURE=y +CONFIG_ARM_MPU=y +CONFIG_QEMU_ICOUNT_SHIFT=7 + +# GPIOs +CONFIG_GPIO=y + +# Serial +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CMSDK_APB=y + +CONFIG_I2C=y diff --git a/doc/guides/tfm/requirements.rst b/doc/guides/tfm/requirements.rst index 6c45b8688a327..fca2de3b2a1eb 100644 --- a/doc/guides/tfm/requirements.rst +++ b/doc/guides/tfm/requirements.rst @@ -10,6 +10,8 @@ The following are some of the boards that can be used with TF-M: - NSPE board name * - :ref:`mps2_an521_board` - ``mps2_an521_ns`` (qemu supported) + * - :ref:`mps2_an547_board` + - ``mps2_an547_ns`` (qemu supported) * - :ref:`bl5340_dvk` - ``bl5340_dvk_cpuapp_ns`` * - :ref:`lpcxpresso55s69` diff --git a/modules/trusted-firmware-m/Kconfig.tfm b/modules/trusted-firmware-m/Kconfig.tfm index 4c2ce0f0daff4..f2562654cbea1 100644 --- a/modules/trusted-firmware-m/Kconfig.tfm +++ b/modules/trusted-firmware-m/Kconfig.tfm @@ -13,6 +13,7 @@ config TFM_BOARD default "nordic_nrf/nrf5340dk_nrf5340_cpuapp" if BOARD_NRF5340DK_NRF5340_CPUAPP_NS default "nxp/lpcxpresso55s69" if BOARD_LPCXPRESSO55S69_CPU0 default "arm/mps2/an521" if BOARD_MPS2_AN521_CPU0_NS + default "arm/mps3/an547" if BOARD_MPS3_AN547 default "stm/nucleo_l552ze_q" if BOARD_NUCLEO_L552ZE_Q default "stm/stm32l562e_dk" if BOARD_STM32L562E_DK default "arm/musca_b1/sse_200" if BOARD_MUSCA_B1