diff --git a/boards/arm/nucleo_f446ze/Kconfig.board b/boards/arm/nucleo_f446ze/Kconfig.board new file mode 100644 index 0000000000000..f926632c73c37 --- /dev/null +++ b/boards/arm/nucleo_f446ze/Kconfig.board @@ -0,0 +1,8 @@ +# STM32F446ZE Nucleo board configuration + +# Copyright (c) 2021 Tom Owen +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_NUCLEO_F446ZE + bool "Nucleo F446ZE Development Board" + depends on SOC_STM32F446XX diff --git a/boards/arm/nucleo_f446ze/Kconfig.defconfig b/boards/arm/nucleo_f446ze/Kconfig.defconfig new file mode 100644 index 0000000000000..a256cd1c42aec --- /dev/null +++ b/boards/arm/nucleo_f446ze/Kconfig.defconfig @@ -0,0 +1,15 @@ +# STM32F446ZE Nucleo board configuration + +# Copyright (c) 2021 Tom Owen +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_NUCLEO_F446ZE + +config BOARD + default "nucleo_f446ze" + +config SPI_STM32_INTERRUPT + default y + depends on SPI + +endif # BOARD_NUCLEO_F446ZE diff --git a/boards/arm/nucleo_f446ze/arduino_r3_connector.dtsi b/boards/arm/nucleo_f446ze/arduino_r3_connector.dtsi new file mode 100644 index 0000000000000..f65a31b66272b --- /dev/null +++ b/boards/arm/nucleo_f446ze/arduino_r3_connector.dtsi @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2021, Tom Owen + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + arduino_header: connector { + compatible = "arduino-header-r3"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpioa 3 0>, /* A0 */ + <1 0 &gpioc 0 0>, /* A1 */ + <2 0 &gpioc 3 0>, /* A2 */ + <3 0 &gpiof 3 0>, /* A3 */ + <4 0 &gpiof 5 0>, /* A4 */ + <5 0 &gpiof 10 0>, /* A5 */ + <6 0 &gpiog 9 0>, /* D0 */ + <7 0 &gpiog 14 0>, /* D1 */ + <8 0 &gpiof 15 0>, /* D2 */ + <9 0 &gpioe 13 0>, /* D3 */ + <10 0 &gpiof 14 0>, /* D4 */ + <11 0 &gpioe 11 0>, /* D5 */ + <12 0 &gpioe 9 0>, /* D6 */ + <13 0 &gpiof 13 0>, /* D7 */ + <14 0 &gpiof 12 0>, /* D8 */ + <15 0 &gpiod 15 0>, /* D9 */ + <16 0 &gpiod 14 0>, /* D10 */ + <17 0 &gpioa 7 0>, /* D11 */ + <18 0 &gpioa 6 0>, /* D12 */ + <19 0 &gpioa 5 0>, /* D13 */ + <20 0 &gpiob 9 0>, /* D14 */ + <21 0 &gpiob 8 0>; /* D15 */ + }; +}; + +arduino_i2c: &i2c1 {}; +arduino_spi: &spi1 {}; +arduino_serial: &usart6 {}; diff --git a/boards/arm/nucleo_f446ze/board.cmake b/boards/arm/nucleo_f446ze/board.cmake new file mode 100644 index 0000000000000..715b84061aa34 --- /dev/null +++ b/boards/arm/nucleo_f446ze/board.cmake @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(jlink "--device=STM32F446ZE" "--speed=4000") + +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze.jpg b/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze.jpg new file mode 100644 index 0000000000000..b25f4b96b116f Binary files /dev/null and b/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze.jpg differ diff --git a/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze_morpho_left_2019_8_29.png b/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze_morpho_left_2019_8_29.png new file mode 100644 index 0000000000000..eaccabfe3f1ed Binary files /dev/null and b/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze_morpho_left_2019_8_29.png differ diff --git a/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze_morpho_right_2019_8_29.png b/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze_morpho_right_2019_8_29.png new file mode 100644 index 0000000000000..c398a1677f28e Binary files /dev/null and b/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze_morpho_right_2019_8_29.png differ diff --git a/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze_zio_left_2019_8_29.png b/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze_zio_left_2019_8_29.png new file mode 100644 index 0000000000000..e3234b101ad1a Binary files /dev/null and b/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze_zio_left_2019_8_29.png differ diff --git a/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze_zio_right_2019_8_29.png b/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze_zio_right_2019_8_29.png new file mode 100644 index 0000000000000..4213a53ef47da Binary files /dev/null and b/boards/arm/nucleo_f446ze/doc/img/nucleo_f446ze_zio_right_2019_8_29.png differ diff --git a/boards/arm/nucleo_f446ze/doc/index.rst b/boards/arm/nucleo_f446ze/doc/index.rst new file mode 100644 index 0000000000000..65e1abe4e4ba0 --- /dev/null +++ b/boards/arm/nucleo_f446ze/doc/index.rst @@ -0,0 +1,258 @@ +.. _nucleo_f446ze_board: + +ST Nucleo F446ZE +################ + + +Overview +******** + +The Nucleo F446ZE board features an ARM Cortex-M4 based STM32F446ZE MCU +with a wide range of connectivity support and configurations. Here are +some highlights of the Nucleo F446ZE board: + +- STM32F446 microcontroller in QFP144 package +- Two types of extension resources: + + - ST zio support for Arduino™ Uno V3 connectivity (A0 to A5, D0 to D15) and additional signals exposing a wide range of peripherals + - ST morpho extension pin headers for full access to all STM32 I/Os + +- On-board ST-LINK/V2-1 debugger/programmer with SWD connector +- USB re-enumeration capability. Three different interfaces supported on USB: + - Virtual Com port + - Mass storage (USB Disk drive) for drag'n'drop programming + - Debug port +- Flexible board power supply: + - USB VBUS or external source(3.3V, 5V, 7 - 12V) + - Power management access point + - USB OTG + +- Three LEDs: USB communication (LD1), user LED (LD2), power LED (LD3) +- Two push-buttons: USER and RESET + +.. image:: img/nucleo_f446ze.jpg + :width: 720px + :align: center + :height: 720px + :alt: Nucleo F446ZE + +More information about the board can be found at the `Nucleo F446ZE website`_. + +Hardware +******** + +Nucleo F446ZE provides the following hardware components: + +- STM32F446ZET6 in LQFP144 package +- ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU +- Adaptive real-time accelerator (ART Accelerator) +- 180 MHz max CPU frequency +- VDD from 1.7 V to 3.6 V +- 512 KB Flash +- 128 KB SRAM +- 10 General purpose timers +- 2 Advanced control timers +- 2 basic timers +- SPI(4) +- I2C(4) +- USART(4) +- UART(2) +- USB OTG Full Speed and High Speed +- CAN(2) +- SAI(2) +- SPDIF_Rx(1) +- HDMI_CEC(1) +- Quad SPI(1) +- Camera Interface +- GPIO(50) with external interrupt capability +- 12-bit ADC(3) with 16 channels +- 12-bit DAC with 2 channels + +More information about STM32F446ZE can be found here: + +- `STM32F446ZE on www.st.com`_ +- `STM32F446 reference manual`_ + +Supported Features +================== + +The Zephyr nucleo_f446ze board configuration supports the following hardware features: + ++-------------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++=============+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-------------+------------+-------------------------------------+ +| UART | on-chip | serial port | ++-------------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-------------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-------------+------------+-------------------------------------+ +| PWM | on-chip | pwm | ++-------------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-------------+------------+-------------------------------------+ +| USB | on-chip | usb | ++-------------+------------+-------------------------------------+ +| Backup SRAM | on-chip | Backup SRAM | ++-------------+------------+-------------------------------------+ +| CAN 1/2 | on-chip | Controller Area Network | ++-------------+------------+-------------------------------------+ +| ADC | on-chip | Analog Input | ++-------------+------------+-------------------------------------+ +| DAC | on-chip | Analog Output | ++-------------+------------+-------------------------------------+ + +Other hardware features are not yet supported on this Zephyr port. + +The default configuration can be found in the defconfig file: +``boards/arm/nucleo_f446ze/nucleo_f446ze_defconfig`` + + +Connections and IOs +=================== + +Nucleo F446ZE Board has 8 GPIO controllers. These controllers are responsible for pin muxing, +input/output, pull-up, etc. + +Available pins: +--------------- +.. image:: img/nucleo_f446ze_zio_left_2019_8_29.png + :width: 720px + :align: center + :height: 540px + :alt: Nucleo F446ZE Zio/Arduino connectors (left) +.. image:: img/nucleo_f446ze_zio_right_2019_8_29.png + :width: 720px + :align: center + :height: 540px + :alt: Nucleo F446ZE Zio/Arduino connectors (right) +.. image:: img/nucleo_f446ze_morpho_left_2019_8_29.png + :width: 720px + :align: center + :height: 540px + :alt: Nucleo F446ZE Morpho connectors (left) +.. image:: img/nucleo_f446ze_morpho_right_2019_8_29.png + :width: 720px + :align: center + :height: 540px + :alt: Nucleo F446ZE Morpho connectors (right) + +For mode details please refer to `STM32 Nucleo-144 board User Manual`_. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +- UART_2_TX : PD5 +- UART_2_RX : PD6 +- UART_3_TX : PD8 +- UART_3_RX : PD9 +- USER_PB : PC13 +- LD0 : PB0 +- LD1 : PB7 +- LD2 : PB14 +- I2C1_SDA : PB9 +- I2C1_SCL : PB8 +- I2C2_SDA : PF0 +- I2C2_SCL : PF1 +- SPI1_CS : PD14 +- SPI1_SCK : PA5 +- SPI1_MISO : PA6 +- SPI1_MOSI : PA7 +- SPI2_NSS : PB12 +- SPI2_SCK : PB13 +- SPI2_MISO : PB14 +- SPI2_MOSI : PB15 +- CAN1_RX : PD0 +- CAN1_TX : PD1 +- USB_DP : PA11 +- USB_DM : PA12 +- ADC1_IN0 : PA0 +- DAC_OUT1 : PA4 + + +System Clock +------------ + +Nucleo F446ZE System Clock could be driven by an internal or external oscillator, +as well as the main PLL clock. By default, the System clock is driven by the PLL clock at 84MHz, +driven by an 8MHz high-speed external clock. + +Serial Port +----------- + +Nucleo F446ZE board has 2 UARTs and 4 USARTs. The Zephyr console output is assigned to USART3. +Default settings are 115200 8N1. + +Backup SRAM +----------- + +In order to test backup SRAM you may want to disconnect VBAT from VDD. You can +do it by removing ``SB156`` jumper on the back side of the board. + +Controller Area Network +----------------------- + +The TX/RX wires are connected with pins 25/27 of CN9 connector. + +Programming and Debugging +************************* + +Applications for the ``nucleo_f446ze`` board configuration can be built and +flashed in the usual way (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Flashing +======== + +Nucleo F446ZE board includes an ST-LINK/V2-1 embedded debug tool interface. +This interface is supported by the openocd version included in the Zephyr SDK. + +Flashing an application to Nucleo F446ZE +---------------------------------------- + +Here is an example for the :ref:`hello_world` application. + +Run a serial host program to connect with your Nucleo board. + +.. code-block:: console + + $ minicom -b 115200 -D /dev/ttyACM0 + +Build and flash the application: + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: nucleo_f446ze + :goals: build flash + +You should see the following message on the console: + +.. code-block:: console + + $ Hello World! arm + +Debugging +========= + +You can debug an application in the usual way. Here is an example for the +:ref:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: nucleo_f446ze + :maybe-skip-config: + :goals: debug + +.. _Nucleo F446ZE website: + http://www.st.com/en/evaluation-tools/nucleo-f446ze.html + +.. _STM32 Nucleo-144 board User Manual: + https://www.st.com/resource/en/user_manual/um1974-stm32-nucleo144-boards-mb1137-stmicroelectronics.pdf + +.. _STM32F446ZE on www.st.com: + http://www.st.com/en/microcontrollers/stm32f446ze.html + +.. _STM32F446 reference manual: + http://www.st.com/resource/en/reference_manual/dm00135183.pdf diff --git a/boards/arm/nucleo_f446ze/nucleo_f446ze.dts b/boards/arm/nucleo_f446ze/nucleo_f446ze.dts new file mode 100644 index 0000000000000..80af8ce2f0718 --- /dev/null +++ b/boards/arm/nucleo_f446ze/nucleo_f446ze.dts @@ -0,0 +1,213 @@ +/* + * Copyright (c) 2021 Tom Owen + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include +#include "arduino_r3_connector.dtsi" + +/ { + model = "STMicroelectronics STM32F446ZE-NUCLEO board"; + compatible = "st,stm32f446ze-nucleo"; + + chosen { + zephyr,console = &usart3; + zephyr,shell-uart = &usart3; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,can-primary = &can1; + }; + + leds { + compatible = "gpio-leds"; + green_led_1: led_1 { + gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>; + label = "User LD1"; + }; + blue_led_2: led_2 { + gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>; + label = "User LD2"; + }; + red_led_3: led_3 { + gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>; + label = "User LD3"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button: button { + label = "User"; + gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; + }; + }; + + aliases { + led0 = &green_led_1; + led1 = &blue_led_2; + led2 = &red_led_3; + sw0 = &user_button; + }; +}; + +&clk_hse { + hse-bypass; + clock-frequency = ; /* STLink 8MHz clock */ + status = "okay"; +}; + +&pll { + div-m = <8>; + mul-n = <336>; + div-p = <2>; + div-q = <7>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; /* highest value to get a precise USB clock */ + ahb-prescaler = <1>; + apb1-prescaler = <4>; + apb2-prescaler = <2>; +}; + +&adc1 { + pinctrl-0 = <&adc1_in0_pa0>; + status = "okay"; +}; + +&dac1 { + status = "okay"; + pinctrl-0 = <&dac_out1_pa4>; +}; + +&usart2 { + pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>; + current-speed = <115200>; + status = "okay"; +}; + +&usart3 { + pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>; + current-speed = <115200>; + status = "okay"; +}; + +&usart6 { + pinctrl-0 = <&usart6_tx_pg14 &usart6_rx_pg9>; + current-speed = <115200>; + status = "okay"; +}; + + +&i2c1 { + pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>; + status = "okay"; + clock-frequency = ; +}; + +&i2c2 { + pinctrl-0 = <&i2c2_scl_pf1 &i2c2_sda_pf0>; + status = "okay"; + clock-frequency = ; +}; + + +&spi1 { + pinctrl-0 = <&spi1_sck_pa5 + &spi1_miso_pa6 &spi1_mosi_pa7>; + cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + status = "okay"; +}; + +&spi2 { + pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13 + &spi2_miso_pb14 &spi2_mosi_pb15>; + status = "okay"; +}; + +/* QSPI not supported until PR #37297 is merged + * &quadspi { + * pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb6 + * &quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pd12 + * &quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13>; + * status = "disabled"; + *}; + */ + +&usbotg_fs { + pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12 + &usb_otg_fs_id_pa10>; + status = "okay"; +}; + + +&timers1 { + status = "okay"; + + pwm1: pwm { + status = "okay"; + pinctrl-0 = <&tim1_ch1_pe9>; + }; +}; + +&rtc { + status = "okay"; +}; + +&backup_sram { + status = "okay"; +}; + +&can1 { + pinctrl-0 = <&can1_rx_pd0 &can1_tx_pd1>; + bus-speed = <125000>; + sjw = <1>; + prop-seg = <0>; + phase-seg1 = <6>; + phase-seg2 = <5>; + status = "okay"; +}; + +&flash0 { + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 0x00010000>; + read-only; + }; + + /* + * The flash starting at 0x00010000 and ending at + * 0x0001ffff (sectors 16-31) is reserved for use + * by the application. + */ + storage_partition: partition@10000 { + label = "storage"; + reg = <0x00010000 0x00010000>; + }; + + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x00020000 0x00020000>; + }; + slot1_partition: partition@40000 { + label = "image-1"; + reg = <0x00040000 0x00020000>; + }; + scratch_partition: partition@60000 { + label = "image-scratch"; + reg = <0x00060000 0x00020000>; + }; + }; +}; diff --git a/boards/arm/nucleo_f446ze/nucleo_f446ze.yaml b/boards/arm/nucleo_f446ze/nucleo_f446ze.yaml new file mode 100644 index 0000000000000..c805ec6114e3a --- /dev/null +++ b/boards/arm/nucleo_f446ze/nucleo_f446ze.yaml @@ -0,0 +1,22 @@ +identifier: nucleo_f446ze +name: ST Nucleo F446ZE +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - arduino_gpio + - arduino_i2c + - arduino_spi + - counter + - gpio + - spi + - i2c + - can + - backup_sram + - usb + - quadspi +ram: 128 +flash: 512 diff --git a/boards/arm/nucleo_f446ze/nucleo_f446ze_defconfig b/boards/arm/nucleo_f446ze/nucleo_f446ze_defconfig new file mode 100644 index 0000000000000..c24066443abd6 --- /dev/null +++ b/boards/arm/nucleo_f446ze/nucleo_f446ze_defconfig @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_SERIES_STM32F4X=y +CONFIG_SOC_STM32F446XX=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +CONFIG_SERIAL=y + +# console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# enable pinmux +CONFIG_PINMUX=y + +# enable GPIO +CONFIG_GPIO=y + +# Enable Clocks +CONFIG_CLOCK_CONTROL=y diff --git a/boards/arm/nucleo_f446ze/support/openocd.cfg b/boards/arm/nucleo_f446ze/support/openocd.cfg new file mode 100644 index 0000000000000..9073ee6db0990 --- /dev/null +++ b/boards/arm/nucleo_f446ze/support/openocd.cfg @@ -0,0 +1,12 @@ +source [find board/st_nucleo_f4.cfg] + +$_TARGETNAME configure -event gdb-attach { + echo "Debugger attaching: halting execution" + reset halt + gdb_breakpoint_override hard +} + +$_TARGETNAME configure -event gdb-detach { + echo "Debugger detaching: resuming execution" + resume +}