stm32: clock_control: Driver overhaul#44312

Merged

carlescufi merged 38 commits intozephyrproject-rtos:mainfrom

erwango:dev_full_stm32_clocks_revision

Apr 21, 2022

Commits on Apr 19, 2022

dts/arm: stm32h7: Introduce a stm32h7 specific clock binding
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drivers/clock_control: stm32h7: Change clock bus bindings values
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include/drivers: stm32_clock_control: Avoid non defined PLL outputs
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include/dt-bindings/clock: Add stm32u5 clock bindings
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drivers/clock_control: stm32h7: Fixes on function declarations
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drivers/clock_control: stm32u5: Use new clock bindings
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drivers/clock_control: stm32u5: Update SystemCoreClock at a single place
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drivers/clock_control: stm32u5: Factorize bus prescalers settings
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drivers/clock_control: stm32u5: Don't disable other clocks
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drivers/clock_control: stm32u5: Centralize flash_latency update
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drivers/clock_control: stm32u5: Centralize regu voltage setting
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drivers/clock_control: stm32u5: Move clock init to a single function
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drivers/clock_control: stm32u5: Clean up fixed clocks functions.
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drivers/clock_control: stm32u5: Use fixed clocks set up to configure PLLs
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drivers/clock_control: stm32 common: Don't disable fixed clocks
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drivers/clock_control: stm32 common: Factorize freq bus setting
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drivers/clock_control: stm32 common: Factorize flash latency setting
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drivers/clock_control: stm32 common: Use DT macros for bus prescalers
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drivers/clock_control: stm32 common: Group fixed clocks init
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include/drivers/clock_control: stm32: Some HSE clocks are pure fixed-clocks
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drivers/clock_control: stm32_common: Add elementary PLL configuration step
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include/drivers/clock_control: stm32: Missing PLL macro on some compats
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dts: stm32: Add rcc prop undershoot-prevention
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drivers/clock_control: stm32: style edits on set_up_fixed_clock_sources()
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include/dt-bindings/clock: stm32: Add bindings for 'common' series
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drivers/clock_control: stm32 common: Use new bus clock bindings
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boards: lora_e5_dev_board: Fix dts clock description
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dts/bindings/clocks: st,stm32f105-pll-clock.yaml: previd is required
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drivers/clock_control: stm32 common: Set flash latency code under switch
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tests/drivers/clock_control: stm32f1: HSI clock is 8MHz
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tests/drivers/clock_control: stm32l0/l1: MSI range 11 is not allowed
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dts/bindings/clocks: stm32l0-msi-clock: Use enum for allowed values
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dts/bindings/clock: st-stm32(wb)-rcc: Clarify 'clock-frequency' meaning
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drivers/clock_control: stm32 common: Remove intermediate hclk variable
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tests/drivers/clock_control: stm32u5: Rework to explicitly test HCLK
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drivers/clock_control: stm32u5: Fix on flash latency procedure
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tests/drivers/clock_control: stm32_common: Test HCLCK instead of SYSCLK
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include/dt-bindings: clocks: stm32h7: Use _C1_ registers offset
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