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Setup peripheral and NOC apertures to make hs5x and hs6x configurations (both UP and SMP) runnable on real HW (HAPS).

PS: later we can try to implement it in a more generic way, though I'm not fully sure what is the best way to do that, as such setup is quite SoC-specific. Till then let's keep it in nsim* board platform code.

@evgeniy-paltsev evgeniy-paltsev marked this pull request as ready for review May 12, 2022 22:34
@evgeniy-paltsev evgeniy-paltsev added the area: ARC ARC Architecture label May 12, 2022
@evgeniy-paltsev evgeniy-paltsev added this to the v3.1.0 milestone May 12, 2022
abrodkin
abrodkin previously approved these changes May 13, 2022
ruuddw
ruuddw previously approved these changes May 13, 2022
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Minor style suggestions.
Board-level initialization is fine I think, things like 'sram size' (external memory in this case, I assume) is board specific.

A more general approach would be to have 'drivers' (couldn't the ARC_CONNECT programming be done with the current driver for that?) for the controls and initialize/configure them all from dts entries.

Setup peripheral and NOC apertures to make hs5x and hs6x configurations
runnable on real HW (HAPS).

Signed-off-by: Evgeniy Paltsev <[email protected]>
Signed-off-by: Eugeniy Paltsev <[email protected]>
@evgeniy-paltsev evgeniy-paltsev dismissed stale reviews from ruuddw and abrodkin via b576680 May 13, 2022 11:42
@evgeniy-paltsev evgeniy-paltsev force-pushed the rff-haps-nsim-arcv3-apert-setup-v0 branch from 196fc8d to b576680 Compare May 13, 2022 11:42
@MaureenHelm MaureenHelm merged commit 63e8366 into zephyrproject-rtos:main May 13, 2022
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5 participants