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@FRASTM FRASTM commented Jun 20, 2022

For stm32 MCUs, this PR is configuring the clock source for the ospi peripheral based on the definition of the DTS.

The clock source of the Octospi is set by a bit field in one independent clock configuration register of the RCC.
In the clock control driver, the alternate clock source of the peripheral is defined by the macro OCTOSPI_SEL() or OSPI_SEL() depending on the serie. This is valid for any stm32 device with octospi peripheral.
The DTS of the board gives the clock source to be applied like:

  • stm32l562e_dk
  • b_u585i_iot02a

Signed-off-by: Francois Ramu [email protected]

@FRASTM FRASTM marked this pull request as draft June 22, 2022 08:17
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Otherwise looks good

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FRASTM commented Jun 23, 2022

refine with the new STM32_DT_CLOCKS macro from #46842

@FRASTM FRASTM marked this pull request as ready for review June 23, 2022 14:18
@FRASTM FRASTM requested a review from carlescufi as a code owner June 23, 2022 14:18
@zephyrbot zephyrbot requested a review from nordic-krch June 23, 2022 14:19
erwango
erwango previously approved these changes Jun 24, 2022
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LGTM, but requires #46842 to be merged first

The clock of the octospi peripheral is directly defined
by the DTS and configured by the clock_control_on function.
No specific stm32cube function is required then.
The clock control is taking this clock source to calculate
the clock rate.

Signed-off-by: Francois Ramu <[email protected]>
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FRASTM commented Jun 28, 2022

rebase after merge of #46842

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One request on the setting location, otherwise LGTM.

FRASTM added 2 commits June 28, 2022 14:16
The definition of the clock source for the 2 octospi
instances is given by the DTS node.
The default value selects the sysclk (not pclk)
for the alternate clock control.

Signed-off-by: Francois Ramu <[email protected]>
The definition of the octospi clock source is given
by the DTS node. The default value selects the sysclk
(not pclk) for the alternate clock control.

Signed-off-by: Francois Ramu <[email protected]>
@FRASTM
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FRASTM commented Jun 28, 2022

By default, the alternate clock source for the octospi peripheral is not the PCLK but the SYSCLOCK, so it has to be defined in the DTS (of the soc).

@carlescufi carlescufi merged commit 6cc0297 into zephyrproject-rtos:main Jul 4, 2022
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4 participants