From 6884aa10f9816e51e41d569d4d25fa1a0ff70746 Mon Sep 17 00:00:00 2001 From: Peter Marheine Date: Wed, 24 Aug 2022 10:51:50 +1000 Subject: [PATCH 1/4] arm: rename default RAM region from 'SRAM' to 'RAM' It's useful for RAMABLE_REGION to have a uniform name when CODE_DATA_RELOCATION is supported, because otherwise the build system needs to be aware of how the region name differs between architectures. Since architectures tend to prefer one of 'SRAM' or 'RAM' for that region, prefer to use 'RAM' as the more general term. Signed-off-by: Peter Marheine --- arch/arm/core/aarch32/mpu/arm_core_mpu.c | 8 ++++---- cmake/linker/ld/target_relocation.cmake | 9 +-------- drivers/flash/Kconfig.mcux | 4 ++-- .../arch/arm/aarch32/cortex_a_r/scripts/linker.ld | 9 ++++----- .../arch/arm/aarch32/cortex_m/scripts/linker.ld | 9 ++++----- .../code_relocation_nocopy/CMakeLists.txt | 6 +++--- soc/arm/nxp_imx/rt5xx/CMakeLists.txt | 2 +- .../code_relocation/CMakeLists.txt | 12 +++--------- 8 files changed, 22 insertions(+), 37 deletions(-) diff --git a/arch/arm/core/aarch32/mpu/arm_core_mpu.c b/arch/arm/core/aarch32/mpu/arm_core_mpu.c index f6f40b7b887ce..fd9b991e9f774 100644 --- a/arch/arm/core/aarch32/mpu/arm_core_mpu.c +++ b/arch/arm/core/aarch32/mpu/arm_core_mpu.c @@ -55,8 +55,8 @@ uint32_t z_arm_mpu_stack_guard_and_fpu_adjust(struct k_thread *thread); #endif #if defined(CONFIG_CODE_DATA_RELOCATION_SRAM) -extern char __sram_text_start[]; -extern char __sram_text_size[]; +extern char __ram_text_start[]; +extern char __ram_text_size[]; #endif static const struct z_arm_mpu_partition static_regions[] = { @@ -89,8 +89,8 @@ static const struct z_arm_mpu_partition static_regions[] = { #if defined(CONFIG_CODE_DATA_RELOCATION_SRAM) { /* RAM area for relocated text */ - .start = (uint32_t)&__sram_text_start, - .size = (uint32_t)&__sram_text_size, + .start = (uint32_t)&__ram_text_start, + .size = (uint32_t)&__ram_text_size, .attr = K_MEM_PARTITION_P_RX_U_RX, }, #endif /* CONFIG_CODE_DATA_RELOCATION_SRAM */ diff --git a/cmake/linker/ld/target_relocation.cmake b/cmake/linker/ld/target_relocation.cmake index b79c99c057f0a..2057c7104eb2a 100644 --- a/cmake/linker/ld/target_relocation.cmake +++ b/cmake/linker/ld/target_relocation.cmake @@ -9,14 +9,7 @@ macro(toolchain_ld_relocation) set(MEM_RELOCATION_SRAM_BSS_LD "${PROJECT_BINARY_DIR}/include/generated/linker_sram_bss_relocate.ld") set(MEM_RELOCATION_CODE "${PROJECT_BINARY_DIR}/code_relocation.c") - if(CONFIG_ARM) - set(MEM_REGION_DEFAULT_RAM SRAM) - elseif(CONFIG_RISCV) - set(MEM_REGION_DEFAULT_RAM RAM) - else() - # Name must be configured for newly-supported architectures - message(SEND_ERROR "Default RAM region name is unknown for target architecture") - endif() + set(MEM_REGION_DEFAULT_RAM RAM) add_custom_command( OUTPUT ${MEM_RELOCATION_CODE} ${MEM_RELOCATION_LD} diff --git a/drivers/flash/Kconfig.mcux b/drivers/flash/Kconfig.mcux index 05f2d7127bc45..bf69963f077de 100644 --- a/drivers/flash/Kconfig.mcux +++ b/drivers/flash/Kconfig.mcux @@ -124,7 +124,7 @@ config FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM select CODE_DATA_RELOCATION config FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM - bool "SRAM" + bool "RAM" select CODE_DATA_RELOCATION_SRAM endchoice @@ -132,7 +132,7 @@ endchoice config FLASH_MCUX_FLEXSPI_XIP_MEM string default "ITCM" if FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM - default "SRAM" if FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM + default "RAM" if FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM endif # FLASH_MCUX_FLEXSPI_XIP diff --git a/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld b/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld index 6be966794362c..f56548f3bca54 100644 --- a/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld +++ b/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld @@ -21,11 +21,10 @@ /* physical address of RAM */ #ifdef CONFIG_XIP #define ROMABLE_REGION FLASH - #define RAMABLE_REGION SRAM #else - #define ROMABLE_REGION SRAM - #define RAMABLE_REGION SRAM + #define ROMABLE_REGION RAM #endif +#define RAMABLE_REGION RAM #if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0) #define ROM_ADDR RAM_ADDR @@ -79,7 +78,7 @@ _region_min_align = 4; MEMORY { FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE - SRAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE + RAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE LINKER_DT_REGIONS() /* Used by and documented in include/linker/intlist.ld */ IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K @@ -243,7 +242,7 @@ SECTIONS GROUP_START(RAMABLE_REGION) . = RAM_ADDR; - /* Align the start of image SRAM with the + /* Align the start of image RAM with the * minimum granularity required by MPU. */ . = ALIGN(_region_min_align); diff --git a/include/zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld b/include/zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld index 8f85c5a54c677..e6341d587b612 100644 --- a/include/zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld +++ b/include/zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld @@ -21,11 +21,10 @@ /* physical address of RAM */ #ifdef CONFIG_XIP #define ROMABLE_REGION FLASH -#define RAMABLE_REGION SRAM #else -#define ROMABLE_REGION SRAM -#define RAMABLE_REGION SRAM +#define ROMABLE_REGION RAM #endif +#define RAMABLE_REGION RAM #if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0) #define ROM_ADDR RAM_ADDR @@ -79,7 +78,7 @@ _region_min_align = 4; MEMORY { FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE - SRAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE + RAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE LINKER_DT_REGIONS() /* Used by and documented in include/linker/intlist.ld */ IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K @@ -227,7 +226,7 @@ SECTIONS GROUP_START(RAMABLE_REGION) . = RAM_ADDR; - /* Align the start of image SRAM with the + /* Align the start of image RAM with the * minimum granularity required by MPU. */ . = ALIGN(_region_min_align); diff --git a/samples/application_development/code_relocation_nocopy/CMakeLists.txt b/samples/application_development/code_relocation_nocopy/CMakeLists.txt index 6e9a6f365b227..37aaf60a4ddf2 100644 --- a/samples/application_development/code_relocation_nocopy/CMakeLists.txt +++ b/samples/application_development/code_relocation_nocopy/CMakeLists.txt @@ -12,8 +12,8 @@ target_sources_ifdef(CONFIG_NRFX_QSPI app PRIVATE boards/nrf5340dk_nrf5340_cpuap # Run ext_code from the external flash (XIP). No need to copy. zephyr_code_relocate(src/ext_code.c EXTFLASH_TEXT NOCOPY) -# But still relocate (copy) the data to SRAM -zephyr_code_relocate(src/ext_code.c SRAM_DATA) +# But still relocate (copy) the data to RAM +zephyr_code_relocate(src/ext_code.c RAM_DATA) # sram_code instead runs entirely from SRAM after being copied there. -zephyr_code_relocate(src/sram_code.c SRAM) +zephyr_code_relocate(src/sram_code.c RAM) diff --git a/soc/arm/nxp_imx/rt5xx/CMakeLists.txt b/soc/arm/nxp_imx/rt5xx/CMakeLists.txt index 72927ab39a1db..b61509e99f302 100644 --- a/soc/arm/nxp_imx/rt5xx/CMakeLists.txt +++ b/soc/arm/nxp_imx/rt5xx/CMakeLists.txt @@ -24,4 +24,4 @@ zephyr_linker_sources_ifdef(CONFIG_NXP_IMX_RT5XX_BOOT_HEADER zephyr_linker_sources_ifdef(CONFIG_USB_DEVICE_DRIVER SECTIONS usb.ld) -zephyr_code_relocate(flash_clock_setup.c SRAM) +zephyr_code_relocate(flash_clock_setup.c RAM) diff --git a/tests/application_development/code_relocation/CMakeLists.txt b/tests/application_development/code_relocation/CMakeLists.txt index cc020d20db269..59aef5b1fdf39 100644 --- a/tests/application_development/code_relocation/CMakeLists.txt +++ b/tests/application_development/code_relocation/CMakeLists.txt @@ -8,22 +8,16 @@ project(code_relocation) FILE(GLOB app_sources src/*.c) target_sources(app PRIVATE ${app_sources}) -if (CONFIG_ARM) - set(RAM_SECTION SRAM) -else() - set(RAM_SECTION RAM) -endif() - # Code relocation feature zephyr_code_relocate(src/test_file1.c SRAM2) -zephyr_code_relocate(src/test_file2.c ${RAM_SECTION}) +zephyr_code_relocate(src/test_file2.c RAM) zephyr_code_relocate(src/test_file3.c SRAM2_TEXT) -zephyr_code_relocate(src/test_file3.c ${RAM_SECTION}_DATA) +zephyr_code_relocate(src/test_file3.c RAM_DATA) zephyr_code_relocate(src/test_file3.c SRAM2_BSS) -zephyr_code_relocate(../../../kernel/sem.c ${RAM_SECTION}) +zephyr_code_relocate(../../../kernel/sem.c RAM) if (CONFIG_RELOCATE_TO_ITCM) zephyr_code_relocate(../../../lib/libc/minimal/source/string/string.c ITCM_TEXT) From ab7e95c6bc6f35ba6e11173f6e2b9bad80aa770e Mon Sep 17 00:00:00 2001 From: Peter Marheine Date: Wed, 24 Aug 2022 10:57:07 +1000 Subject: [PATCH 2/4] arm64: rename default RAM region from 'SRAM' to 'RAM' As with 32-bit ARM, it is useful to make the RAMABLE_REGION name uniform across architectures so the build system does not need to be aware of the differences when CODE_DATA_RELOCATION is supported. Generalize the name to just 'RAM' for uniformity. Signed-off-by: Peter Marheine --- include/zephyr/arch/arm64/scripts/linker.ld | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/include/zephyr/arch/arm64/scripts/linker.ld b/include/zephyr/arch/arm64/scripts/linker.ld index abe65d617f0a2..05ae9464fe625 100644 --- a/include/zephyr/arch/arm64/scripts/linker.ld +++ b/include/zephyr/arch/arm64/scripts/linker.ld @@ -20,11 +20,10 @@ /* physical address of RAM */ #ifdef CONFIG_XIP #define ROMABLE_REGION FLASH - #define RAMABLE_REGION SRAM #else - #define ROMABLE_REGION SRAM - #define RAMABLE_REGION SRAM + #define ROMABLE_REGION RAM #endif +#define RAMABLE_REGION RAM #if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0) #define ROM_ADDR RAM_ADDR @@ -60,7 +59,7 @@ MEMORY { FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE - SRAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE + RAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE /* Used by and documented in include/linker/intlist.ld */ IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } @@ -203,7 +202,7 @@ SECTIONS GROUP_START(RAMABLE_REGION) . = RAM_ADDR; - /* Align the start of image SRAM with the + /* Align the start of image RAM with the * minimum granularity required by MMU. */ . = ALIGN(_region_min_align); From b491838a45e01686aab09f3792df041519fefb0b Mon Sep 17 00:00:00 2001 From: Peter Marheine Date: Wed, 24 Aug 2022 11:01:20 +1000 Subject: [PATCH 3/4] nios2: rename default RAM region from 'SRAM' to 'RAM' It's useful for the default RAM region to have a uniform name across architectures so higher-level build processes do not need to have their own awareness of the names. Since NIOS2 uniformly uses 'SRAM', change it to 'RAM' to match most other architectures. Signed-off-by: Peter Marheine --- include/zephyr/arch/nios2/linker.ld | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/include/zephyr/arch/nios2/linker.ld b/include/zephyr/arch/nios2/linker.ld index 4cc3652fff306..1814302c2a641 100644 --- a/include/zephyr/arch/nios2/linker.ld +++ b/include/zephyr/arch/nios2/linker.ld @@ -42,11 +42,10 @@ #ifdef CONFIG_XIP #define ROMABLE_REGION FLASH - #define RAMABLE_REGION SRAM #else - #define ROMABLE_REGION SRAM - #define RAMABLE_REGION SRAM + #define ROMABLE_REGION RAM #endif +#define RAMABLE_REGION RAM #ifdef CONFIG_XIP @@ -56,7 +55,7 @@ MEMORY { RESET (rx) : ORIGIN = _RESET_VECTOR, LENGTH = 0x20 FLASH (rx) : ORIGIN = _RESET_VECTOR + 0x20 , LENGTH = (_ROM_SIZE - 0x20) - SRAM (wx) : ORIGIN = _EXC_VECTOR, LENGTH = _RAM_SIZE - (_EXC_VECTOR - _RAM_ADDR) + RAM (wx) : ORIGIN = _EXC_VECTOR, LENGTH = _RAM_SIZE - (_EXC_VECTOR - _RAM_ADDR) /* Used by and documented in include/linker/intlist.ld */ IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K @@ -67,7 +66,7 @@ MEMORY MEMORY { RESET (wx) : ORIGIN = _RESET_VECTOR, LENGTH = 0x20 - SRAM (wx) : ORIGIN = _EXC_VECTOR, LENGTH = _RAM_SIZE - (_EXC_VECTOR - _RAM_ADDR) + RAM (wx) : ORIGIN = _EXC_VECTOR, LENGTH = _RAM_SIZE - (_EXC_VECTOR - _RAM_ADDR) /* Used by and documented in include/linker/intlist.ld */ IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K From 856e4026d93ce91d81ecc8051bb088027b89bcf4 Mon Sep 17 00:00:00 2001 From: Peter Marheine Date: Thu, 25 Aug 2022 09:19:59 +1000 Subject: [PATCH 4/4] tests: remove incorrect comment from code_relocation for RISCV This was copied from the ARM version of the test's linker script, which in turn seems to have been copied from another linker script at some point. Remove the incorrect comment. Signed-off-by: Peter Marheine --- .../code_relocation/linker_riscv_qemu_sram2.ld | 7 ------- 1 file changed, 7 deletions(-) diff --git a/tests/application_development/code_relocation/linker_riscv_qemu_sram2.ld b/tests/application_development/code_relocation/linker_riscv_qemu_sram2.ld index 57d3c733a2514..cf59a6aad69c5 100644 --- a/tests/application_development/code_relocation/linker_riscv_qemu_sram2.ld +++ b/tests/application_development/code_relocation/linker_riscv_qemu_sram2.ld @@ -4,13 +4,6 @@ * SPDX-License-Identifier: Apache-2.0 */ -/** - * @file - * @brief Linker command/script file - * - * Linker script for the Cortex-M platforms. - */ - #include #include