arch: rename 'SRAM' memory regions to 'RAM' where appropriate

arch/arm/core/aarch32/mpu/arm_core_mpu.c

@@ -55,8 +55,8 @@ uint32_t z_arm_mpu_stack_guard_and_fpu_adjust(struct k_thread *thread);
 #endif
 
 #if defined(CONFIG_CODE_DATA_RELOCATION_SRAM)
-extern char __sram_text_start[];
-extern char __sram_text_size[];
+extern char __ram_text_start[];
+extern char __ram_text_size[];
 #endif
 
 static const struct z_arm_mpu_partition static_regions[] = {
@@ -89,8 +89,8 @@ static const struct z_arm_mpu_partition static_regions[] = {
 #if defined(CONFIG_CODE_DATA_RELOCATION_SRAM)
 		{
 		/* RAM area for relocated text */
-		.start = (uint32_t)&__sram_text_start,
-		.size = (uint32_t)&__sram_text_size,
+		.start = (uint32_t)&__ram_text_start,
+		.size = (uint32_t)&__ram_text_size,
 		.attr = K_MEM_PARTITION_P_RX_U_RX,
 		},
 #endif /* CONFIG_CODE_DATA_RELOCATION_SRAM */

cmake/linker/ld/target_relocation.cmake

@@ -9,14 +9,7 @@ macro(toolchain_ld_relocation)
   set(MEM_RELOCATION_SRAM_BSS_LD
        "${PROJECT_BINARY_DIR}/include/generated/linker_sram_bss_relocate.ld")
   set(MEM_RELOCATION_CODE "${PROJECT_BINARY_DIR}/code_relocation.c")
-  if(CONFIG_ARM)
-    set(MEM_REGION_DEFAULT_RAM SRAM)
-  elseif(CONFIG_RISCV)
-    set(MEM_REGION_DEFAULT_RAM RAM)
-  else()
-    # Name must be configured for newly-supported architectures
-    message(SEND_ERROR "Default RAM region name is unknown for target architecture")
-  endif()
+  set(MEM_REGION_DEFAULT_RAM RAM)
 
   add_custom_command(
     OUTPUT ${MEM_RELOCATION_CODE} ${MEM_RELOCATION_LD}

drivers/flash/Kconfig.mcux

@@ -124,15 +124,15 @@ config FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM
 	select CODE_DATA_RELOCATION
 
 config FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM
-	bool "SRAM"
+	bool "RAM"
 	select CODE_DATA_RELOCATION_SRAM
 
 endchoice
 
 config FLASH_MCUX_FLEXSPI_XIP_MEM
 	string
 	default "ITCM" if FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM
-	default "SRAM" if FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM
+	default "RAM" if FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM
 
 endif # FLASH_MCUX_FLEXSPI_XIP
 

include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld

@@ -21,11 +21,10 @@
 /* physical address of RAM */
 #ifdef CONFIG_XIP
   #define ROMABLE_REGION FLASH
-  #define RAMABLE_REGION SRAM
 #else
-  #define ROMABLE_REGION SRAM
-  #define RAMABLE_REGION SRAM
+  #define ROMABLE_REGION RAM
 #endif
+#define RAMABLE_REGION RAM
 
 #if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0)
   #define ROM_ADDR RAM_ADDR
@@ -79,7 +78,7 @@ _region_min_align = 4;
 MEMORY
 {
     FLASH    (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE
-    SRAM     (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE
+    RAM      (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE
     LINKER_DT_REGIONS()
     /* Used by and documented in include/linker/intlist.ld */
     IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K
@@ -243,7 +242,7 @@ SECTIONS
     GROUP_START(RAMABLE_REGION)
 
     . = RAM_ADDR;
-    /* Align the start of image SRAM with the
+    /* Align the start of image RAM with the
      * minimum granularity required by MPU.
      */
     . = ALIGN(_region_min_align);

include/zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld

@@ -21,11 +21,10 @@
 /* physical address of RAM */
 #ifdef CONFIG_XIP
 #define ROMABLE_REGION FLASH
-#define RAMABLE_REGION SRAM
 #else
-#define ROMABLE_REGION SRAM
-#define RAMABLE_REGION SRAM
+#define ROMABLE_REGION RAM
 #endif
+#define RAMABLE_REGION RAM
 
 #if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0)
 #define ROM_ADDR RAM_ADDR
@@ -79,7 +78,7 @@ _region_min_align = 4;
 MEMORY
     {
     FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE
-    SRAM  (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE
+    RAM   (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE
     LINKER_DT_REGIONS()
     /* Used by and documented in include/linker/intlist.ld */
     IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K
@@ -227,7 +226,7 @@ SECTIONS
     GROUP_START(RAMABLE_REGION)
 
 	. = RAM_ADDR;
-	/* Align the start of image SRAM with the
+	/* Align the start of image RAM with the
 	 * minimum granularity required by MPU.
 	 */
 	. = ALIGN(_region_min_align);

include/zephyr/arch/arm64/scripts/linker.ld

@@ -20,11 +20,10 @@
 /* physical address of RAM */
 #ifdef CONFIG_XIP
   #define ROMABLE_REGION FLASH
-  #define RAMABLE_REGION SRAM
 #else
-  #define ROMABLE_REGION SRAM
-  #define RAMABLE_REGION SRAM
+  #define ROMABLE_REGION RAM
 #endif
+#define RAMABLE_REGION RAM
 
 #if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0)
   #define ROM_ADDR RAM_ADDR
@@ -60,7 +59,7 @@
 MEMORY
 {
     FLASH     (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE
-    SRAM      (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE
+    RAM       (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE
     /* Used by and documented in include/linker/intlist.ld */
     IDT_LIST  (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K
 }
@@ -203,7 +202,7 @@ SECTIONS
     GROUP_START(RAMABLE_REGION)
 
     . = RAM_ADDR;
-    /* Align the start of image SRAM with the
+    /* Align the start of image RAM with the
      * minimum granularity required by MMU.
      */
     . = ALIGN(_region_min_align);

include/zephyr/arch/nios2/linker.ld

@@ -42,11 +42,10 @@
 
 #ifdef CONFIG_XIP
 	#define ROMABLE_REGION FLASH
-	#define RAMABLE_REGION SRAM
 #else
-	#define ROMABLE_REGION SRAM
-	#define RAMABLE_REGION SRAM
+	#define ROMABLE_REGION RAM
 #endif
+#define RAMABLE_REGION RAM
 
 #ifdef CONFIG_XIP
 
@@ -56,7 +55,7 @@ MEMORY
     {
     RESET (rx) : ORIGIN = _RESET_VECTOR, LENGTH = 0x20
     FLASH (rx) : ORIGIN = _RESET_VECTOR + 0x20 , LENGTH = (_ROM_SIZE - 0x20)
-    SRAM  (wx) : ORIGIN = _EXC_VECTOR, LENGTH = _RAM_SIZE - (_EXC_VECTOR - _RAM_ADDR)
+    RAM   (wx) : ORIGIN = _EXC_VECTOR, LENGTH = _RAM_SIZE - (_EXC_VECTOR - _RAM_ADDR)
     /* Used by and documented in include/linker/intlist.ld */
     IDT_LIST  (wx)      : ORIGIN = 0xFFFFF7FF, LENGTH = 2K
 
@@ -67,7 +66,7 @@ MEMORY
 MEMORY
     {
     RESET (wx) : ORIGIN = _RESET_VECTOR, LENGTH = 0x20
-    SRAM  (wx) : ORIGIN = _EXC_VECTOR, LENGTH = _RAM_SIZE - (_EXC_VECTOR - _RAM_ADDR)
+    RAM   (wx) : ORIGIN = _EXC_VECTOR, LENGTH = _RAM_SIZE - (_EXC_VECTOR - _RAM_ADDR)
 
     /* Used by and documented in include/linker/intlist.ld */
     IDT_LIST  (wx)      : ORIGIN = 0xFFFFF7FF, LENGTH = 2K

samples/application_development/code_relocation_nocopy/CMakeLists.txt

@@ -12,8 +12,8 @@ target_sources_ifdef(CONFIG_NRFX_QSPI app PRIVATE boards/nrf5340dk_nrf5340_cpuap
 # Run ext_code from the external flash (XIP). No need to copy.
 zephyr_code_relocate(src/ext_code.c EXTFLASH_TEXT NOCOPY)
 
-# But still relocate (copy) the data to SRAM
-zephyr_code_relocate(src/ext_code.c SRAM_DATA)
+# But still relocate (copy) the data to RAM
+zephyr_code_relocate(src/ext_code.c RAM_DATA)
 
 # sram_code instead runs entirely from SRAM after being copied there.
-zephyr_code_relocate(src/sram_code.c SRAM)
+zephyr_code_relocate(src/sram_code.c RAM)

soc/arm/nxp_imx/rt5xx/CMakeLists.txt

@@ -24,4 +24,4 @@ zephyr_linker_sources_ifdef(CONFIG_NXP_IMX_RT5XX_BOOT_HEADER
 zephyr_linker_sources_ifdef(CONFIG_USB_DEVICE_DRIVER
   SECTIONS usb.ld)
 
-zephyr_code_relocate(flash_clock_setup.c SRAM)
+zephyr_code_relocate(flash_clock_setup.c RAM)

tests/application_development/code_relocation/CMakeLists.txt

@@ -8,22 +8,16 @@ project(code_relocation)
 FILE(GLOB app_sources src/*.c)
 target_sources(app PRIVATE ${app_sources})
 
-if (CONFIG_ARM)
-    set(RAM_SECTION SRAM)
-else()
-    set(RAM_SECTION RAM)
-endif()
-
 # Code relocation feature
 zephyr_code_relocate(src/test_file1.c SRAM2)
 
-zephyr_code_relocate(src/test_file2.c ${RAM_SECTION})
+zephyr_code_relocate(src/test_file2.c RAM)
 
 zephyr_code_relocate(src/test_file3.c SRAM2_TEXT)
-zephyr_code_relocate(src/test_file3.c ${RAM_SECTION}_DATA)
+zephyr_code_relocate(src/test_file3.c RAM_DATA)
 zephyr_code_relocate(src/test_file3.c SRAM2_BSS)
 
-zephyr_code_relocate(../../../kernel/sem.c ${RAM_SECTION})
+zephyr_code_relocate(../../../kernel/sem.c RAM)
 
 if (CONFIG_RELOCATE_TO_ITCM)
 zephyr_code_relocate(../../../lib/libc/minimal/source/string/string.c ITCM_TEXT)

tests/application_development/code_relocation/linker_riscv_qemu_sram2.ld

@@ -4,13 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-/**
- * @file
- * @brief Linker command/script file
- *
- * Linker script for the Cortex-M platforms.
- */
-
 #include <zephyr/linker/sections.h>
 #include <zephyr/devicetree.h>