diff --git a/dts/arm/st/f7/stm32f7.dtsi b/dts/arm/st/f7/stm32f7.dtsi index da40c51133379..caccb26b9a1f8 100644 --- a/dts/arm/st/f7/stm32f7.dtsi +++ b/dts/arm/st/f7/stm32f7.dtsi @@ -43,6 +43,13 @@ }; }; + quadspi_memory: memory@90000000 { + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0x90000000 DT_SIZE_M(256)>; + zephyr,memory-region = "QSPI"; + zephyr,memory-region-mpu = "EXTMEM"; + }; + clocks { clk_hse: clk-hse { #clock-cells = <0>; diff --git a/dts/arm/st/h7/stm32h7.dtsi b/dts/arm/st/h7/stm32h7.dtsi index 5ab6e8b2c8f4f..8d646c82f0bbd 100644 --- a/dts/arm/st/h7/stm32h7.dtsi +++ b/dts/arm/st/h7/stm32h7.dtsi @@ -44,6 +44,13 @@ }; }; + quadspi_memory: memory@90000000 { + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0x90000000 DT_SIZE_M(256)>; + zephyr,memory-region = "QSPI"; + zephyr,memory-region-mpu = "EXTMEM"; + }; + clocks { #address-cells = <1>; #size-cells = <0>; diff --git a/dts/bindings/base/zephyr,memory-region.yaml b/dts/bindings/base/zephyr,memory-region.yaml index a24cd7cd0a904..f9db04e2d31ee 100644 --- a/dts/bindings/base/zephyr,memory-region.yaml +++ b/dts/bindings/base/zephyr,memory-region.yaml @@ -25,6 +25,7 @@ properties: - "FLASH" - "PPB" - "IO" + - "EXTMEM" description: | Signify that this node should result in a dedicated MPU region. The region address and size are taken from the property, while the MPU diff --git a/include/zephyr/arch/arm/aarch32/mpu/arm_mpu_v7m.h b/include/zephyr/arch/arm/aarch32/mpu/arm_mpu_v7m.h index 67d90edb158bb..963a1dd6e0e3a 100644 --- a/include/zephyr/arch/arm/aarch32/mpu/arm_mpu_v7m.h +++ b/include/zephyr/arch/arm/aarch32/mpu/arm_mpu_v7m.h @@ -137,6 +137,8 @@ #define REGION_PPB_ATTR(size) { (STRONGLY_ORDERED_SHAREABLE | size | \ P_RW_U_NA_Msk) } #define REGION_IO_ATTR(size) { (DEVICE_NON_SHAREABLE | size | P_RW_U_NA_Msk) } +#define REGION_EXTMEM_ATTR(size) { (STRONGLY_ORDERED_SHAREABLE | size | \ + NO_ACCESS_Msk) } struct arm_mpu_region_attr { /* Attributes belonging to RASR (including the encoded region size) */