From 1fe0837b7409ea6e01a22de432f731a2f0b1cc7b Mon Sep 17 00:00:00 2001 From: Fabio Baltieri Date: Thu, 17 Aug 2023 10:54:40 +0000 Subject: [PATCH 1/3] Revert "arch: aarch32: place .bss, .noinit sections at the end of the binary" This reverts commit 36997de796261cf17a59072fd3f4b77e4706c93e, as that's breaking few tests in CI, see: https://github.com/zephyrproject-rtos/zephyr/issues/61572 Signed-off-by: Fabio Baltieri --- .../arm/aarch32/cortex_a_r/scripts/linker.ld | 62 +++++++++---------- 1 file changed, 30 insertions(+), 32 deletions(-) diff --git a/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld b/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld index 94d3ee2bd7100..820de2297a0c9 100644 --- a/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld +++ b/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld @@ -26,13 +26,6 @@ #endif #define RAMABLE_REGION RAM -/* section alignment directive, valid only if not running in XIP mode */ -#ifndef CONFIG_XIP - #define SECTION_ALIGN ALIGN(_region_min_align) -#else - #define SECTION_ALIGN -#endif - #if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0) #define ROM_ADDR RAM_ADDR #else @@ -80,6 +73,8 @@ _region_min_align = 4; . = ALIGN(_region_min_align) #endif +#define BSS_ALIGN ALIGN(_region_min_align) + MEMORY { FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE @@ -266,10 +261,35 @@ SECTIONS _app_smem_rom_start = LOADADDR(_APP_SMEM_SECTION_NAME); #endif /* CONFIG_USERSPACE */ - . = ALIGN(_region_min_align); - __kernel_ram_start = .; + SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD), BSS_ALIGN) + { + /* + * For performance, BSS section is assumed to be 4 byte aligned and + * a multiple of 4 bytes + */ + . = ALIGN(4); + __bss_start = .; + __kernel_ram_start = .; - SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,SECTION_ALIGN) + *(.bss) + *(".bss.*") + *(COMMON) + *(".kernel_bss.*") + +#ifdef CONFIG_CODE_DATA_RELOCATION +#include +#endif + + /* + * As memory is cleared in words only, it is simpler to ensure the BSS + * section ends on a 4 byte boundary. This wastes a maximum of 3 bytes. + */ + __bss_end = ALIGN(4); + } GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION) + +#include + + SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,) { __data_region_start = .; __data_start = .; @@ -303,29 +323,7 @@ SECTIONS #include __data_region_end = .; - . = ALIGN(_region_min_align); - - SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD), SECTION_ALIGN) - { - __bss_start = .; - - *(.bss) - *(".bss.*") - *(COMMON) - *(".kernel_bss.*") -#ifdef CONFIG_CODE_DATA_RELOCATION -#include -#endif - - /* - * As memory is cleared in words only, it is simpler to ensure the BSS - * section ends on a 4 byte boundary. This wastes a maximum of 3 bytes. - */ - __bss_end = ALIGN(4); - } GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION) - -#include /* Define linker symbols */ From a288e439b700d457f061cddda647fb56ec3c46ea Mon Sep 17 00:00:00 2001 From: Fabio Baltieri Date: Thu, 17 Aug 2023 10:54:53 +0000 Subject: [PATCH 2/3] Revert "arch: aarch32: fix z_mapped_start location for non-XIP operation" This reverts commit 9e9e60b67fed2d59bd3ba1abea515d60771db62e. Signed-off-by: Fabio Baltieri --- include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld b/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld index 820de2297a0c9..a27dd55a8cf29 100644 --- a/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld +++ b/include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld @@ -133,6 +133,9 @@ SECTIONS { . = ALIGN(_region_min_align); __text_region_start = .; +#ifndef CONFIG_XIP + z_mapped_start = .; +#endif #include @@ -244,7 +247,9 @@ SECTIONS */ . = ALIGN(_region_min_align); _image_ram_start = .; +#ifdef CONFIG_XIP z_mapped_start = .; +#endif /* Located in generated directory. This file is populated by the * zephyr_linker_sources() Cmake function. From 74e0abf95ce7867a75a9c29ce2bad231e12df86f Mon Sep 17 00:00:00 2001 From: Fabio Baltieri Date: Thu, 17 Aug 2023 10:54:55 +0000 Subject: [PATCH 3/3] Revert "doc: release-notes: document aarch32 cortex_a_r linker command file changes" This reverts commit eb731abeb8caeaddabf692990068444866f9c949. Signed-off-by: Fabio Baltieri --- doc/releases/release-notes-3.5.rst | 25 +------------------------ 1 file changed, 1 insertion(+), 24 deletions(-) diff --git a/doc/releases/release-notes-3.5.rst b/doc/releases/release-notes-3.5.rst index 307fb0eb9232c..5652fe8e264bb 100644 --- a/doc/releases/release-notes-3.5.rst +++ b/doc/releases/release-notes-3.5.rst @@ -61,32 +61,9 @@ Kernel Architectures ************* -* ARC - * ARM - * Fixed the Cortex-A/-R linker command file: - - * The sections for zero-initialized (.bss) and uninitialized (.noinit) data - are now the last sections within the binary. This allows the linker to just - account for the required memory, but not having to actually include large - empty spaces within the binary. With the .bss and .noinit sections placed - somewhere in the middle of the resulting binary, as was the case with - previous releases, the linker had to pad the space for zero-/uninitialized - data due to subsequent sections containing initialized data. The inclusion - of large zero-initialized arrays or statically defined heaps reflected - directly in the size of the resulting binary, resulting in unnecessarily - large binaries, even when stripped. - * Fixed the location of the z_mapped_start address marker to point to the - base of RAM instead of to the start of the .text section. Therefore, the - single 4k page .vectors section, which is located right at the base of RAM - before the .text section and which was previously not included in the - mapped memory range, is now considered mapped and unavailable for dynamic - memory mapping via the MMU at run-time. This prevents the 4k page containing - the exception vectors data being mapped as regular memory at run-time, with - any subsequently mapped pages being located beyond the permanently mapped - memory regions (beyond z_mapped_end), resulting in non-contiguous memory - allocation for any first memory request greater than 4k. +* ARM * ARM64