diff --git a/boards/arm/stm32h750b_dk/Kconfig.defconfig b/boards/arm/stm32h750b_dk/Kconfig.defconfig new file mode 100644 index 0000000000000..dd394922f1765 --- /dev/null +++ b/boards/arm/stm32h750b_dk/Kconfig.defconfig @@ -0,0 +1,20 @@ +# STM32H750B DK board configuration + +# Copyright (c) 2023 STMicroelectronics +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_STM32H750B_DK + +config BOARD + default "stm32h750b_dk" + +if DISPLAY + +# MEMC needs to be enabled in order to store +# display buffer to external SDRAM connected to FMC +config MEMC + default y + +endif # DISPLAY + +endif # BOARD_STM32H750B_DK diff --git a/boards/st/stm32h750b_dk/Kconfig.stm32h750b_dk b/boards/st/stm32h750b_dk/Kconfig.stm32h750b_dk index b141d9d1b9d65..3de7ac5cec43a 100644 --- a/boards/st/stm32h750b_dk/Kconfig.stm32h750b_dk +++ b/boards/st/stm32h750b_dk/Kconfig.stm32h750b_dk @@ -3,3 +3,12 @@ config BOARD_STM32H750B_DK select SOC_STM32H750XX + +if DISPLAY + +# MEMC needs to be enabled in order to store +# display buffer to external SDRAM connected to FMC +config MEMC + default y + +endif # DISPLAY diff --git a/boards/st/stm32h750b_dk/board.cmake b/boards/st/stm32h750b_dk/board.cmake index 6500e7b1a4a91..096dc2c826377 100644 --- a/boards/st/stm32h750b_dk/board.cmake +++ b/boards/st/stm32h750b_dk/board.cmake @@ -1,7 +1,9 @@ # SPDX-License-Identifier: Apache-2.0 +board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw") board_runner_args(jlink "--device=STM32H735IG" "--speed=4000") board_runner_args(openocd --target-handle=_CHIPNAME.cpu0) +include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/st/stm32h750b_dk/stm32h750b_dk.dts b/boards/st/stm32h750b_dk/stm32h750b_dk.dts index bb90724deadcb..c8f6c2753a211 100644 --- a/boards/st/stm32h750b_dk/stm32h750b_dk.dts +++ b/boards/st/stm32h750b_dk/stm32h750b_dk.dts @@ -19,6 +19,7 @@ zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,flash-controller = &mt25ql512ab1; + zephyr,display = <dc; }; sdram2: sdram@d0000000 { @@ -68,6 +69,45 @@ status = "okay"; }; +<dc { + pinctrl-0 = <<dc_r0_pi15 <dc_r1_pj0 <dc_r2_pj1 <dc_r3_ph9 + <dc_r4_pj3 <dc_r5_pj4 <dc_r6_pj5 <dc_r7_pj6 + <dc_g0_pj7 <dc_g1_pj8 <dc_g2_pj9 <dc_g3_pj10 + <dc_g4_pj11 <dc_g5_pi0 <dc_g6_pi1 <dc_g7_pk2 + <dc_b0_pj12 <dc_b1_pj13 <dc_b2_pj14 <dc_b3_pj15 + <dc_b4_pk3 <dc_b5_pk4 <dc_b6_pk5 <dc_b7_pk6 + <dc_de_pk7 <dc_clk_pi14 <dc_hsync_pi12 <dc_vsync_pi9>; + pinctrl-names = "default"; + + disp-on-gpios = <&gpiod 7 GPIO_ACTIVE_HIGH>; + + ext-sdram = <&sdram2>; + status = "okay"; + + clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00000008>, + <&rcc STM32_SRC_PLL3_R NO_SEL>; + + width = <480>; + height = <272>; + pixel-format = ; + display-timings { + compatible = "zephyr,panel-timing"; + de-active = <0>; + pixelclk-active = <0>; + hsync-active = <0>; + vsync-active = <0>; + hsync-len = <1>; + vsync-len = <10>; + hback-porch = <43>; + vback-porch = <12>; + hfront-porch = <8>; + vfront-porch = <4>; + }; + def-back-color-red = <0xFF>; + def-back-color-green = <0xFF>; + def-back-color-blue = <0xFF>; +}; + &pll { div-m = <5>; mul-n = <192>; @@ -78,6 +118,16 @@ status = "okay"; }; +&pll3 { + div-m = <5>; + mul-n = <192>; + div-p = <2>; + div-q = <20>; + div-r = <99>; + clocks = <&clk_hse>; + status = "okay"; +}; + &rcc { clocks = <&pll>; clock-frequency = ; @@ -114,13 +164,13 @@ status = "okay"; partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - partition@0 { - reg = <0x0 DT_SIZE_M(64)>; - }; + partition@0 { + reg = <0x0 DT_SIZE_M(64)>; + }; }; };