diff --git a/boards/adi/max32672evkit/Kconfig.max32672evkit b/boards/adi/max32672evkit/Kconfig.max32672evkit new file mode 100644 index 0000000000000..4b7207a0c90e4 --- /dev/null +++ b/boards/adi/max32672evkit/Kconfig.max32672evkit @@ -0,0 +1,7 @@ +# MAX32672EVKIT boards configuration + +# Copyright (c) 2024 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_MAX32672EVKIT + select SOC_MAX32672 diff --git a/boards/adi/max32672evkit/board.cmake b/boards/adi/max32672evkit/board.cmake new file mode 100644 index 0000000000000..454ec897d2a69 --- /dev/null +++ b/boards/adi/max32672evkit/board.cmake @@ -0,0 +1,9 @@ +# Copyright (c) 2024 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(openocd --cmd-pre-init "source [find interface/cmsis-dap.cfg]") +board_runner_args(openocd --cmd-pre-init "source [find target/max32672.cfg]") +board_runner_args(jlink "--device=MAX32672" "--reset-after-load") + +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/adi/max32672evkit/board.yml b/boards/adi/max32672evkit/board.yml new file mode 100644 index 0000000000000..5df99f681bf3c --- /dev/null +++ b/boards/adi/max32672evkit/board.yml @@ -0,0 +1,8 @@ +# Copyright (c) 2024 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +board: + name: max32672evkit + vendor: adi + socs: + - name: max32672 diff --git a/boards/adi/max32672evkit/doc/img/max32672evkit.webp b/boards/adi/max32672evkit/doc/img/max32672evkit.webp new file mode 100644 index 0000000000000..9b9e2245d3832 Binary files /dev/null and b/boards/adi/max32672evkit/doc/img/max32672evkit.webp differ diff --git a/boards/adi/max32672evkit/doc/index.rst b/boards/adi/max32672evkit/doc/index.rst new file mode 100644 index 0000000000000..fd0a4e2fb7fa7 --- /dev/null +++ b/boards/adi/max32672evkit/doc/index.rst @@ -0,0 +1,341 @@ +.. _max32672_evkit: + +MAX32672EVKIT +############# + +Overview +******** +The MAX32672 evaluation kit (EV kit) provides a platform for evaluating the capabilities +of the MAX32672 microcontroller, which is a small, high-reliability, ultra-low power, +32-bit microcontroller. The MAX32672 is a secure and cost-effective solution +for motion/motor control, industrial sensors, and battery-powered medical devices and offers legacy +designs an easy, cost-optimal upgrade path from 8-bit or 16-bit microcontrollers. + +The Zephyr port is running on the MAX32672 MCU. + +.. image:: img/max32672evkit.webp + :align: center + :alt: MAX32672EVKIT + +Hardware +******** + +- MAX32672 MCU: + + - High-Efficiency Microcontroller for Low-Power High-Reliability Devices + + - Arm Cortex-M4 Processor with FPU up to 100MHz + - 1MB Dual-Bank Flash with Error Correction + - 200KB SRAM (160KB with ECC Enabled), Optionally Preserved in Lowest Power Modes + - EEPROM Emulation on Flash + - 16KB Unified Cache with ECC + - Resource Protection Unit (RPU) and MemoryProtection Unit (MPU) + - Dual- or Single-Supply Operation, 1.7V to 3.6V + - Wide Operating Temperature: -40°C to +105°C + + - Flexible Clocking Schemes + + - Internal High-Speed 100MHz Oscillator + - Internal Low-Power 7.3728MHz and Ultra-Low-Power 80kHz Oscillators + - 16MHz–32MHz Oscillator, 32.768kHz Oscillator(External Crystal Required) + - External Clock Input for CPU, LPUART, LPTMR + + - Power Management Maximizes Uptime for Battery Applications + + - 59.8μA/MHz ACTIVE at 0.9V up to 12MHz(CoreMark®) + - 56.6μA/MHz ACTIVE at 1.1V up to 100MHz(While(1)) + - 3.09μA Full Memory Retention Power in BACKUPMode at VDD = 1.8V + - 350nA Ultra-Low-Power RTC at + - Wake from LPUART or LPTMR + + - Optimal Peripheral Mix Provides Platform Scalability + + - Up to 42 General-Purpose I/O Pins + - Up to Three SPI Master/Slave (up to 50Mbps) + - Up to Three 4-Wire UART + - Up to Three I2C Master/Slave 3.4Mbps High Speed + - Up to Four 32-Bit Timers (TMR) + - Up to Two Low-Power 32-Bit Timers (LPTMR) + - One I2S Master/Slave for Digital Audio Interface + - 12-Channel, 12-Bit, 1Msps SAR ADC with On-DieTemperature Sensor + + - Security and Integrity + + - Optional ECDSA-Based Cryptographic SecureBootloader in ROM + - Secure Cryptographic Accelerator for Elliptic Curve + - AES-128/192/256 Hardware Acceleration Engine + +- Benefits and Features of MAX32672EVKIT: + + - Selectable, On-Board, High-Precision Voltage Reference + - 128 x 128 (1.45in) Color TFT Display with SPI Interface + - Breadboard-Compatible Headers + - USB 2.0 Micro B-to-Serial UARTs + - UART0 and LPUART0 Interface Is Selectable through On-Board Jumpers + - All GPIOs Signals Accessed through 0.1in Headers + - 12 Analog Inputs Accessed through 0.1in Headers with Optional Filtering + - 10-Pin Arm® Cortex® SWD Connector + - Board Power Provided by USB Port + - On-Board, 3.3V LDO Regulator + - Test Loops Provided to Supply Optional VCORE Power Externally + - Individual Power Measurement on All IC Rails through Jumpers + - Two General-Purpose LEDs and One General-Purpose Pushbutton Switch + +Supported Features +================== + +Below interfaces are supported by Zephyr on MAX32672EVKIT. + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| SYSTICK | on-chip | systick | ++-----------+------------+-------------------------------------+ +| CLOCK | on-chip | clock and reset control | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial | ++-----------+------------+-------------------------------------+ + + +Connections and IOs +=================== + ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| Name | Name | Settings | Description | ++===========+===============+===============+==================================================================================================+ +| JP1 | VREF | | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Open | | | Disconnects on-board, high-precision voltage reference. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Closed | | | Connects on-board, high-precision voltage reference. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| JP2 | P0_22 | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Open | | | Disconnects red LED D1 from P0_22. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Closed | | | Connects red LED D1 to P0_22. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| JP3 | P0_23 | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Open | | | Disconnects green LED D2 from P0_23. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Closed | | | Connects green LED D2 to P0_23. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| JP4 | I2C0_SCL | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C0_SCL. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C0_SCL. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| JP5 | I2C0_SDA | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C0_SDA. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C0_SDA. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| JP6 | I2C1_SCL | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C1_SCL. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C1_SCL. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| JP7 | I2C1_SDA | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C1_SDA. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C1_SDA. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| JP8 | I2C2_SCL | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C2_SCL. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C2_SCL. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| JP9 | I2C2_SDA | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C2_SDA. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C2_SDA. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| JP10 | UART_RX | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | 2-1 | | | Connects the USB serial bridge to UART0_RX (P0.8). | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | 2-3 | | | Connects the USB serial bridge to LUART0_RX (P0.26). | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| JP11 | UART_TX | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | 2-1 | | | Connects the USB serial bridge to UART0_TX (P0.9). | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | 2-3 | | | Connects the USB serial bridge to LUART0_TX (P0.27). | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| JP12 | VDDA | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Open | | | Disconnects power from VDDA. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Closed | | | Connects power to VDDA. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| JP13 | VDD | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Open | | | Disconnects power from VDD. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Closed | | | Connects power to VDD. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| JP14 | VCORE | +-----------+ | +----------------------------------------------------------------------------------+ | +| | | | Open | | | Disconnects power from VCORE from an external power supply through test loop TP6.| | +| | | +-----------+ | +----------------------------------------------------------------------------------+ | +| | | | Closed | | | Connects power to VCORE from an external power supply through test loop TP6. | | +| | | +-----------+ | +----------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ +| JP15 | LDO DUT | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Open | | | Disconnects power from 3.3V LDO. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | Closed | | | Connects power to 3.3V LDO. | | +| | | +-----------+ | +-------------------------------------------------------------------------------+ | +| | | | | ++-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ + + +Detailed Description of Hardware +================================ + +Power Supply +************ + +The EV kit is powered by +5V, which is made available through VBUS on the Micro USB type-B +connector CN1. The blue VBUS LED (DS1) and the green 3.3V LED will illuminate +when the board is powered. + +Single- or Dual-Supply Operation +******************************** + +The EV kit is configured for single-supply operation. For dual-supply operation, +install a jumper on JP14 and connect an external supply to TP6 (VCORE_EXT) and ground. +Refer to the MAX32672 data sheet for acceptable voltage values. + +Current Monitoring +****************** + +Two pin headers provide convenient current monitoring points for VDDA EN (JP12), VDD EN (JP13), +and VCORE EN (JP14). JP14 is only used for current measurements when VCORE is supplied externally. + +Low-Power Mode Current Measurements +*********************************** + +To accurately achieve the low-power current values, the EV kit must be configured such that +no outside influence (such as a pullup, external clock, or debugger connector) causes +a current source or sink on that GPIO. For these measurements, the board will be needed to be +configured as follows: + +1. Remove jumpers JP2 through JP11. +2. Set SW2 to the DIS position and remove resistor R12. +3. Unplug the SWD connector. + +Clocking +******** + +The MAX32672 clocking is provided by an external 16MHz crystal (Y1). + +External Voltage Reference +************************** + +The external voltage reference input VREF for the ADC can be sourced externally by a high-precision +external reference source (the MAX6071). VREF (JP1) allows the external reference +to be disconnected so that VREF can be sourced internally by VDDA. + + +UART Interface +************** + +The EV kit provides a USB-to-UART bridge chip (the FTDI FT230XS-R). This bridge eliminates +the requirement for a physical RS-232 COM port. Instead, the IC’s UART access is through +the Micro USB type-B connector (CN1). The USB-to-UART bridge can be connected to the IC’s UART0 or +LPUART0 with jumpers JP10 (RX0) and JP11 (TX0). Virtual COM port drivers and guides for +installing Windows® drivers are available on the FTDI Chip website. + + +Boot Loader +*********** + +The boot loader is activated by the boot-load-enable slide switch (SW2). +This pulls P0_10 low and, upon a power cycle or reset, the device will enter boot loader mode. + +GPIO and Alternate Function Headers +*********************************** + +GPIO and alternate function signals from the MAX32672 +can be accessed through 0.1in-spaced headers J3 and J4. + + +Analog Headers +************** + +The 12 analog inputs can be accessed through 0.1inspaced headers JH1, JH2, and JH3. + + +I2C Pullups +*********** + +The I2C ports can independently pulled up to V_AUX (3.3V default) through JP4 (I2C0_CL_PU) and JP5 +(I2C0_DA_PU), JP6 (I2C1_CL_PU) and JP7 (I2C1_DA_PU), and JP8 (I2C2_CL_PU) and JP9 (I2C2_DA_PU). + +Programming and Debugging +************************* + +The IC can be reset by pushbutton SW1. + + +Programming and Debugging +************************* + +Flashing +======== + +SWD debug can be accessed through an Arm Cortex 10-pin connector (J5). +Logic levels are set to 3V3 by default, but they can be set to 1.8V if TP5 (VDD_VDDA_EXT) +is supplied externally. Be sure to remove jumper JP15 (LDO_DUT_EN) to disconnect the 3.3V +LDO if supplying VDD and VDDA externally. + +Once the debug probe is connected to your host computer, then you can simply run the +``west flash`` command to write a firmware image into flash. + +.. note:: + + This board uses OpenOCD as the default debug interface. You can also use + a Segger J-Link with Segger's native tooling by overriding the runner, + appending ``--runner jlink`` to your ``west`` command(s). The J-Link should + be connected to the standard 2*5 pin debug connector (JH2) using an + appropriate adapter board and cable. + +Debugging +========= + +Please refer to the `Flashing`_ section and run the ``west debug`` command +instead of ``west flash``. + +References +********** + +- `MAX32672EVKIT web page`_ + +.. _MAX32672EVKIT web page: + https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/max32672evkit.html diff --git a/boards/adi/max32672evkit/max32672evkit.dts b/boards/adi/max32672evkit/max32672evkit.dts new file mode 100644 index 0000000000000..42a0ca378dc6f --- /dev/null +++ b/boards/adi/max32672evkit/max32672evkit.dts @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2024 Analog Devices, Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include +#include +#include + +/ { + model = "Analog Devices MAX32672EVKIT"; + compatible = "adi,max32672evkit"; + + chosen { + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,sram = &sram3; + zephyr,flash = &flash0; + }; + + leds { + compatible = "gpio-leds"; + led1: led_1 { + gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; + label = "Red LED"; + }; + led2: led_2 { + gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; + label = "Green LED"; + }; + }; + + buttons { + compatible = "gpio-keys"; + pb1: pb1 { + gpios = <&gpio0 18 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "SW3"; + zephyr,code = ; + }; + }; + + /* These aliases are provided for compatibility with samples */ + aliases { + led0 = &led1; + led1 = &led2; + sw0 = &pb1; + }; +}; + +&uart0 { + pinctrl-0 = <&uart0a_tx_p0_9 &uart0a_rx_p0_8>; + pinctrl-names = "default"; + current-speed = <115200>; + data-bits = <8>; + parity = "none"; + status = "okay"; +}; + +&clk_ipo { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; diff --git a/boards/adi/max32672evkit/max32672evkit.yaml b/boards/adi/max32672evkit/max32672evkit.yaml new file mode 100644 index 0000000000000..a7f285ff4cc59 --- /dev/null +++ b/boards/adi/max32672evkit/max32672evkit.yaml @@ -0,0 +1,13 @@ +identifier: max32672evkit +name: max32672evkit +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - gpio + - serial +ram: 200 +flash: 1024 diff --git a/boards/adi/max32672evkit/max32672evkit_defconfig b/boards/adi/max32672evkit/max32672evkit_defconfig new file mode 100644 index 0000000000000..a048ab2608ff0 --- /dev/null +++ b/boards/adi/max32672evkit/max32672evkit_defconfig @@ -0,0 +1,13 @@ +# Copyright (c) 2024 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +# Enable GPIO +CONFIG_GPIO=y + +# Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable UART +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y diff --git a/boards/adi/max32672fthr/Kconfig.max32672fthr b/boards/adi/max32672fthr/Kconfig.max32672fthr new file mode 100644 index 0000000000000..71f33f5214a05 --- /dev/null +++ b/boards/adi/max32672fthr/Kconfig.max32672fthr @@ -0,0 +1,7 @@ +# MAX32672FTHR boards configuration + +# Copyright (c) 2024 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_MAX32672FTHR + select SOC_MAX32672 diff --git a/boards/adi/max32672fthr/board.cmake b/boards/adi/max32672fthr/board.cmake new file mode 100644 index 0000000000000..815111de6b74e --- /dev/null +++ b/boards/adi/max32672fthr/board.cmake @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(openocd --cmd-pre-init "source [find interface/cmsis-dap.cfg]") +board_runner_args(openocd --cmd-pre-init "source [find target/max32672.cfg]") + +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/adi/max32672fthr/board.yml b/boards/adi/max32672fthr/board.yml new file mode 100644 index 0000000000000..c99d16ad4a1f3 --- /dev/null +++ b/boards/adi/max32672fthr/board.yml @@ -0,0 +1,8 @@ +# Copyright (c) 2024 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +board: + name: max32672fthr + vendor: adi + socs: + - name: max32672 diff --git a/boards/adi/max32672fthr/doc/img/max32672fthr_img1.webp b/boards/adi/max32672fthr/doc/img/max32672fthr_img1.webp new file mode 100644 index 0000000000000..9f0e49b247b67 Binary files /dev/null and b/boards/adi/max32672fthr/doc/img/max32672fthr_img1.webp differ diff --git a/boards/adi/max32672fthr/doc/img/max32672fthr_img2.webp b/boards/adi/max32672fthr/doc/img/max32672fthr_img2.webp new file mode 100644 index 0000000000000..38f5e9db7580f Binary files /dev/null and b/boards/adi/max32672fthr/doc/img/max32672fthr_img2.webp differ diff --git a/boards/adi/max32672fthr/doc/index.rst b/boards/adi/max32672fthr/doc/index.rst new file mode 100644 index 0000000000000..6656657881480 --- /dev/null +++ b/boards/adi/max32672fthr/doc/index.rst @@ -0,0 +1,206 @@ +.. _max32672_fthr: + +MAX32672FTHR +############ + +Overview +******** +The MAX32672FTHR is a rapid development platform that helps engineers quickly implement complex +sensor solutions using the MAX32672 Arm® Cortex®-M4. The board also includes the MAX8819 PMIC for +battery and power management. The form factor is a small, 0.9in by 2.6in, dual row header footprint +that is compatible with Adafruit® FeatherWing peripheral expansion boards. The board includes +an OLED display, a RGB indicator LED, and a user pushbutton. The MAX32672FTHR provides +a power-optimized flexible platform for quick proof-ofconcepts and early software development +to enhance time to market. + +The Zephyr port is running on the MAX32672 MCU. + +.. image:: img/max32672fthr_img1.webp + :align: center + :alt: MAX32672FTHR Front + +.. image:: img/max32672fthr_img2.webp + :align: center + :alt: MAX32672FTHR Back + +Hardware +******** + +- MAX32672 MCU: + + - High-Efficiency Microcontroller for Low-Power High-Reliability Devices + + - Arm Cortex-M4 Processor with FPU up to 100MHz + - 1MB Dual-Bank Flash with Error Correction + - 200KB SRAM (160KB with ECC Enabled), Optionally Preserved in Lowest Power Modes + - EEPROM Emulation on Flash + - 16KB Unified Cache with ECC + - Resource Protection Unit (RPU) and MemoryProtection Unit (MPU) + - Dual- or Single-Supply Operation, 1.7V to 3.6V + - Wide Operating Temperature: -40°C to +105°C + + - Flexible Clocking Schemes + + - Internal High-Speed 100MHz Oscillator + - Internal Low-Power 7.3728MHz and Ultra-Low-Power 80kHz Oscillators + - 16MHz–32MHz Oscillator, 32.768kHz Oscillator(External Crystal Required) + - External Clock Input for CPU, LPUART, LPTMR + + - Power Management Maximizes Uptime for Battery Applications + + - 59.8μA/MHz ACTIVE at 0.9V up to 12MHz(CoreMark®) + - 56.6μA/MHz ACTIVE at 1.1V up to 100MHz(While(1)) + - 3.09μA Full Memory Retention Power in BACKUPMode at VDD = 1.8V + - 350nA Ultra-Low-Power RTC at + - Wake from LPUART or LPTMR + + - Optimal Peripheral Mix Provides Platform Scalability + + - Up to 42 General-Purpose I/O Pins + - Up to Three SPI Master/Slave (up to 50Mbps) + - Up to Three 4-Wire UART + - Up to Three I2C Master/Slave 3.4Mbps High Speed + - Up to Four 32-Bit Timers (TMR) + - Up to Two Low-Power 32-Bit Timers (LPTMR) + - One I2S Master/Slave for Digital Audio Interface + - 12-Channel, 12-Bit, 1Msps SAR ADC with On-DieTemperature Sensor + + - Security and Integrity + + - Optional ECDSA-Based Cryptographic SecureBootloader in ROM + - Secure Cryptographic Accelerator for Elliptic Curve + - AES-128/192/256 Hardware Acceleration Engine + +- Benefits and Features of MAX32672FTHR: + + - MAX8819 PMIC with Integrated Charger + - On-Board DAPLink Debug and Programming Interface for Arm Cortex-M4 + - Breadboard-Compatible Headers + - Micro USB Connector + - RGB Indicator LED + - User Pushbutton + - OLED Display + - SWD Debugger + - Virtual UART Console + +Supported Features +================== + +Below interfaces are supported by Zephyr on MAX32672FTHR. + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| SYSTICK | on-chip | systick | ++-----------+------------+-------------------------------------+ +| CLOCK | on-chip | clock and reset control | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial | ++-----------+------------+-------------------------------------+ + + +Connections and IOs +=================== + +J9 Pinout +********** + ++---------+----------+-------------------------------------------------------------------------------------------------+ +| Pin | Name | Description | ++=========+==========+=================================================================================================+ +| 1 | RST | Master Reset Signal | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 2 | 3V3 | 3.3V Output. Typically used to provide 3.3V to peripherals connected to the expansion headers. | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 3 | 1V8 | 1.8V Output. Typically used to provide 1.8V to peripherals connected to the expansion headers. | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 4 | GND | Ground | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 5 | P0_11 | GPIO or Analog Input (AIN3 channel). | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 6 | P0_12 | GPIO or Analog Input (AIN4 channel). | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 7 | P0_13 | GPIO or Analog Input (AIN5 channel). | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 8 | P0_22 | GPIO or ADC_TRIG signal. | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 9 | P0_27 | GPIO or QERR signal. | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 10 | P0_26 | GPIO or QDIR signal. | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 11 | P0_16 | GPIO or SPI1 clock signal. | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 12 | P0_15 | GPIO or SPI1 MOSI signal. | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 13 | P0_14 | GPIO or SPI1 MISO signal. | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 14 | P0_28 | GPIO or UART1 Rx signal. | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 15 | P0_29 | GPIO or UART1 Tx signal. | ++---------+----------+-------------------------------------------------------------------------------------------------+ +| 16 | GND | Ground | ++---------+----------+-------------------------------------------------------------------------------------------------+ + + +J7 Pinout +********** + ++---------+----------+-----------------------------------------------------------------------------------------------------------+ +| Pin | Name | Description | ++=========+==========+===========================================================================================================+ +| 1 | SYS | SYS Switched Connection to the Battery. This is the primary system power supply and automatically | +| | | switches between the battery voltage and the USB supply when available. | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ +| 2 | PWR | In battery-powered mode, turns off the PMIC if shorted to ground. | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ +| 3 | VBUS | USB VBUS Signal. This can be used as a 5V supply when connected to USB. This pin can also be | +| | | used as an input to power the board. | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ +| 4 | P0_5 | GPIO or HFX_CLK_OUT signal. | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ +| 5 | P0_6 | GPIO or QEA signal. | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ +| 6 | P0_7 | GPIO or QEB signal. | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ +| 7 | P0_23 | GPIO or QEI signal. | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ +| 8 | P0_17 | GPIO or SPI1 slave select signal. | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ +| 9 | P0_24 | GPIO or QES signal. | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ +| 10 | P0_25 | GPIO or QMATCH signal. | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ +| 11 | P0_18 | GPIO or I2C2 SCL signal. | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ +| 12 | P0_19 | GPIO or I2C2 SDA signal. | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ + +Programming and Debugging +************************* + +Flashing +======== + +The MAX32625 microcontroller on the board is flashed with DAPLink firmware at the factory. +It allows debugging and flashing the MAX32672 Arm Core over USB. + +Once the debug probe is connected to your host computer, then you can simply run the +``west flash`` command to write a firmware image into flash. + +Debugging +========= + +Please refer to the `Flashing`_ section and run the ``west debug`` command +instead of ``west flash``. + +References +********** + +- `MAX32672FTHR web page`_ + +.. _MAX32672FTHR web page: + https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/max32672fthr.html diff --git a/boards/adi/max32672fthr/max32672fthr.dts b/boards/adi/max32672fthr/max32672fthr.dts new file mode 100644 index 0000000000000..963235b42a914 --- /dev/null +++ b/boards/adi/max32672fthr/max32672fthr.dts @@ -0,0 +1,107 @@ +/* + * Copyright (c) 2024 Analog Devices, Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include +#include +#include + +/ { + model = "Analog Devices MAX32672FTHR"; + compatible = "adi,max32672fthr"; + + chosen { + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,sram = &sram3; + zephyr,flash = &flash0; + }; + + leds { + compatible = "gpio-leds"; + led1: led_1 { + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; + label = "Red LED"; + }; + led2: led_2 { + gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; + label = "Green LED"; + }; + led3: led_3 { + gpios = <&gpio0 4 GPIO_ACTIVE_LOW>; + label = "Blue LED"; + }; + }; + + buttons { + compatible = "gpio-keys"; + pb1: pb1 { + gpios = <&gpio0 10 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "SW2"; + zephyr,code = ; + }; + }; + + /* These aliases are provided for compatibility with samples */ + aliases { + led0 = &led1; + led1 = &led2; + led2 = &led3; + sw0 = &pb1; + }; + + /* Used for accessing other pins */ + feather_header: feather_connector { + compatible = "adafruit-feather-header"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <12 0 &gpio0 19 0>, /* SDA */ + <13 0 &gpio0 18 0>, /* SCL */ + <14 0 &gpio0 25 0>, /* I2S LRCLK */ + <15 0 &gpio0 24 0>, /* I2S SDO */ + <16 0 &gpio0 17 0>, /* SPI1 SS */ + <17 0 &gpio0 23 0>, /* QEI */ + <18 0 &gpio0 7 0>, /* QEB */ + <19 0 &gpio0 6 0>, /* QEA */ + <20 0 &gpio0 5 0>, /* HFX CLK OUT */ + /* 11 not connected */ + <10 0 &gpio0 29 0>, /* TX */ + <9 0 &gpio0 28 0>, /* RX */ + <8 0 &gpio0 14 0>, /* MISO */ + <7 0 &gpio0 15 0>, /* MOSI */ + <6 0 &gpio0 16 0>, /* SCK */ + <5 0 &gpio0 26 0>, /* I2S BCLK */ + <4 0 &gpio0 27 0>, /* I2S SDI */ + <3 0 &gpio0 22 0>, /* ADC_TRG */ + <2 0 &gpio0 13 0>, /* AIN5 */ + <1 0 &gpio0 12 0>, /* AIN4 */ + <0 0 &gpio0 11 0>; /* AIN3 */ + }; +}; + +&uart0 { + pinctrl-0 = <&uart0a_tx_p0_9 &uart0a_rx_p0_8>; + pinctrl-names = "default"; + current-speed = <115200>; + data-bits = <8>; + parity = "none"; + status = "okay"; +}; + +&clk_ipo { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; diff --git a/boards/adi/max32672fthr/max32672fthr.yaml b/boards/adi/max32672fthr/max32672fthr.yaml new file mode 100644 index 0000000000000..e8272a41146b3 --- /dev/null +++ b/boards/adi/max32672fthr/max32672fthr.yaml @@ -0,0 +1,13 @@ +identifier: max32672fthr +name: max32672fthr +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - gpio + - serial +ram: 200 +flash: 1024 diff --git a/boards/adi/max32672fthr/max32672fthr_defconfig b/boards/adi/max32672fthr/max32672fthr_defconfig new file mode 100644 index 0000000000000..a048ab2608ff0 --- /dev/null +++ b/boards/adi/max32672fthr/max32672fthr_defconfig @@ -0,0 +1,13 @@ +# Copyright (c) 2024 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +# Enable GPIO +CONFIG_GPIO=y + +# Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable UART +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y diff --git a/dts/arm/adi/max32/max32672-pinctrl.dtsi b/dts/arm/adi/max32/max32672-pinctrl.dtsi new file mode 100644 index 0000000000000..bbc737cc4d3cd --- /dev/null +++ b/dts/arm/adi/max32/max32672-pinctrl.dtsi @@ -0,0 +1,522 @@ +/* + * Copyright (c) 2024 Analog Devices, Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@40008000 { + + /omit-if-no-ref/ swdio_p0_0: swdio_p0_0 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr0c_ia_p0_0: tmr0c_ia_p0_0 { + pinmux = ; + }; + + /omit-if-no-ref/ swdclk_p0_1: swdclk_p0_1 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr0c_oa_p0_1: tmr0c_oa_p0_1 { + pinmux = ; + }; + + /omit-if-no-ref/ spi0a_miso_p0_2: spi0a_miso_p0_2 { + pinmux = ; + }; + + /omit-if-no-ref/ uart1b_rx_p0_2: uart1b_rx_p0_2 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr1c_ia_p0_2: tmr1c_ia_p0_2 { + pinmux = ; + }; + + /omit-if-no-ref/ spi0a_mosi_p0_3: spi0a_mosi_p0_3 { + pinmux = ; + }; + + /omit-if-no-ref/ uart1b_tx_p0_3: uart1b_tx_p0_3 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr1c_oa_p0_3: tmr1c_oa_p0_3 { + pinmux = ; + }; + + /omit-if-no-ref/ spi0a_sck_p0_4: spi0a_sck_p0_4 { + pinmux = ; + }; + + /omit-if-no-ref/ uart1b_cts_p0_4: uart1b_cts_p0_4 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr2c_ia_p0_4: tmr2c_ia_p0_4 { + pinmux = ; + }; + + /omit-if-no-ref/ spi0a_ss0_p0_5: spi0a_ss0_p0_5 { + pinmux = ; + }; + + /omit-if-no-ref/ uart1b_rts_p0_5: uart1b_rts_p0_5 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr2c_oa_p0_5: tmr2c_oa_p0_5 { + pinmux = ; + }; + + /omit-if-no-ref/ hfx_clk_out_p0_5: hfx_clk_out_p0_5 { + pinmux = ; + }; + + /omit-if-no-ref/ i2c0a_scl_p0_6: i2c0a_scl_p0_6 { + pinmux = ; + }; + + /omit-if-no-ref/ lptmr0b_ia_p0_6: lptmr0b_ia_p0_6 { + pinmux = ; + }; + + /omit-if-no-ref/ spi0c_ss1_p0_6: spi0c_ss1_p0_6 { + pinmux = ; + }; + + /omit-if-no-ref/ qea_p0_6: qea_p0_6 { + pinmux = ; + }; + + /omit-if-no-ref/ i2c0a_sda_p0_7: i2c0a_sda_p0_7 { + pinmux = ; + }; + + /omit-if-no-ref/ lptmr0b_oa_p0_7: lptmr0b_oa_p0_7 { + pinmux = ; + }; + + /omit-if-no-ref/ spi0c_ss2_p0_7: spi0c_ss2_p0_7 { + pinmux = ; + }; + + /omit-if-no-ref/ qeb_p0_7: qeb_p0_7 { + pinmux = ; + }; + + /omit-if-no-ref/ uart0a_rx_p0_8: uart0a_rx_p0_8 { + pinmux = ; + }; + + /omit-if-no-ref/ i2s0a_sdo_p0_8: i2s0a_sdo_p0_8 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr0c_ia_p0_8: tmr0c_ia_p0_8 { + pinmux = ; + }; + + /omit-if-no-ref/ ain0_p0_8: ain0_p0_8 { + pinmux = ; + }; + + /omit-if-no-ref/ uart0a_tx_p0_9: uart0a_tx_p0_9 { + pinmux = ; + }; + + /omit-if-no-ref/ i2s0a_lrclk_p0_9: i2s0a_lrclk_p0_9 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr0c_oa_p0_9: tmr0c_oa_p0_9 { + pinmux = ; + }; + + /omit-if-no-ref/ ain_c0_n_p0_9: ain_c0_n_p0_9 { + pinmux = ; + }; + + /omit-if-no-ref/ uart0a_cts_p0_10: uart0a_cts_p0_10 { + pinmux = ; + }; + + /omit-if-no-ref/ i2s0a_bcllk_p0_10: i2s0a_bcllk_p0_10 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr1c_ia_p0_10: tmr1c_ia_p0_10 { + pinmux = ; + }; + + /omit-if-no-ref/ ain_c0_n_p0_10: ain_c0_n_p0_10 { + pinmux = ; + }; + + /omit-if-no-ref/ uart0a_rts_p0_11: uart0a_rts_p0_11 { + pinmux = ; + }; + + /omit-if-no-ref/ i2s0a_sdi_p0_11: i2s0a_sdi_p0_11 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr1c_oa_p0_11: tmr1c_oa_p0_11 { + pinmux = ; + }; + + /omit-if-no-ref/ ain_c0_n_p0_11: ain_c0_n_p0_11 { + pinmux = ; + }; + + /omit-if-no-ref/ i2c1a_scl_p0_12: i2c1a_scl_p0_12 { + pinmux = ; + }; + + /omit-if-no-ref/ ext_clk2_p0_12: ext_clk2_p0_12 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr2c_ia_p0_12: tmr2c_ia_p0_12 { + pinmux = ; + }; + + /omit-if-no-ref/ ain_c0_p_p0_12: ain_c0_p_p0_12 { + pinmux = ; + }; + + /omit-if-no-ref/ i2c1a_sda_p0_13: i2c1a_sda_p0_13 { + pinmux = ; + }; + + /omit-if-no-ref/ cal32k_p0_13: cal32k_p0_13 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr2c_oa_p0_13: tmr2c_oa_p0_13 { + pinmux = ; + }; + + /omit-if-no-ref/ ain_c0_p_p0_13: ain_c0_p_p0_13 { + pinmux = ; + }; + + /omit-if-no-ref/ spi1a_miso_p0_14: spi1a_miso_p0_14 { + pinmux = ; + }; + + /omit-if-no-ref/ uart2b_rx_p0_14: uart2b_rx_p0_14 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr3c_ia_p0_14: tmr3c_ia_p0_14 { + pinmux = ; + }; + + /omit-if-no-ref/ ain_c0_p_p0_14: ain_c0_p_p0_14 { + pinmux = ; + }; + + /omit-if-no-ref/ spi1a_mosi_p0_15: spi1a_mosi_p0_15 { + pinmux = ; + }; + + /omit-if-no-ref/ uart2b_tx_p0_15: uart2b_tx_p0_15 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr3c_oa_p0_15: tmr3c_oa_p0_15 { + pinmux = ; + }; + + /omit-if-no-ref/ ain_c0_p_p0_15: ain_c0_p_p0_15 { + pinmux = ; + }; + + /omit-if-no-ref/ spi1a_sck_p0_16: spi1a_sck_p0_16 { + pinmux = ; + }; + + /omit-if-no-ref/ uart2b_cts_p0_16: uart2b_cts_p0_16 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr0c_ia_p0_16: tmr0c_ia_p0_16 { + pinmux = ; + }; + + /omit-if-no-ref/ ain8_p0_16: ain8_p0_16 { + pinmux = ; + }; + + /omit-if-no-ref/ spi1a_ss0_p0_17: spi1a_ss0_p0_17 { + pinmux = ; + }; + + /omit-if-no-ref/ uart2b_rts_p0_17: uart2b_rts_p0_17 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr0c_oa_p0_17: tmr0c_oa_p0_17 { + pinmux = ; + }; + + /omit-if-no-ref/ ain9_p0_17: ain9_p0_17 { + pinmux = ; + }; + + /omit-if-no-ref/ i2c2a_scl_p0_18: i2c2a_scl_p0_18 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr1c_ia_p0_18: tmr1c_ia_p0_18 { + pinmux = ; + }; + + /omit-if-no-ref/ ain10_p0_18: ain10_p0_18 { + pinmux = ; + }; + + /omit-if-no-ref/ i2c2a_sda_p0_19: i2c2a_sda_p0_19 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr1c_oa_p0_19: tmr1c_oa_p0_19 { + pinmux = ; + }; + + /omit-if-no-ref/ ain11_p0_19: ain11_p0_19 { + pinmux = ; + }; + + /omit-if-no-ref/ cm4_rx_p0_20: cm4_rx_p0_20 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr2c_ia_p0_20: tmr2c_ia_p0_20 { + pinmux = ; + }; + + /omit-if-no-ref/ cm4_tx_p0_21: cm4_tx_p0_21 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr2c_oa_p0_21: tmr2c_oa_p0_21 { + pinmux = ; + }; + + /omit-if-no-ref/ lptmr1a_ia_p0_22: lptmr1a_ia_p0_22 { + pinmux = ; + }; + + /omit-if-no-ref/ adc_trig_b_p0_22: adc_trig_b_p0_22 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr0c_ia_p0_22: tmr0c_ia_p0_22 { + pinmux = ; + }; + + /omit-if-no-ref/ lptmr1a_oa_p0_23: lptmr1a_oa_p0_23 { + pinmux = ; + }; + + /omit-if-no-ref/ spi0c_ss3_p0_23: spi0c_ss3_p0_23 { + pinmux = ; + }; + + /omit-if-no-ref/ qei_p0_23: qei_p0_23 { + pinmux = ; + }; + + /omit-if-no-ref/ lpuart0a_cts_p0_24: lpuart0a_cts_p0_24 { + pinmux = ; + }; + + /omit-if-no-ref/ uart0b_rx_p0_24: uart0b_rx_p0_24 { + pinmux = ; + }; + + /omit-if-no-ref/ i2s0a_sd0_p0_24: i2s0a_sd0_p0_24 { + pinmux = ; + }; + + /omit-if-no-ref/ qes_p0_24: qes_p0_24 { + pinmux = ; + }; + + /omit-if-no-ref/ lpuart0a_rts_p0_25: lpuart0a_rts_p0_25 { + pinmux = ; + }; + + /omit-if-no-ref/ uart0b_tx_p0_25: uart0b_tx_p0_25 { + pinmux = ; + }; + + /omit-if-no-ref/ i2s0a_lrclk_p0_25: i2s0a_lrclk_p0_25 { + pinmux = ; + }; + + /omit-if-no-ref/ qmatch_p0_25: qmatch_p0_25 { + pinmux = ; + }; + + /omit-if-no-ref/ lpuart0a_rx_p0_26: lpuart0a_rx_p0_26 { + pinmux = ; + }; + + /omit-if-no-ref/ uart0b_cts_p0_26: uart0b_cts_p0_26 { + pinmux = ; + }; + + /omit-if-no-ref/ i2s0c_bclk_p0_26: i2s0c_bclk_p0_26 { + pinmux = ; + }; + + /omit-if-no-ref/ qdir_p0_26: qdir_p0_26 { + pinmux = ; + }; + + /omit-if-no-ref/ lpuart0a_tx_p0_27: lpuart0a_tx_p0_27 { + pinmux = ; + }; + + /omit-if-no-ref/ uart0b_rts_p0_27: uart0b_rts_p0_27 { + pinmux = ; + }; + + /omit-if-no-ref/ i2s0c_sdi_p0_27: i2s0c_sdi_p0_27 { + pinmux = ; + }; + + /omit-if-no-ref/ qerr_p0_27: qerr_p0_27 { + pinmux = ; + }; + + /omit-if-no-ref/ uart1a_rx_p0_28: uart1a_rx_p0_28 { + pinmux = ; + }; + + /omit-if-no-ref/ ext_clk1_p0_28: ext_clk1_p0_28 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr3c_ia_p0_28: tmr3c_ia_p0_28 { + pinmux = ; + }; + + /omit-if-no-ref/ uart1a_tx_p0_29: uart1a_tx_p0_29 { + pinmux = ; + }; + + /omit-if-no-ref/ spi1_ss0_p0_29: spi1_ss0_p0_29 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr3c_oa_p0_29: tmr3c_oa_p0_29 { + pinmux = ; + }; + + /omit-if-no-ref/ adc_trig_d_p0_29: adc_trig_d_p0_29 { + pinmux = ; + }; + + /omit-if-no-ref/ uart1a_cts_p0_30: uart1a_cts_p0_30 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr3c_ia_p0_30: tmr3c_ia_p0_30 { + pinmux = ; + }; + + /omit-if-no-ref/ uart1a_rts_p0_31: uart1a_rts_p0_31 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr3c_oa_p0_31: tmr3c_oa_p0_31 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr1c_ia_p1_0: tmr1c_ia_p1_0 { + pinmux = ; + }; + + /omit-if-no-ref/ spi2a_miso_p1_1: spi2a_miso_p1_1 { + pinmux = ; + }; + + /omit-if-no-ref/ uart0b_rx_p1_1: uart0b_rx_p1_1 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr3c_oa_p1_1: tmr3c_oa_p1_1 { + pinmux = ; + }; + + /omit-if-no-ref/ spi2a_mosi_p1_2: spi2a_mosi_p1_2 { + pinmux = ; + }; + + /omit-if-no-ref/ uart0b_tx_p1_2: uart0b_tx_p1_2 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr3c_ia_p1_2: tmr3c_ia_p1_2 { + pinmux = ; + }; + + /omit-if-no-ref/ div_clk_out_p1_2: div_clk_out_p1_2 { + pinmux = ; + }; + + /omit-if-no-ref/ spi2a_sck_p1_3: spi2a_sck_p1_3 { + pinmux = ; + }; + + /omit-if-no-ref/ uart0b_cts_p1_3: uart0b_cts_p1_3 { + pinmux = ; + }; + + /omit-if-no-ref/ spi2a_ss0_p1_4: spi2a_ss0_p1_4 { + pinmux = ; + }; + + /omit-if-no-ref/ uart0b_rts_p1_4: uart0b_rts_p1_4 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr0c_oa_p1_4: tmr0c_oa_p1_4 { + pinmux = ; + }; + + /omit-if-no-ref/ adc_trig_d_p1_4: adc_trig_d_p1_4 { + pinmux = ; + }; + + /omit-if-no-ref/ uart2a_rx_p1_5: uart2a_rx_p1_5 { + pinmux = ; + }; + + /omit-if-no-ref/ uart2a_tx_p1_6: uart2a_tx_p1_6 { + pinmux = ; + }; + + /omit-if-no-ref/ uart2a_cts_p1_7: uart2a_cts_p1_7 { + pinmux = ; + }; + + /omit-if-no-ref/ uart2a_rts_p1_8: uart2a_rts_p1_8 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr1c_oa_p1_9: tmr1c_oa_p1_9 { + pinmux = ; + }; + }; + }; +}; diff --git a/dts/arm/adi/max32/max32672.dtsi b/dts/arm/adi/max32/max32672.dtsi new file mode 100644 index 0000000000000..0845075cccaa8 --- /dev/null +++ b/dts/arm/adi/max32/max32672.dtsi @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2024 Analog Devices, Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +&sram0 { + reg = <0x20000000 DT_SIZE_K(16)>; +}; + +&clk_inro { + clock-frequency = ; +}; + +/delete-node/ &clk_iso; + +/* MAX32672 extra peripherals. */ +/ { + soc { + sram1: memory@20004000 { + compatible = "mmio-sram"; + reg = <0x20004000 DT_SIZE_K(16)>; + }; + + sram2: memory@20008000 { + compatible = "mmio-sram"; + reg = <0x20008000 DT_SIZE_K(64)>; + }; + + sram3: memory@20018000 { + compatible = "mmio-sram"; + reg = <0x20018000 DT_SIZE_K(64)>; + }; + + sram4: memory@20028000 { + compatible = "mmio-sram"; + reg = <0x20028000 DT_SIZE_K(4)>; + }; + + sram5: memory@20029000 { + compatible = "mmio-sram"; + reg = <0x20029000 DT_SIZE_K(4)>; + }; + + sram6: memory@2002a000 { + compatible = "mmio-sram"; + reg = <0x2002a000 DT_SIZE_K(16)>; + }; + + sram7: memory@2002e000 { + compatible = "mmio-sram"; + reg = <0x2002e000 DT_SIZE_K(16)>; + }; + + flc1: flash_controller@40029400 { + compatible = "adi,max32-flash-controller"; + reg = <0x40029400 0x400>; + + #address-cells = <1>; + #size-cells = <1>; + status = "okay"; + + flash1: flash@10080000 { + compatible = "soc-nv-flash"; + reg = <0x10080000 DT_SIZE_K(512)>; + write-block-size = <16>; + erase-block-size = <8192>; + }; + }; + + uart3: serial@40145000 { + compatible = "adi,max32-uart"; + reg = <0x40145000 0x1000>; + clocks = <&gcr ADI_MAX32_CLOCK_BUS2 2>; + clock-source = ; + interrupts = <88 0>; + status = "disabled"; + }; + }; +}; diff --git a/soc/adi/max32/Kconfig b/soc/adi/max32/Kconfig index 9eb62daf6c38c..7bfc9cff192d9 100644 --- a/soc/adi/max32/Kconfig +++ b/soc/adi/max32/Kconfig @@ -14,6 +14,9 @@ config SOC_FAMILY_MAX32 config SOC_MAX32655 select CPU_CORTEX_M4 +config SOC_MAX32672 + select CPU_CORTEX_M4 + config SOC_MAX32680 select CPU_CORTEX_M4 diff --git a/soc/adi/max32/Kconfig.defconfig.max32672 b/soc/adi/max32/Kconfig.defconfig.max32672 new file mode 100644 index 0000000000000..2a7e1aad1c5df --- /dev/null +++ b/soc/adi/max32/Kconfig.defconfig.max32672 @@ -0,0 +1,14 @@ +# Analog Devices MAX32672 MCU + +# Copyright (c) 2024 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +if SOC_MAX32672 + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,/clocks/clk_ipo,clock-frequency) + +config NUM_IRQS + default 108 + +endif # SOC_MAX32672 diff --git a/soc/adi/max32/Kconfig.soc b/soc/adi/max32/Kconfig.soc index 5d7baca5582fe..53a4548fcaaf7 100644 --- a/soc/adi/max32/Kconfig.soc +++ b/soc/adi/max32/Kconfig.soc @@ -17,6 +17,10 @@ config SOC_MAX32655_M4 bool select SOC_MAX32655 +config SOC_MAX32672 + bool + select SOC_FAMILY_MAX32 + config SOC_MAX32680 bool select SOC_FAMILY_MAX32 @@ -35,5 +39,6 @@ config SOC_MAX32690_M4 config SOC default "max32655" if SOC_MAX32655 + default "max32672" if SOC_MAX32672 default "max32680" if SOC_MAX32680 default "max32690" if SOC_MAX32690 diff --git a/soc/adi/max32/soc.yml b/soc/adi/max32/soc.yml index 5b2c70d086f97..dd6f42d686087 100644 --- a/soc/adi/max32/soc.yml +++ b/soc/adi/max32/soc.yml @@ -7,6 +7,7 @@ family: - name: max32655 cpuclusters: - name: m4 + - name: max32672 - name: max32680 cpuclusters: - name: m4 diff --git a/tests/drivers/gpio/gpio_basic_api/boards/max32672evkit.overlay b/tests/drivers/gpio/gpio_basic_api/boards/max32672evkit.overlay new file mode 100644 index 0000000000000..1655b0bc850d8 --- /dev/null +++ b/tests/drivers/gpio/gpio_basic_api/boards/max32672evkit.overlay @@ -0,0 +1,13 @@ +/* + * Copyright (c) 2024 Analog Devices, Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + resources { + compatible = "test-gpio-basic-api"; + out-gpios = <&gpio0 2 0>; + in-gpios = <&gpio0 3 0>; + }; +}; diff --git a/tests/drivers/gpio/gpio_basic_api/boards/max32672fthr.overlay b/tests/drivers/gpio/gpio_basic_api/boards/max32672fthr.overlay new file mode 100644 index 0000000000000..639347690691d --- /dev/null +++ b/tests/drivers/gpio/gpio_basic_api/boards/max32672fthr.overlay @@ -0,0 +1,13 @@ +/* + * Copyright (c) 2024 Analog Devices, Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + resources { + compatible = "test-gpio-basic-api"; + out-gpios = <&gpio0 12 0>; + in-gpios = <&gpio0 13 0>; + }; +};