From ebea921cf23bfb9904dfd774cbb146add583c2d0 Mon Sep 17 00:00:00 2001 From: Francois Ramu Date: Mon, 15 Jul 2024 10:43:06 +0200 Subject: [PATCH] doc: release 3.6: no CACHE_MANAGEMENT by default on stm32h7/f7 Mentioning that stm32h7 and stm32F7 series do not have the CONFIG_CACHE_MANAGEMENT by default. The application must explicitly set CONFIG_CACHE_MANAGEMENT=y to activate the cache (Icache, Dcache) on those stm32 series. Signed-off-by: Francois Ramu (cherry picked from commit 1c59fa5231ba62a57aa11ab225059cf1c1aba40f) --- doc/releases/migration-guide-3.6.rst | 3 +++ 1 file changed, 3 insertions(+) diff --git a/doc/releases/migration-guide-3.6.rst b/doc/releases/migration-guide-3.6.rst index d230eb6b508b3..99d248961036d 100644 --- a/doc/releases/migration-guide-3.6.rst +++ b/doc/releases/migration-guide-3.6.rst @@ -46,6 +46,9 @@ Kernel :kconfig:option:`CONFIG_HEAP_MEM_POOL_IGNORE_MIN` option has been introduced (which defaults being disabled). +* STM32H7 and STM32F7 should now activate the cache (Icache and Dcache) by setting explicitly + the ``CONFIG_CACHE_MANAGEMENT`` to ``y``. + Boards ******