From e84864acf7d4256a06b671e01ba25664bb4d29be Mon Sep 17 00:00:00 2001 From: Aaron Ye Date: Wed, 30 Oct 2024 16:54:35 +0800 Subject: [PATCH 1/3] dts: arm: ambiq: add ITM node for Apollo series This commit adds the ITM node for Ambiq Apollo3 and Apollo4 series devicetree. Signed-off-by: Aaron Ye --- dts/arm/ambiq/ambiq_apollo3_blue.dtsi | 8 ++++++++ dts/arm/ambiq/ambiq_apollo3p_blue.dtsi | 8 ++++++++ dts/arm/ambiq/ambiq_apollo4p.dtsi | 8 ++++++++ dts/arm/ambiq/ambiq_apollo4p_blue.dtsi | 8 ++++++++ 4 files changed, 32 insertions(+) diff --git a/dts/arm/ambiq/ambiq_apollo3_blue.dtsi b/dts/arm/ambiq/ambiq_apollo3_blue.dtsi index 14760d737b169..bc936a37040da 100644 --- a/dts/arm/ambiq/ambiq_apollo3_blue.dtsi +++ b/dts/arm/ambiq/ambiq_apollo3_blue.dtsi @@ -24,6 +24,14 @@ compatible = "arm,cortex-m4f"; reg = <0>; cpu-power-states = <&idle &suspend_to_ram>; + #address-cells = <1>; + #size-cells = <1>; + + itm: itm@e0000000 { + compatible = "arm,armv7m-itm"; + reg = <0xe0000000 0x1000>; + swo-ref-frequency = ; + }; }; power-states { diff --git a/dts/arm/ambiq/ambiq_apollo3p_blue.dtsi b/dts/arm/ambiq/ambiq_apollo3p_blue.dtsi index ef0f680c75b50..35656ac898dbb 100644 --- a/dts/arm/ambiq/ambiq_apollo3p_blue.dtsi +++ b/dts/arm/ambiq/ambiq_apollo3p_blue.dtsi @@ -24,6 +24,14 @@ compatible = "arm,cortex-m4f"; reg = <0>; cpu-power-states = <&idle &suspend_to_ram>; + #address-cells = <1>; + #size-cells = <1>; + + itm: itm@e0000000 { + compatible = "arm,armv7m-itm"; + reg = <0xe0000000 0x1000>; + swo-ref-frequency = ; + }; }; power-states { diff --git a/dts/arm/ambiq/ambiq_apollo4p.dtsi b/dts/arm/ambiq/ambiq_apollo4p.dtsi index bfd25825fa0dd..54d4ea411a9e6 100644 --- a/dts/arm/ambiq/ambiq_apollo4p.dtsi +++ b/dts/arm/ambiq/ambiq_apollo4p.dtsi @@ -24,6 +24,14 @@ compatible = "arm,cortex-m4f"; reg = <0>; cpu-power-states = <&idle &suspend_to_ram>; + #address-cells = <1>; + #size-cells = <1>; + + itm: itm@e0000000 { + compatible = "arm,armv7m-itm"; + reg = <0xe0000000 0x1000>; + swo-ref-frequency = ; + }; }; power-states { idle: idle { diff --git a/dts/arm/ambiq/ambiq_apollo4p_blue.dtsi b/dts/arm/ambiq/ambiq_apollo4p_blue.dtsi index 2e438a2940a7a..aeca39e3ef7b3 100644 --- a/dts/arm/ambiq/ambiq_apollo4p_blue.dtsi +++ b/dts/arm/ambiq/ambiq_apollo4p_blue.dtsi @@ -32,6 +32,14 @@ cpu0: cpu@0 { compatible = "arm,cortex-m4f"; reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + itm: itm@e0000000 { + compatible = "arm,armv7m-itm"; + reg = <0xe0000000 0x1000>; + swo-ref-frequency = ; + }; }; }; From 1d44fa3d8b032807d1a4224aa8c5627c13faf330 Mon Sep 17 00:00:00 2001 From: Aaron Ye Date: Wed, 30 Oct 2024 15:15:38 +0800 Subject: [PATCH 2/3] boards: ambiq: enable the ITM in Ambiq boards This commit defines the default pinctrl of ITM for Apollo3 and Apollo4 EVB. Also configures the default SWO frequency. Signed-off-by: Aaron Ye --- boards/ambiq/apollo3_evb/Kconfig.defconfig | 11 +++++++++++ boards/ambiq/apollo3_evb/apollo3_evb-pinctrl.dtsi | 5 +++++ boards/ambiq/apollo3_evb/apollo3_evb.dts | 6 ++++++ boards/ambiq/apollo3p_evb/Kconfig.defconfig | 11 +++++++++++ boards/ambiq/apollo3p_evb/apollo3p_evb-pinctrl.dtsi | 5 +++++ boards/ambiq/apollo3p_evb/apollo3p_evb.dts | 6 ++++++ boards/ambiq/apollo4p_blue_kxr_evb/Kconfig.defconfig | 4 ++++ .../apollo4p_blue_kxr_evb-pinctrl.dtsi | 5 +++++ .../apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts | 6 ++++++ boards/ambiq/apollo4p_evb/Kconfig.defconfig | 11 +++++++++++ boards/ambiq/apollo4p_evb/apollo4p_evb-pinctrl.dtsi | 5 +++++ boards/ambiq/apollo4p_evb/apollo4p_evb.dts | 6 ++++++ 12 files changed, 81 insertions(+) create mode 100644 boards/ambiq/apollo3_evb/Kconfig.defconfig create mode 100644 boards/ambiq/apollo3p_evb/Kconfig.defconfig create mode 100644 boards/ambiq/apollo4p_evb/Kconfig.defconfig diff --git a/boards/ambiq/apollo3_evb/Kconfig.defconfig b/boards/ambiq/apollo3_evb/Kconfig.defconfig new file mode 100644 index 0000000000000..b878e32dc36da --- /dev/null +++ b/boards/ambiq/apollo3_evb/Kconfig.defconfig @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright (c) 2024 Ambiq Micro Inc. + +if BOARD_APOLLO3_EVB + +config LOG_BACKEND_SWO_FREQ_HZ + default 1000000 + depends on LOG_BACKEND_SWO + +endif # BOARD_APOLLO3_EVB diff --git a/boards/ambiq/apollo3_evb/apollo3_evb-pinctrl.dtsi b/boards/ambiq/apollo3_evb/apollo3_evb-pinctrl.dtsi index 366e914cc423d..26cf5e58063ea 100644 --- a/boards/ambiq/apollo3_evb/apollo3_evb-pinctrl.dtsi +++ b/boards/ambiq/apollo3_evb/apollo3_evb-pinctrl.dtsi @@ -17,6 +17,11 @@ input-enable; }; }; + itm_default: itm_default { + group1 { + pinmux = ; + }; + }; i2c0_default: i2c0_default { group1 { pinmux = , ; diff --git a/boards/ambiq/apollo3_evb/apollo3_evb.dts b/boards/ambiq/apollo3_evb/apollo3_evb.dts index dc8a110b9c0f5..90d5f3d7176f4 100644 --- a/boards/ambiq/apollo3_evb/apollo3_evb.dts +++ b/boards/ambiq/apollo3_evb/apollo3_evb.dts @@ -98,6 +98,12 @@ status = "okay"; }; +&itm { + pinctrl-0 = <&itm_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &wdt0 { status = "okay"; }; diff --git a/boards/ambiq/apollo3p_evb/Kconfig.defconfig b/boards/ambiq/apollo3p_evb/Kconfig.defconfig new file mode 100644 index 0000000000000..1d3f4f6fe3291 --- /dev/null +++ b/boards/ambiq/apollo3p_evb/Kconfig.defconfig @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright (c) 2024 Ambiq Micro Inc. + +if BOARD_APOLLO3P_EVB + +config LOG_BACKEND_SWO_FREQ_HZ + default 1000000 + depends on LOG_BACKEND_SWO + +endif # BOARD_APOLLO3P_EVB diff --git a/boards/ambiq/apollo3p_evb/apollo3p_evb-pinctrl.dtsi b/boards/ambiq/apollo3p_evb/apollo3p_evb-pinctrl.dtsi index 3dfd7227dac5e..3eea582a37248 100644 --- a/boards/ambiq/apollo3p_evb/apollo3p_evb-pinctrl.dtsi +++ b/boards/ambiq/apollo3p_evb/apollo3p_evb-pinctrl.dtsi @@ -17,6 +17,11 @@ input-enable; }; }; + itm_default: itm_default { + group1 { + pinmux = ; + }; + }; i2c0_default: i2c0_default { group1 { pinmux = , ; diff --git a/boards/ambiq/apollo3p_evb/apollo3p_evb.dts b/boards/ambiq/apollo3p_evb/apollo3p_evb.dts index ed463af3d6e49..0232c7f87d7b1 100644 --- a/boards/ambiq/apollo3p_evb/apollo3p_evb.dts +++ b/boards/ambiq/apollo3p_evb/apollo3p_evb.dts @@ -98,6 +98,12 @@ status = "okay"; }; +&itm { + pinctrl-0 = <&itm_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &wdt0 { status = "okay"; }; diff --git a/boards/ambiq/apollo4p_blue_kxr_evb/Kconfig.defconfig b/boards/ambiq/apollo4p_blue_kxr_evb/Kconfig.defconfig index 5d16de3a1ca0d..d2ff34a02d9bd 100644 --- a/boards/ambiq/apollo4p_blue_kxr_evb/Kconfig.defconfig +++ b/boards/ambiq/apollo4p_blue_kxr_evb/Kconfig.defconfig @@ -4,6 +4,10 @@ if BOARD_APOLLO4P_BLUE_KXR_EVB +config LOG_BACKEND_SWO_FREQ_HZ + default 1000000 + depends on LOG_BACKEND_SWO + if BT config MAIN_STACK_SIZE diff --git a/boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb-pinctrl.dtsi b/boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb-pinctrl.dtsi index 1d64b010f6065..f8c20b0fad982 100644 --- a/boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb-pinctrl.dtsi +++ b/boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb-pinctrl.dtsi @@ -16,6 +16,11 @@ input-enable; }; }; + itm_default: itm_default { + group1 { + pinmux = ; + }; + }; i2c0_default: i2c0_default { group1 { pinmux = , ; diff --git a/boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts b/boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts index b1ac04f91ce89..a37b4a9dea72a 100644 --- a/boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts +++ b/boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts @@ -63,6 +63,12 @@ status = "okay"; }; +&itm { + pinctrl-0 = <&itm_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &counter0 { status = "okay"; }; diff --git a/boards/ambiq/apollo4p_evb/Kconfig.defconfig b/boards/ambiq/apollo4p_evb/Kconfig.defconfig new file mode 100644 index 0000000000000..61533f15f90c5 --- /dev/null +++ b/boards/ambiq/apollo4p_evb/Kconfig.defconfig @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright (c) 2024 Ambiq Micro Inc. + +if BOARD_APOLLO4P_EVB + +config LOG_BACKEND_SWO_FREQ_HZ + default 1000000 + depends on LOG_BACKEND_SWO + +endif # BOARD_APOLLO4P_EVB diff --git a/boards/ambiq/apollo4p_evb/apollo4p_evb-pinctrl.dtsi b/boards/ambiq/apollo4p_evb/apollo4p_evb-pinctrl.dtsi index 125e1a7d238c7..dbbb233485e9f 100644 --- a/boards/ambiq/apollo4p_evb/apollo4p_evb-pinctrl.dtsi +++ b/boards/ambiq/apollo4p_evb/apollo4p_evb-pinctrl.dtsi @@ -17,6 +17,11 @@ input-enable; }; }; + itm_default: itm_default { + group1 { + pinmux = ; + }; + }; adc0_default: adc0_default{ group1 { pinmux = , ; diff --git a/boards/ambiq/apollo4p_evb/apollo4p_evb.dts b/boards/ambiq/apollo4p_evb/apollo4p_evb.dts index 43769da5ad341..2b9929ae46ded 100644 --- a/boards/ambiq/apollo4p_evb/apollo4p_evb.dts +++ b/boards/ambiq/apollo4p_evb/apollo4p_evb.dts @@ -63,6 +63,12 @@ status = "okay"; }; +&itm { + pinctrl-0 = <&itm_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &adc0 { compatible = "ambiq,adc"; pinctrl-0 = <&adc0_default>; From 639129794154b0832915db11fde5bf4a3947e258 Mon Sep 17 00:00:00 2001 From: Aaron Ye Date: Wed, 30 Oct 2024 14:48:15 +0800 Subject: [PATCH 3/3] soc: ambiq: enable the TPIU clock source This commit enables the TPIU clock source in Apollo3 and Apollo4 soc initialization if LOG_BACKEND_SWO is used. Signed-off-by: Aaron Ye --- soc/ambiq/apollo3x/soc.c | 6 ++++++ soc/ambiq/apollo4x/soc.c | 6 ++++++ 2 files changed, 12 insertions(+) diff --git a/soc/ambiq/apollo3x/soc.c b/soc/ambiq/apollo3x/soc.c index bae475e814fd5..33bf6568d37eb 100644 --- a/soc/ambiq/apollo3x/soc.c +++ b/soc/ambiq/apollo3x/soc.c @@ -28,4 +28,10 @@ void soc_early_init_hook(void) #ifdef CONFIG_PM ambiq_power_init(); #endif + +#ifdef CONFIG_LOG_BACKEND_SWO + /* Select HFRC/8 (6MHz) for the TPIU clock source */ + MCUCTRL->TPIUCTRL_b.CLKSEL = MCUCTRL_TPIUCTRL_CLKSEL_HFRCDIV8; + MCUCTRL->TPIUCTRL_b.ENABLE = MCUCTRL_TPIUCTRL_ENABLE_EN; +#endif } diff --git a/soc/ambiq/apollo4x/soc.c b/soc/ambiq/apollo4x/soc.c index b434e20f0ee56..5338a2e2f5f82 100644 --- a/soc/ambiq/apollo4x/soc.c +++ b/soc/ambiq/apollo4x/soc.c @@ -23,4 +23,10 @@ void soc_early_init_hook(void) #ifdef CONFIG_PM ambiq_power_init(); #endif + +#ifdef CONFIG_LOG_BACKEND_SWO + /* Select HFRC 48MHz for the TPIU clock source */ + MCUCTRL->DBGCTRL_b.CM4CLKSEL = MCUCTRL_DBGCTRL_CM4CLKSEL_HFRC48; + MCUCTRL->DBGCTRL_b.CM4TPIUENABLE = MCUCTRL_DBGCTRL_CM4TPIUENABLE_EN; +#endif }