diff --git a/boards/dptechnics/walter/walter_esp32s3_appcpu.dts b/boards/dptechnics/walter/walter_esp32s3_appcpu.dts index a2ef2198559c0..b886a2cec6cab 100644 --- a/boards/dptechnics/walter/walter_esp32s3_appcpu.dts +++ b/boards/dptechnics/walter/walter_esp32s3_appcpu.dts @@ -16,6 +16,8 @@ zephyr,sram = &sram0; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc-pinctrl.dtsi b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc-pinctrl.dtsi index 2967cce447d43..0eef5f1add78c 100644 --- a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc-pinctrl.dtsi +++ b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc-pinctrl.dtsi @@ -20,6 +20,17 @@ }; }; + uart1_default: uart1_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + i2c0_default: i2c0_default { group1 { pinmux = , diff --git a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts index cddc827b4e350..b1ad215672403 100644 --- a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts +++ b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts @@ -7,6 +7,7 @@ #include #include +#include "esp32s3_devkitc-pinctrl.dtsi" / { model = "Espressif ESP32S3-DevkitC APPCPU"; @@ -16,6 +17,8 @@ zephyr,sram = &sram0; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.dts b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.dts index cae78713f81e2..99810fa22c75c 100644 --- a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.dts +++ b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.dts @@ -5,11 +5,11 @@ */ /dts-v1/; -#include "espressif/esp32s3/esp32s3_wroom_n8.dtsi" -#include "esp32s3_devkitc-pinctrl.dtsi" +#include #include #include #include +#include "esp32s3_devkitc-pinctrl.dtsi" / { model = "Espressif ESP32S3-DevkitC PROCPU"; diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm-pinctrl.dtsi b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm-pinctrl.dtsi index aa048eb4b7ff9..adbe936cb2ac7 100644 --- a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm-pinctrl.dtsi +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm-pinctrl.dtsi @@ -20,6 +20,17 @@ }; }; + uart1_default: uart1_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + i2c0_default: i2c0_default { group1 { pinmux = , diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts index 0a758507c3f48..a74e8f91751e3 100644 --- a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts @@ -7,6 +7,7 @@ #include #include +#include "esp32s3_devkitm-pinctrl.dtsi" / { model = "Espressif ESP32S3-DevkitM APPCPU"; @@ -16,6 +17,8 @@ zephyr,sram = &sram0; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu_defconfig b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu_defconfig index 9abf2ff0430ab..1ac2b1c55c9b7 100644 --- a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu_defconfig +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu_defconfig @@ -1,4 +1,3 @@ # SPDX-License-Identifier: Apache-2.0 -CONFIG_MAIN_STACK_SIZE=2048 -CONFIG_CLOCK_CONTROL=y +CONFIG_MAIN_STACK_SIZE=4096 diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.dts b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.dts index d168e97fe60f7..7b758eedd4d44 100644 --- a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.dts +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.dts @@ -6,10 +6,10 @@ /dts-v1/; #include -#include "esp32s3_devkitm-pinctrl.dtsi" #include #include #include +#include "esp32s3_devkitm-pinctrl.dtsi" / { model = "Espressif ESP32S3-DevkitM PROCPU"; diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu_defconfig b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu_defconfig index d789bab1824a6..92308aa841b2e 100644 --- a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu_defconfig +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu_defconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: Apache-2.0 -CONFIG_MAIN_STACK_SIZE=2048 +CONFIG_MAIN_STACK_SIZE=4096 CONFIG_CONSOLE=y CONFIG_SERIAL=y diff --git a/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts b/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts index 4b5d624018513..f51ffacab0bdf 100644 --- a/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts +++ b/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts @@ -6,6 +6,8 @@ /dts-v1/; #include +#include + / { model = "Espressif ESP32S3-EYE APPCPU"; compatible = "espressif,esp32s3"; @@ -14,6 +16,8 @@ zephyr,sram = &sram0; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; @@ -24,42 +28,3 @@ &ipm0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 64kB for the bootloader */ - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x00010000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_appcpu.dts b/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_appcpu.dts index 92bde107bc3a8..9a5e3eb304b12 100644 --- a/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_appcpu.dts +++ b/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_appcpu.dts @@ -6,6 +6,8 @@ /dts-v1/; #include +#include + / { model = "Heltec Wireless Stick Lite V3 APPCPU"; compatible = "espressif,esp32s3"; @@ -14,6 +16,8 @@ zephyr,sram = &sram0; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; @@ -24,42 +28,3 @@ &ipm0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 64kB for the bootloader */ - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x00010000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core.dtsi b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core.dtsi index 60365fdcd65a3..43ee4b452646f 100644 --- a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core.dtsi +++ b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core.dtsi @@ -7,6 +7,7 @@ #include #include "esp32s3_luatos_core-pinctrl.dtsi" #include +#include / { leds { @@ -103,45 +104,6 @@ status = "okay"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 64kB for the bootloader */ - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x00010000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu.dts b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu.dts index 510e587925ea7..611a3b648492b 100644 --- a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu.dts +++ b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu.dts @@ -6,6 +6,8 @@ /dts-v1/; #include +#include + / { model = "ESP32S3 Luatos Core APPCPU"; compatible = "espressif,esp32s3"; @@ -14,6 +16,8 @@ zephyr,sram = &sram0; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; @@ -24,42 +28,3 @@ &ipm0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 64kB for the bootloader */ - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x00010000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu_usb.dts b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu_usb.dts index b36963af0134b..8a383ad135d9b 100644 --- a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu_usb.dts +++ b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu_usb.dts @@ -6,6 +6,8 @@ /dts-v1/; #include +#include + / { model = "ESP32S3 Luatos Core USB APPCPU"; compatible = "espressif,esp32s3"; @@ -14,6 +16,8 @@ zephyr,sram = &sram0; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; @@ -24,42 +28,3 @@ &ipm0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 64kB for the bootloader */ - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x00010000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu.dts b/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu.dts index a117ee02922fb..ab05fa95eba63 100644 --- a/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu.dts +++ b/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu.dts @@ -6,6 +6,8 @@ /dts-v1/; #include +#include + / { model = "M5Stack AtomS3 APPCPU"; compatible = "espressif,esp32s3"; @@ -14,6 +16,8 @@ zephyr,sram = &sram0; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; @@ -24,42 +28,3 @@ &ipm0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 64kB for the bootloader */ - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x00010000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.dts b/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.dts index dd20fb00a8d9e..dec42a668986e 100644 --- a/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.dts +++ b/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.dts @@ -10,6 +10,7 @@ #include "grove_connectors.dtsi" #include #include +#include / { model = "M5Stack AtomS3 PROCPU"; @@ -154,41 +155,6 @@ status = "okay"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x0000F000>; - read-only; - }; - - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu.dts b/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu.dts index 2323548e7fcd9..9eab1cb663de6 100644 --- a/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu.dts +++ b/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu.dts @@ -6,6 +6,8 @@ /dts-v1/; #include +#include + / { model = "M5Stack AtomS3 Lite APPCPU"; compatible = "espressif,esp32s3"; @@ -14,6 +16,8 @@ zephyr,sram = &sram0; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; @@ -24,42 +28,3 @@ &ipm0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 64kB for the bootloader */ - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x00010000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.dts b/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.dts index 166ee2014ca01..457d4fa628773 100644 --- a/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.dts +++ b/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.dts @@ -11,6 +11,7 @@ #include #include #include +#include / { model = "M5Stack AtomS3 Lite PROCPU"; @@ -112,41 +113,6 @@ status = "okay"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x0000F000>; - read-only; - }; - - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/m5stack/m5stack_stamps3/m5stack_stamps3_appcpu.dts b/boards/m5stack/m5stack_stamps3/m5stack_stamps3_appcpu.dts index ce947b579724c..d12429f633e62 100644 --- a/boards/m5stack/m5stack_stamps3/m5stack_stamps3_appcpu.dts +++ b/boards/m5stack/m5stack_stamps3/m5stack_stamps3_appcpu.dts @@ -6,6 +6,8 @@ /dts-v1/; #include +#include + / { model = "M5Stack StampS3 APPCPU"; compatible = "espressif,esp32s3"; @@ -14,6 +16,8 @@ zephyr,sram = &sram0; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; @@ -24,42 +28,3 @@ &ipm0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 64kB for the bootloader */ - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x00010000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/m5stack/m5stack_stamps3/m5stack_stamps3_procpu.dts b/boards/m5stack/m5stack_stamps3/m5stack_stamps3_procpu.dts index 9e231fba57f0d..2abacdd87ed41 100644 --- a/boards/m5stack/m5stack_stamps3/m5stack_stamps3_procpu.dts +++ b/boards/m5stack/m5stack_stamps3/m5stack_stamps3_procpu.dts @@ -12,6 +12,7 @@ #include #include #include +#include / { model = "M5Stack StampS3 PROCPU"; @@ -152,41 +153,6 @@ status = "okay"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x0000F000>; - read-only; - }; - - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/m5stack/m5stickc_plus/m5stickc_plus_appcpu.dts b/boards/m5stack/m5stickc_plus/m5stickc_plus_appcpu.dts index 1911e4fe56d55..c2764a78f3402 100644 --- a/boards/m5stack/m5stickc_plus/m5stickc_plus_appcpu.dts +++ b/boards/m5stack/m5stickc_plus/m5stickc_plus_appcpu.dts @@ -6,6 +6,7 @@ /dts-v1/; #include +#include / { model = "M5StickC Plus APPCPU"; @@ -25,42 +26,3 @@ &trng0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.dts b/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.dts index 28779d87ecb4b..940d888bfd264 100644 --- a/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.dts +++ b/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.dts @@ -10,6 +10,7 @@ #include #include #include +#include / { model = "M5StickC Plus PROCPU"; @@ -214,45 +215,6 @@ status = "okay"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/others/icev_wireless/icev_wireless.dts b/boards/others/icev_wireless/icev_wireless.dts index 6209aeac7c21e..d044209cec48c 100644 --- a/boards/others/icev_wireless/icev_wireless.dts +++ b/boards/others/icev_wireless/icev_wireless.dts @@ -9,6 +9,7 @@ #include #include "icev_wireless-pinctrl.dtsi" #include +#include / { model = "ICEV Wireless"; @@ -93,41 +94,6 @@ status = "okay"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x0000F000>; - read-only; - }; - - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/seeed/xiao_esp32c3/xiao_esp32c3.dts b/boards/seeed/xiao_esp32c3/xiao_esp32c3.dts index 68687958b8a2a..0be67a645c434 100644 --- a/boards/seeed/xiao_esp32c3/xiao_esp32c3.dts +++ b/boards/seeed/xiao_esp32c3/xiao_esp32c3.dts @@ -7,6 +7,7 @@ /dts-v1/; #include +#include #include "xiao_esp32c3-pinctrl.dtsi" #include "seeed_xiao_connector.dtsi" @@ -86,40 +87,6 @@ status = "okay"; }; -&flash0 { - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x0000F000>; - read-only; - }; - - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu.dts b/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu.dts index f2cf95742ac14..0f678dc0ccaa1 100644 --- a/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu.dts +++ b/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu.dts @@ -6,6 +6,8 @@ /dts-v1/; #include +#include + / { model = "Seeed Xiao ESP32S3 APPCPU"; compatible = "espressif,esp32s3"; @@ -14,6 +16,8 @@ zephyr,sram = &sram0; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; @@ -24,42 +28,3 @@ &ipm0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 64kB for the bootloader */ - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x00010000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.dts b/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.dts index 2a68af1ee1878..cdf5801e362f3 100644 --- a/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.dts +++ b/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.dts @@ -5,7 +5,9 @@ */ /dts-v1/; + #include "xiao_esp32s3_procpu_common.dtsi" +#include / { model = "Seeed Xiao ESP32S3 PROCPU"; diff --git a/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_common.dtsi b/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_common.dtsi index 8a99ef2c694f5..f8e4906f88c6b 100644 --- a/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_common.dtsi +++ b/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_common.dtsi @@ -91,41 +91,6 @@ status = "okay"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x0000F000>; - read-only; - }; - - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_sense.dts b/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_sense.dts index 4dd7a68abced5..f8f7ed4a31675 100644 --- a/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_sense.dts +++ b/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_sense.dts @@ -6,6 +6,7 @@ /dts-v1/; #include "xiao_esp32s3_procpu_common.dtsi" +#include / { model = "Seeed Xiao ESP32S3 PROCPU Sense"; diff --git a/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_appcpu.dts b/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_appcpu.dts index 9b345338aa41c..13562961dc845 100644 --- a/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_appcpu.dts +++ b/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_appcpu.dts @@ -5,6 +5,7 @@ /dts-v1/; #include +#include / { model = "ESP32-S3-Touch-LCD-1.28 APPCPU"; @@ -12,43 +13,10 @@ chosen { zephyr,sram = &sram0; - }; -}; - -&flash0 { - status = "okay"; - reg = <0x0 DT_SIZE_M(16)>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x0000F000>; - read-only; - }; - - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; + zephyr,ipc_shm = &shm0; + zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/drivers/clock_control/clock_control_esp32.c b/drivers/clock_control/clock_control_esp32.c index 346997d898daa..5a2157cf9a12d 100644 --- a/drivers/clock_control/clock_control_esp32.c +++ b/drivers/clock_control/clock_control_esp32.c @@ -154,7 +154,10 @@ static void esp32_clock_perip_init(void) #if !defined(CONFIG_SOC_SERIES_ESP32) uint32_t common_perip_clk1; #endif - + /* Avoid APPCPU to mess with the clocks. */ +#if defined(CONFIG_SOC_ESP32_APPCPU) || defined(CONFIG_SOC_ESP32S3_APPCPU) + return; +#endif /* For reason that only reset CPU, do not disable the clocks * that have been enabled before reset. */ diff --git a/drivers/ipm/ipm_esp32.c b/drivers/ipm/ipm_esp32.c index 27fb90b6f9fa3..fd84919b80a1c 100644 --- a/drivers/ipm/ipm_esp32.c +++ b/drivers/ipm/ipm_esp32.c @@ -216,9 +216,9 @@ static int esp32_ipm_init(const struct device *dev) data->other_core_id = (data->this_core_id == 0) ? 1 : 0; LOG_DBG("Size of IPM shared memory: %d", data->shm_size); - LOG_DBG("Address of PRO_CPU IPM shared memory: %p", data->shm.pro_cpu_shm); - LOG_DBG("Address of APP_CPU IPM shared memory: %p", data->shm.app_cpu_shm); - LOG_DBG("Address of IPM control structure: %p", data->control); + LOG_DBG("Address of PRO_CPU IPM shared memory: %p", (void *)data->shm.pro_cpu_shm); + LOG_DBG("Address of APP_CPU IPM shared memory: %p", (void *)data->shm.app_cpu_shm); + LOG_DBG("Address of IPM control structure: %p", (void *)data->control); /* pro_cpu is responsible to initialize the lock of shared memory */ if (data->this_core_id == 0) { diff --git a/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi b/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi index 3a50e60d249be..777f7959f34f4 100644 --- a/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi +++ b/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi @@ -91,14 +91,39 @@ reg = <0x3fc88000 0x77FFF>; }; - ipmmem0: memory@3fcbd000 { + ipmmem0: memory@3fcb2000 { compatible = "mmio-sram"; - reg = <0x3fcbd000 0x400>; + reg = <0x3fcb2000 0x400>; }; - shm0: memory@3fcbd400 { + shm0: memory@3fcb2400 { compatible = "mmio-sram"; - reg = <0x3fcbd400 0x4000>; + reg = <0x3fcb2400 0x3c00>; + }; + + ipm0: ipm@3fcb6000 { + compatible = "espressif,esp32-ipm"; + reg = <0x3fcb6000 0x8>; + status = "disabled"; + shared-memory = <&ipmmem0>; + shared-memory-size = <0x400>; + interrupts = + , + ; + interrupt-parent = <&intc>; + }; + + mbox0: mbox@3fcb6008 { + compatible = "espressif,mbox-esp32"; + reg = <0x3fcb6008 0x8>; + status = "disabled"; + shared-memory = <&ipmmem0>; + shared-memory-size = <0x400>; + interrupts = + , + ; + interrupt-parent = <&intc>; + #mbox-cells = <1>; }; intc: interrupt-controller@600c2000 { @@ -159,31 +184,6 @@ status = "disabled"; }; - ipm0: ipm@3fcc1400 { - compatible = "espressif,esp32-ipm"; - reg = <0x3fcc1400 0x8>; - status = "disabled"; - shared-memory = <&ipmmem0>; - shared-memory-size = <0x400>; - interrupts = - , - ; - interrupt-parent = <&intc>; - }; - - mbox0: mbox@3fcc1408 { - compatible = "espressif,mbox-esp32"; - reg = <0x3fcc1408 0x8>; - status = "disabled"; - shared-memory = <&ipmmem0>; - shared-memory-size = <0x400>; - interrupts = - , - ; - interrupt-parent = <&intc>; - #mbox-cells = <1>; - }; - uart0: uart@60000000 { compatible = "espressif,esp32-uart"; reg = <0x60000000 0x1000>; diff --git a/samples/drivers/ipm/ipm_esp32/CMakeLists.txt b/samples/drivers/ipm/ipm_esp32/CMakeLists.txt index c4399df8a9280..f343fa37b01bf 100644 --- a/samples/drivers/ipm/ipm_esp32/CMakeLists.txt +++ b/samples/drivers/ipm/ipm_esp32/CMakeLists.txt @@ -2,33 +2,11 @@ cmake_minimum_required(VERSION 3.20.0) -set(REMOTE_ZEPHYR_DIR ${CMAKE_CURRENT_BINARY_DIR}/ipm_esp32_appcpu-prefix/src/ipm_esp32_appcpu-build/zephyr) - -if("${BOARD}" STREQUAL "esp32_devkitc_wrover/esp32/procpu") - set(BOARD_REMOTE "esp32_devkitc_wrover/esp32/appcpu") -elseif("${BOARD}" STREQUAL "esp32_devkitc_wroom/esp32/procpu") - set(BOARD_REMOTE "esp32_devkitc_wroom/esp32/appcpu") -elseif("${BOARD}" STREQUAL "esp32s3_devkitm/esp32s3/procpu") - set(BOARD_REMOTE "esp32s3_devkitm/esp32s3/appcpu") -else() - message(FATAL_ERROR "${BOARD} was not supported for this sample") -endif() +set(REMOTE_ZEPHYR_DIR ${CMAKE_CURRENT_BINARY_DIR}/../ipm_esp32_remote/zephyr) find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) -project(ipm_esp32) - -set_source_files_properties(${REMOTE_ZEPHYR_DIR}/esp32_appcpu_firmware.c PROPERTIES GENERATED TRUE) -target_sources(app PRIVATE src/main.c ${REMOTE_ZEPHYR_DIR}/esp32_appcpu_firmware.c) -include(ExternalProject) - -ExternalProject_Add( - ipm_esp32_appcpu - SOURCE_DIR ${APPLICATION_SOURCE_DIR}/ipm_esp_appcpu - INSTALL_COMMAND "" - CMAKE_CACHE_ARGS -DBOARD:STRING=${BOARD_REMOTE} - BUILD_BYPRODUCTS "${REMOTE_ZEPHYR_DIR}/${KERNEL_BIN_NAME}" - BUILD_ALWAYS True -) +message(STATUS "${BOARD} compile as Master in this sample") +project(ipm_esp32) -add_dependencies(app ipm_esp32_appcpu) +target_sources(app PRIVATE src/main.c src/procpu_shell.c) diff --git a/samples/drivers/ipm/ipm_esp32/Kconfig.sysbuild b/samples/drivers/ipm/ipm_esp32/Kconfig.sysbuild new file mode 100644 index 0000000000000..143c6c08eb505 --- /dev/null +++ b/samples/drivers/ipm/ipm_esp32/Kconfig.sysbuild @@ -0,0 +1,11 @@ +# Copyright 2022 NXP +# +# SPDX-License-Identifier: Apache-2.0 + +source "share/sysbuild/Kconfig" + +config IPM_REMOTE_BOARD + string + default "esp32_devkitc_wrover/esp32/appcpu" if $(BOARD) = "esp32_devkitc_wroom" + default "esp32_devkitc_wroom/esp32/appcpu" if $(BOARD) = "esp32_devkitc_wroom" + default "esp32s3_devkitm/esp32s3/appcpu" if $(BOARD) = "esp32s3_devkitm" diff --git a/samples/drivers/ipm/ipm_esp32/README.rst b/samples/drivers/ipm/ipm_esp32/README.rst index 5deb498b2f9d5..9f17389cc62d2 100644 --- a/samples/drivers/ipm/ipm_esp32/README.rst +++ b/samples/drivers/ipm/ipm_esp32/README.rst @@ -26,7 +26,8 @@ Build the ESP32 IPM sample code as follows: .. zephyr-app-commands:: :zephyr-app: samples/drivers/ipm/ipm_esp32 - :board: esp32_devkitc_wroom/esp32/procpu + :board: esp32s3_devkitm/esp32s3/procpu + :west-args: --sysbuild :goals: build :compact: @@ -38,18 +39,20 @@ console program (e.g., minicom, putty, screen, etc). .. code-block:: console - *** Booting Zephyr OS build v3.3.0-rc3-38-gc9225e4365b9 *** - PRO_CPU is sending a fake request, waiting remote response... - PRO_CPU received a message from APP_CPU : APP_CPU: This is a response - PRO_CPU is sending a fake request, waiting remote response... - PRO_CPU received a message from APP_CPU : APP_CPU: This is a response - PRO_CPU is sending a fake request, waiting remote response... - PRO_CPU received a message from APP_CPU : APP_CPU: This is a response - PRO_CPU is sending a fake request, waiting remote response... - PRO_CPU received a message from APP_CPU : APP_CPU: This is a response - PRO_CPU is sending a fake request, waiting remote response... - PRO_CPU received a message from APP_CPU : APP_CPU: This is a response - PRO_CPU is sending a fake request, waiting remote response... - PRO_CPU received a message from APP_CPU : APP_CPU: This is a response - PRO_CPU is sending a fake request, waiting remote response... - PRO_CPU received a message from APP_CPU : APP_CPU: This is a response + *** Booting Zephyr OS build v4.0.0-rc2-61-ga24efebe15e2 *** + PRO_CPU is sending a request, waiting remote response... + PRO_CPU received a message from APP_CPU : APP_CPU uptime ticks 502 + PRO_CPU is sending a request, waiting remote response... + PRO_CPU received a message from APP_CPU : APP_CPU uptime ticks 10502 + PRO_CPU is sending a request, waiting remote response... + PRO_CPU received a message from APP_CPU : APP_CPU uptime ticks 20503 + PRO_CPU is sending a request, waiting remote response... + PRO_CPU received a message from APP_CPU : APP_CPU uptime ticks 30504 + PRO_CPU is sending a request, waiting remote response... + PRO_CPU received a message from APP_CPU : APP_CPU uptime ticks 40505 + PRO_CPU is sending a request, waiting remote response... + PRO_CPU received a message from APP_CPU : APP_CPU uptime ticks 50506 + PRO_CPU is sending a request, waiting remote response... + PRO_CPU received a message from APP_CPU : APP_CPU uptime ticks 60507 + PRO_CPU is sending a request, waiting remote response... + PRO_CPU received a message from APP_CPU : APP_CPU uptime ticks 70508 diff --git a/samples/drivers/ipm/ipm_esp32/ipm_esp_appcpu/prj.conf b/samples/drivers/ipm/ipm_esp32/ipm_esp_appcpu/prj.conf deleted file mode 100644 index 05a3de09ec11c..0000000000000 --- a/samples/drivers/ipm/ipm_esp32/ipm_esp_appcpu/prj.conf +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_HEAP_MEM_POOL_SIZE=256 -CONFIG_IPM=y diff --git a/samples/drivers/ipm/ipm_esp32/ipm_esp_appcpu/CMakeLists.txt b/samples/drivers/ipm/ipm_esp32/remote/CMakeLists.txt similarity index 66% rename from samples/drivers/ipm/ipm_esp32/ipm_esp_appcpu/CMakeLists.txt rename to samples/drivers/ipm/ipm_esp32/remote/CMakeLists.txt index 44114da84509a..51ba683f4f67a 100644 --- a/samples/drivers/ipm/ipm_esp32/ipm_esp_appcpu/CMakeLists.txt +++ b/samples/drivers/ipm/ipm_esp32/remote/CMakeLists.txt @@ -3,6 +3,8 @@ cmake_minimum_required(VERSION 3.20.0) find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) -project(ipm_esp32_appcpu) + +message(STATUS "${BOARD} compiles as remote in this sample") +project(ipm_esp32_remote) target_sources(app PRIVATE src/main.c) diff --git a/samples/drivers/ipm/ipm_esp32/remote/prj.conf b/samples/drivers/ipm/ipm_esp32/remote/prj.conf new file mode 100644 index 0000000000000..c56177a430671 --- /dev/null +++ b/samples/drivers/ipm/ipm_esp32/remote/prj.conf @@ -0,0 +1,3 @@ +CONFIG_HEAP_MEM_POOL_SIZE=2048 +CONFIG_MAIN_STACK_SIZE=4096 +CONFIG_IPM=y diff --git a/samples/drivers/ipm/ipm_esp32/boards/esp32_devkitc_wroom_procpu.overlay b/samples/drivers/ipm/ipm_esp32/remote/socs/esp32s3_appcpu.overlay similarity index 100% rename from samples/drivers/ipm/ipm_esp32/boards/esp32_devkitc_wroom_procpu.overlay rename to samples/drivers/ipm/ipm_esp32/remote/socs/esp32s3_appcpu.overlay diff --git a/samples/drivers/ipm/ipm_esp32/ipm_esp_appcpu/src/main.c b/samples/drivers/ipm/ipm_esp32/remote/src/main.c similarity index 73% rename from samples/drivers/ipm/ipm_esp32/ipm_esp_appcpu/src/main.c rename to samples/drivers/ipm/ipm_esp32/remote/src/main.c index afb7921fc6460..9e7abde4cb5c8 100644 --- a/samples/drivers/ipm/ipm_esp32/ipm_esp_appcpu/src/main.c +++ b/samples/drivers/ipm/ipm_esp32/remote/src/main.c @@ -4,17 +4,18 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include #include +#include #include #include -#include static const struct device *ipm_dev; -static const char fake_resp[] = {"APP_CPU: This is a response"}; +static char resp[64]; struct k_sem sync; -static void ipm_receive_callback(const struct device *ipmdev, void *user_data, - uint32_t id, volatile void *data) +static void ipm_receive_callback(const struct device *ipmdev, void *user_data, uint32_t id, + volatile void *data) { k_sem_give(&sync); } @@ -33,7 +34,9 @@ int main(void) while (1) { k_sem_take(&sync, K_FOREVER); - ipm_send(ipm_dev, -1, sizeof(fake_resp), &fake_resp, sizeof(fake_resp)); + snprintf(resp, sizeof(resp), "APP_CPU uptime ticks %lli\n", k_uptime_ticks()); + ipm_send(ipm_dev, -1, sizeof(resp), &resp, sizeof(resp)); } + return 0; } diff --git a/samples/drivers/ipm/ipm_esp32/boards/esp32_devkitc_wrover_procpu.overlay b/samples/drivers/ipm/ipm_esp32/socs/esp32_procpu.overlay similarity index 100% rename from samples/drivers/ipm/ipm_esp32/boards/esp32_devkitc_wrover_procpu.overlay rename to samples/drivers/ipm/ipm_esp32/socs/esp32_procpu.overlay diff --git a/samples/drivers/ipm/ipm_esp32/socs/esp32s3_procpu.overlay b/samples/drivers/ipm/ipm_esp32/socs/esp32s3_procpu.overlay new file mode 100644 index 0000000000000..ab1795abad772 --- /dev/null +++ b/samples/drivers/ipm/ipm_esp32/socs/esp32s3_procpu.overlay @@ -0,0 +1,3 @@ +&ipm0 { + status = "okay"; +}; diff --git a/samples/drivers/ipm/ipm_esp32/src/main.c b/samples/drivers/ipm/ipm_esp32/src/main.c index 5bb06f9cf98fb..4a884281e3603 100644 --- a/samples/drivers/ipm/ipm_esp32/src/main.c +++ b/samples/drivers/ipm/ipm_esp32/src/main.c @@ -10,24 +10,26 @@ #include #include -static const char fake_request[] = {"PRO_CPU: Fake request to APP_CPU"}; +static const char request[] = {"PRO_CPU: request to APP_CPU"}; static const struct device *ipm_dev; static char received_string[64]; static struct k_sem sync; -static void ipm_receive_callback(const struct device *ipmdev, void *user_data, - uint32_t id, volatile void *data) +static void ipm_receive_callback(const struct device *ipmdev, void *user_data, uint32_t id, + volatile void *data) { ARG_UNUSED(ipmdev); ARG_UNUSED(user_data); - strcpy(received_string, (const char *)data); + strncpy(received_string, (const char *)data, sizeof(received_string)); k_sem_give(&sync); } int main(void) { + int ret; + k_sem_init(&sync, 0, 1); ipm_dev = DEVICE_DT_GET(DT_NODELABEL(ipm0)); @@ -38,15 +40,23 @@ int main(void) ipm_register_callback(ipm_dev, ipm_receive_callback, NULL); + /* Workaround to catch up with APPCPU */ + k_sleep(K_MSEC(50)); + while (1) { - printk("PRO_CPU is sending a fake request, waiting remote response...\n\r"); + printk("PRO_CPU is sending a request, waiting remote response...\n\r"); + + ipm_send(ipm_dev, -1, sizeof(request), &request, sizeof(request)); - ipm_send(ipm_dev, -1, sizeof(fake_request), &fake_request, sizeof(fake_request)); - k_sem_take(&sync, K_FOREVER); + ret = k_sem_take(&sync, K_MSEC(5000)); - printk("PRO_CPU received a message from APP_CPU : %s\n\r", received_string); + if (ret) { + printk("No response from APP_CPU - trying again.\r\n"); + } else { + printk("PRO_CPU received a message from APP_CPU : %s\n\r", received_string); + } - k_sleep(K_MSEC(200)); + k_sleep(K_MSEC(1000)); } return 0; } diff --git a/samples/drivers/ipm/ipm_esp32/src/procpu_shell.c b/samples/drivers/ipm/ipm_esp32/src/procpu_shell.c new file mode 100644 index 0000000000000..e3889efa4ba5b --- /dev/null +++ b/samples/drivers/ipm/ipm_esp32/src/procpu_shell.c @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Command usage info. */ +#define START_HELP ("\n\nStart the APPCPU") +#define STOP_HELP ("\n\nStop the APPCPU") + +void esp_appcpu_image_start(unsigned int hdr_offset); +void esp_appcpu_image_stop(void); + +static int cmd_appcpu_start(const struct shell *sh, size_t argc, char *argv[]) +{ + ARG_UNUSED(sh); + ARG_UNUSED(argc); + ARG_UNUSED(argv); + + printk("start appcpu\n"); + + esp_appcpu_image_start(0x20); + + return 0; +} + +static int cmd_appcpu_stop(const struct shell *sh, size_t argc, char *argv[]) +{ + ARG_UNUSED(sh); + ARG_UNUSED(argc); + ARG_UNUSED(argv); + + printk("stop appcpu\n"); + + esp_appcpu_image_stop(); + + return 0; +} + +SHELL_STATIC_SUBCMD_SET_CREATE(sub_amp, + /* Alphabetically sorted to ensure correct Tab autocompletion. */ + SHELL_CMD_ARG(appstart, NULL, START_HELP, cmd_appcpu_start, 1, 0), + SHELL_CMD_ARG(appstop, NULL, STOP_HELP, cmd_appcpu_stop, 1, 0), + SHELL_SUBCMD_SET_END /* Array terminated. */ +); + +SHELL_CMD_REGISTER(amp, &sub_amp, "AMP debug commands.", NULL); diff --git a/samples/drivers/ipm/ipm_esp32/sysbuild.cmake b/samples/drivers/ipm/ipm_esp32/sysbuild.cmake new file mode 100644 index 0000000000000..1ec5cf9c3e4d3 --- /dev/null +++ b/samples/drivers/ipm/ipm_esp32/sysbuild.cmake @@ -0,0 +1,21 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright 2024 Espressif + +# Add external project +ExternalZephyrProject_Add( + APPLICATION ipm_esp32_remote + SOURCE_DIR ${APP_DIR}/remote + BOARD ${SB_CONFIG_IPM_REMOTE_BOARD} + ) + +# Add dependencies so that the remote sample will be built first +# This is required because some primary cores need information from the +# remote core's build, such as the output image's LMA +add_dependencies(ipm_esp32 ipm_esp32_remote) +sysbuild_add_dependencies(CONFIGURE ipm_esp32 ipm_esp32_remote) + +if(SB_CONFIG_BOOTLOADER_MCUBOOT) + # Make sure MCUboot is flashed first + sysbuild_add_dependencies(FLASH ipm_esp32_remote mcuboot) +endif() diff --git a/soc/espressif/common/loader.c b/soc/espressif/common/loader.c index b520e427ac20d..01e27bc588656 100644 --- a/soc/espressif/common/loader.c +++ b/soc/espressif/common/loader.c @@ -84,7 +84,6 @@ void map_rom_segments(uint32_t app_drom_start, uint32_t app_drom_vaddr, unsigned int segments = 0; unsigned int ram_segments = 0; - /* Using already fetched bootloader image header from bootloader_init */ offset += sizeof(esp_image_header_t); while (segments++ < 16) { @@ -223,7 +222,6 @@ void map_rom_segments(uint32_t app_drom_start, uint32_t app_drom_vaddr, "IROM", app_irom_start_aligned, app_irom_vaddr_aligned, app_irom_size, app_irom_size); - ets_printf("\n\r"); esp_rom_uart_tx_wait_idle(0); } @@ -248,7 +246,7 @@ void __start(void) } #endif -#ifndef CONFIG_MCUBOOT +#if !defined(CONFIG_MCUBOOT) && !defined(CONFIG_SOC_ESP32S3_APPCPU) map_rom_segments(_app_drom_start, _app_drom_vaddr, _app_drom_size, _app_irom_start, _app_irom_vaddr, _app_irom_size); #endif diff --git a/soc/espressif/esp32/Kconfig b/soc/espressif/esp32/Kconfig index 3059ea322f5dd..9aeaada682e90 100644 --- a/soc/espressif/esp32/Kconfig +++ b/soc/espressif/esp32/Kconfig @@ -32,8 +32,7 @@ config ESP32_APPCPU_DRAM config SOC_ENABLE_APPCPU bool default y - depends on IPM && SOC_ESP32_PROCPU - depends on MBOX && SOC_ESP32_PROCPU + depends on (IPM || MBOX) && SOC_ESP32_PROCPU help This hidden configuration lets PROCPU core to map and start APPCPU whenever IPM is enabled. diff --git a/soc/espressif/esp32s3/CMakeLists.txt b/soc/espressif/esp32s3/CMakeLists.txt index 5f64bd335c2ff..706fe6eb39fc8 100644 --- a/soc/espressif/esp32s3/CMakeLists.txt +++ b/soc/espressif/esp32s3/CMakeLists.txt @@ -1,14 +1,20 @@ # SPDX-License-Identifier: Apache-2.0 if (CONFIG_SOC_ESP32S3_APPCPU) - zephyr_sources(soc_appcpu.c) + + zephyr_sources( + soc_appcpu.c + ) + else() + zephyr_sources( soc.c soc_cache.c esp32s3-mp.c ../common/loader.c ) + endif() zephyr_include_directories(.) @@ -22,13 +28,24 @@ zephyr_library_sources_ifdef(CONFIG_POWEROFF poweroff.c) # Get flash size to use in esptool as string math(EXPR esptoolpy_flashsize "${CONFIG_FLASH_SIZE} / 0x100000") -# Make rom loader compatible binary file -if(NOT CONFIG_BOOTLOADER_MCUBOOT) +# Get UART baudrate from DT +dt_chosen(dts_shell_uart PROPERTY "zephyr,shell-uart") +if(${dts_shell_uart}) + dt_prop(monitor_baud PATH ${dts_shell_uart} PROPERTY "current-speed") +endif() + +board_runner_args(esp32 "--esp-monitor-baud=${monitor_baud}") + +message("-- Espressif HAL path: ${ESP_IDF_PATH}") + +# Select image processing + +if(CONFIG_ESP_SIMPLE_BOOT OR CONFIG_MCUBOOT) if(CONFIG_BUILD_OUTPUT_BIN) set(ESPTOOL_PY ${ESP_IDF_PATH}/tools/esptool_py/esptool.py) - message("esptool path: ${ESPTOOL_PY}") + message("-- Use the esptool.py: ${ESPTOOL_PY}") set(ELF2IMAGE_ARG "") if(NOT CONFIG_MCUBOOT) @@ -37,49 +54,35 @@ if(NOT CONFIG_BOOTLOADER_MCUBOOT) set_property(GLOBAL APPEND PROPERTY extra_post_build_commands COMMAND ${PYTHON_EXECUTABLE} ${ESPTOOL_PY} - ARGS --chip esp32s3 elf2image ${ELF2IMAGE_ARG} + ARGS --chip ${CONFIG_SOC} elf2image ${ELF2IMAGE_ARG} --flash_mode dio --flash_freq 40m --flash_size ${esptoolpy_flashsize}MB -o ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.bin ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf) - endif() - -endif() -## When building for APPCPU -if (CONFIG_SOC_ESP32S3_APPCPU) - - if(CONFIG_BUILD_OUTPUT_BIN) - set_property(GLOBAL APPEND PROPERTY extra_post_build_commands - COMMAND ${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/tools/esp_bin2c_array.py - ARGS -i ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.bin - -o ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.c - -a "esp32s3_appcpu_fw_array") endif() -else() - ## Building for PROCPU - - set_property(TARGET bintools PROPERTY disassembly_flag_inline_source) +endif() - # Get code-partition boot address +# Select the image origin depending on the boot configuration +if(CONFIG_SOC_ESP32S3_APPCPU) + dt_nodelabel(dts_partition_path NODELABEL "slot0_appcpu_partition") +elseif(CONFIG_MCUBOOT) dt_nodelabel(dts_partition_path NODELABEL "boot_partition") - dt_reg_addr(boot_off PATH ${dts_partition_path}) - - # Get code-partition slot0 address +elseif(CONFIG_ESP_SIMPLE_BOOT) + dt_nodelabel(dts_partition_path NODELABEL "boot_partition") +else() dt_nodelabel(dts_partition_path NODELABEL "slot0_partition") - dt_reg_addr(img_0_off PATH ${dts_partition_path}) +endif() - if(CONFIG_BOOTLOADER_MCUBOOT) - board_finalize_runner_args(esp32 "--esp-app-address=${img_0_off}") - else() - board_finalize_runner_args(esp32 "--esp-app-address=${boot_off}") - endif() +dt_reg_addr(image_off PATH ${dts_partition_path}) +board_finalize_runner_args(esp32 "--esp-app-address=${image_off}") -endif() +message("-- Image partition ${dts_partition_path}") +# Look for cross references between bootloader sections if(CONFIG_MCUBOOT) - # search from cross references between bootloader sections + message("check_callgraph using: ${ESP_IDF_PATH}/tools/ci/check_callgraph.py") set_property(GLOBAL APPEND PROPERTY extra_post_build_commands COMMAND diff --git a/soc/espressif/esp32s3/Kconfig b/soc/espressif/esp32s3/Kconfig index cfda258d8c22c..3e2886edcf663 100644 --- a/soc/espressif/esp32s3/Kconfig +++ b/soc/espressif/esp32s3/Kconfig @@ -14,28 +14,6 @@ config SOC_SERIES_ESP32S3 if SOC_SERIES_ESP32S3 -config ESP32S3_APPCPU_IRAM - hex "ESP32S3 APPCPU IRAM size" - depends on SOC_ESP32S3_PROCPU || SOC_ESP32S3_APPCPU - default 0x20000 - help - Defines APPCPU IRAM area in bytes. - -config ESP32S3_APPCPU_DRAM - hex "ESP32S3 APPCPU DRAM size" - depends on SOC_ESP32S3_PROCPU || SOC_ESP32S3_APPCPU - default 0x10000 - help - Defines APPCPU DRAM area in bytes. - -config SOC_ENABLE_APPCPU - bool - default y - depends on IPM && SOC_ESP32S3_PROCPU - depends on MBOX && SOC_ESP32S3_PROCPU - help - This hidden configuration lets PROCPU core to map and start APPCPU whenever IPM is enabled. - menu "Cache config" choice ESP32S3_INSTRUCTION_CACHE_SIZE @@ -178,4 +156,6 @@ config MAC_BB_PD endmenu # Cache config +rsource "Kconfig.amp" + endif # SOC_SERIES_ESP32S3 diff --git a/soc/espressif/esp32s3/Kconfig.amp b/soc/espressif/esp32s3/Kconfig.amp new file mode 100644 index 0000000000000..f6acbbc52a24e --- /dev/null +++ b/soc/espressif/esp32s3/Kconfig.amp @@ -0,0 +1,31 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_ESP32S3 + +menu "AMP config" + +config ESP32S3_APPCPU_IRAM_SIZE + hex "ESP32S3 APPCPU IRAM size" + depends on SOC_ESP32S3_PROCPU || SOC_ESP32S3_APPCPU + default 0x10000 + help + Defines APPCPU IRAM area size in bytes. + +config ESP32S3_APPCPU_DRAM_SIZE + hex "ESP32S3 APPCPU DRAM size" + depends on SOC_ESP32S3_PROCPU || SOC_ESP32S3_APPCPU + default 0x10000 + help + Defines APPCPU DRAM area size in bytes. + +config SOC_ENABLE_APPCPU + bool + default y + depends on (IPM || MBOX) && SOC_ESP32S3_PROCPU + help + This hidden configuration lets PROCPU core to map and start APPCPU whenever IPM is enabled. + +endmenu # AMP config + +endif # SOC_SERIES_ESP32S3 diff --git a/soc/espressif/esp32s3/Kconfig.defconfig b/soc/espressif/esp32s3/Kconfig.defconfig index 2d61a5cfa4b2d..110471dba6298 100644 --- a/soc/espressif/esp32s3/Kconfig.defconfig +++ b/soc/espressif/esp32s3/Kconfig.defconfig @@ -9,4 +9,7 @@ config FLASH_SIZE config FLASH_BASE_ADDRESS default $(dt_node_reg_addr_hex,/soc/flash-controller@60002000/flash@0) +config BOOTLOADER_MCUBOOT + default y if SOC_ESP32S3_APPCPU + endif # SOC_SERIES_ESP32S3 diff --git a/soc/espressif/esp32s3/default.ld b/soc/espressif/esp32s3/default.ld index 17d865cf526f9..b51f1d5282c7b 100644 --- a/soc/espressif/esp32s3/default.ld +++ b/soc/espressif/esp32s3/default.ld @@ -10,24 +10,16 @@ #include "memory.h" -/* The "user_iram_end" represents the 2nd stage bootloader - * "iram_loader_seg" start address (that should not be overlapped). - * If no bootloader is used, we can extend it to gain more user ram. - */ -#ifdef CONFIG_ESP_SIMPLE_BOOT -user_iram_end = (BOOTLOADER_USER_DRAM_END + IRAM_DRAM_OFFSET); -#else -user_iram_end = BOOTLOADER_IRAM_LOADER_SEG_START; -#endif - /* User available SRAM memory segments */ -user_dram_seg_org = SRAM1_DRAM_START; -user_iram_seg_org = SRAM0_IRAM_START + CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE; -user_dram_end = BOOTLOADER_IRAM_LOADER_SEG_START - IRAM_DRAM_OFFSET; -user_idram_size = user_dram_end - SRAM1_DRAM_START; -sram0_iram_size = SRAM0_SIZE - CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE; -user_iram_seg_len = user_idram_size + sram0_iram_size; -user_dram_seg_len = user_idram_size; +amp_total_size = APPCPU_SRAM_TOTAL_SIZE; +procpu_iram_end = USER_IRAM_END - APPCPU_SRAM_TOTAL_SIZE; +procpu_dram_end = USER_DRAM_END - APPCPU_SRAM_TOTAL_SIZE; + +procpu_iram_org = SRAM_USER_IRAM_START; +procpu_iram_len = procpu_iram_end - procpu_iram_org; + +procpu_dram_org = SRAM1_DRAM_START; +procpu_dram_len = procpu_dram_end - procpu_dram_org; /* Aliases */ #define FLASH_CODE_REGION irom0_0_seg @@ -36,6 +28,7 @@ user_dram_seg_len = user_idram_size; #define RAMABLE_REGION dram0_0_seg #define ROMABLE_REGION FLASH +/* Zephyr macro re-definitions */ #undef GROUP_DATA_LINK_IN #define GROUP_DATA_LINK_IN(vregion, lregion) > vregion AT > lregion @@ -66,14 +59,13 @@ MEMORY FLASH (R): org = 0x0, len = FLASH_SIZE - 0x100 #endif /* CONFIG_BOOTLOADER_MCUBOOT */ - iram0_0_seg(RX): org = user_iram_seg_org, len = user_iram_seg_len - APPCPU_IRAM_SIZE - dram0_0_seg(RW): org = user_dram_seg_org, len = user_dram_seg_len - APPCPU_DRAM_SIZE + iram0_0_seg(RX): org = procpu_iram_org, len = procpu_iram_len + dram0_0_seg(RW): org = procpu_dram_org, len = procpu_dram_len irom0_0_seg(RX): org = IROM_SEG_ORG, len = IROM_SEG_LEN drom0_0_seg(R): org = DROM_SEG_ORG, len = DROM_SEG_LEN - /** - * `ext_ram_seg` and `drom0_0_seg` share the same bus and the address region. + /* The `ext_ram_seg` and `drom0_0_seg` share the same bus and the address region. * A dummy section is used to avoid overlap. See `.ext_ram.dummy` in `sections.ld.in` */ #if defined(CONFIG_ESP_SPIRAM) @@ -101,11 +93,15 @@ MEMORY ENTRY(CONFIG_KERNEL_ENTRY) /* Used as a pointer to the heap end */ +#ifdef CONFIG_SOC_ENABLE_APPCPU +_heap_sentry = procpu_dram_end; +#else _heap_sentry = DRAM_RESERVED_START; +#endif SECTIONS { - _iram_dram_offset = IRAM_DRAM_OFFSET; + _iram_dram_offset = IRAM_DRAM_OFFSET; #ifdef CONFIG_BOOTLOADER_MCUBOOT /* Reserve space for MCUboot header in the binary */ @@ -116,6 +112,7 @@ SECTIONS QUAD(0x0) QUAD(0x0) } > mcuboot_hdr + /* Image load table */ .metadata : { /* 0. Magic byte for load header */ @@ -144,7 +141,6 @@ SECTIONS } > metadata #endif /* CONFIG_BOOTLOADER_MCUBOOT */ - /* Virtual non-loadable sections */ #include @@ -275,7 +271,9 @@ SECTIONS *(.entry.text) *(.init.literal) *(.init) + _init_end = ABSOLUTE(.); + } GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION) .iram0.text : ALIGN(4) @@ -310,6 +308,11 @@ SECTIONS *libphy.a:(.phyiram .phyiram.*) *libgcov.a:(.literal .text .literal.* .text.*) + /* APPCPU_ENABLED */ + *libzephyr.a:esp32s3-mp.*(.literal .text .literal.* .text.*) + *libzephyr.a:bootloader_flash.*(.literal .text .literal.* .text.*) + *libzephyr.a:flash_mmap.*(.literal .text .literal.* .text.*) + /* [mapping:esp_psram] */ *libzephyr.a:mmu_psram_flash.*(.literal .literal.* .text .text.*) *libzephyr.a:esp_psram_impl_quad.*(.literal .literal.* .text .text.*) @@ -550,6 +553,11 @@ SECTIONS *libzephyr.a:esp_mmu_map.*(.rodata .rodata.*) *libdrivers__interrupt_controller.a:(.rodata .rodata.*) + /* APPCPU_ENABLE */ + *libzephyr.a:esp32s3-mp.*(.rodata .rodata.*) + *libzephyr.a:bootloader_flash.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + *libzephyr.a:flash_mmap.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*) + /* [mapping:esp_psram] */ *libzephyr.a:mmu_psram_flash.*(.rodata .rodata.*) *libzephyr.a:esp_psram_impl_octal.*(.rodata .rodata.*) @@ -798,6 +806,10 @@ SECTIONS } GROUP_DATA_LINK_IN(FLASH_CODE_REGION, ROMABLE_REGION) + /* --- END OF IROM --- */ + + /* --- START OF DROM --- */ + /* This dummy section represents the .flash.text section but in default_rodata_seg. * Thus, it must have its alignment and (at least) its size. */ @@ -879,6 +891,10 @@ SECTIONS _image_rodata_end = ABSOLUTE(.); } GROUP_DATA_LINK_IN(RODATA_REGION, ROMABLE_REGION) + /* --- END OF DROM --- */ + + /* --- START OF SPIRAM --- */ + /** * This section is required to skip flash rodata sections, because `ext_ram_seg` * and `drom0_0_seg` are on the same bus @@ -907,8 +923,9 @@ SECTIONS #endif /* CONFIG_ESP_SPIRAM */ - /* --- XTENSA GLUE AND DEBUG BEGIN --- */ + /* --- END OF SPIRAM --- */ + /* --- XTENSA GLUE AND DEBUG BEGIN --- */ #ifdef CONFIG_GEN_ISR_TABLES #include #endif diff --git a/soc/espressif/esp32s3/default_appcpu.ld b/soc/espressif/esp32s3/default_appcpu.ld index 4641540db75e9..58ec051e389f9 100644 --- a/soc/espressif/esp32s3/default_appcpu.ld +++ b/soc/espressif/esp32s3/default_appcpu.ld @@ -1,5 +1,5 @@ /* - * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. * SPDX-License-Identifier: Apache-2.0 */ @@ -8,48 +8,121 @@ #include #include -#define SRAM_IRAM_START 0x40370000 -#define SRAM_DIRAM_I_START 0x40378000 -#define SRAM_IRAM_END 0x403BA000 -#define I_D_SRAM_OFFSET (SRAM_DIRAM_I_START - SRAM_DRAM_START) -#define DRAM_RESERVED_START 0x3fce9704 -#define IRAM_DRAM_OFFSET 0x6f0000 +#include "memory.h" -#define SRAM_DRAM_START 0x3FC88000 -#define SRAM_DRAM_END (SRAM_IRAM_END - I_D_SRAM_OFFSET) +/* User available SRAM memory segments */ +appcpu_iram_end = USER_IRAM_END; +appcpu_dram_end = USER_DRAM_END; -#define IRAM_REGION iram0_0_seg -#define RAMABLE_REGION dram0_0_seg -#define ROMABLE_REGION iram0_0_seg +appcpu_iram_org = appcpu_iram_end - APPCPU_SRAM_SIZE; +appcpu_dram_org = appcpu_dram_end - APPCPU_SRAM_SIZE; -#define IROM_SEG_ALIGN 0x4 +appcpu_iram_len = APPCPU_SRAM_SIZE; +appcpu_dram_len = APPCPU_SRAM_SIZE; + +/* Aliases */ +#define ROMABLE_REGION FLASH +#define RODATA_REGION dram0_1_seg /* drom0_1_seg */ +#define RAMABLE_REGION dram0_1_seg +#define IRAM_REGION iram0_1_seg + +/* Zephyr macro re-definitions */ +#undef GROUP_DATA_LINK_IN +#define GROUP_DATA_LINK_IN(vregion, lregion) > vregion AT > lregion + +#undef GROUP_NOLOAD_LINK_IN +#define GROUP_NOLOAD_LINK_IN(vregion, lregion) > vregion + +/* Flash segments (rodata and text) should be mapped in the virtual address spaces. + * Executing directly from LMA is not possible. */ +#undef GROUP_ROM_LINK_IN +#define GROUP_ROM_LINK_IN(vregion, lregion) > RODATA_REGION AT > lregion + +/* Make sure new sections have consistent alignment between input and output sections */ +#undef SECTION_DATA_PROLOGUE +#define SECTION_DATA_PROLOGUE(name, options, align) name options : ALIGN_WITH_INPUT + +#undef SECTION_PROLOGUE +#define SECTION_PROLOGUE SECTION_DATA_PROLOGUE MEMORY { - iram0_0_seg(RX): org = SRAM_IRAM_END - CONFIG_ESP32S3_APPCPU_IRAM, len = CONFIG_ESP32S3_APPCPU_IRAM - dram0_0_seg(RW): org = SRAM_DRAM_END - CONFIG_ESP32S3_APPCPU_DRAM, len = CONFIG_ESP32S3_APPCPU_DRAM +#ifdef CONFIG_BOOTLOADER_MCUBOOT + mcuboot_hdr (R): org = 0x0, len = 0x20 + metadata (R): org = 0x20, len = 0x20 + FLASH (R): org = 0x40, len = FLASH_SIZE - 0x40 +#else + /* Make safety margin in the FLASH memory size so the + * (esp_img_header + (n*esp_seg_headers)) would fit */ + FLASH (R): org = 0x0, len = FLASH_SIZE - 0x100 +#endif /* CONFIG_BOOTLOADER_MCUBOOT */ + + iram0_1_seg(RX): org = appcpu_iram_org, len = appcpu_iram_len + dram0_1_seg(RW): org = appcpu_dram_org, len = appcpu_dram_len + #ifdef CONFIG_GEN_ISR_TABLES IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000 #endif } /* Default entry point: */ -ENTRY(__app_cpu_start) +ENTRY(__appcpu_start) /* Used as a pointer to the heap end */ _heap_sentry = DRAM_RESERVED_START; SECTIONS { +#if defined(CONFIG_BOOTLOADER_MCUBOOT) + /* Reserve space for MCUboot header in the binary */ + .mcuboot_header : + { + QUAD(0x0) + QUAD(0x0) + QUAD(0x0) + QUAD(0x0) + } > mcuboot_hdr + /* Image load table */ + .metadata : + { + /* 0. Magic byte for load header */ + LONG(0xace637d3) + + /* 1. Application entry point address */ + KEEP(*(.entry_addr)) + + /* IRAM metadata: + * 2. Destination address (VMA) for IRAM region + * 3. Flash offset (LMA) for start of IRAM region + * 4. Size of IRAM region + */ + LONG(ADDR(.iram0.vectors)) + LONG(LOADADDR(.iram0.vectors)) + LONG(_iram_end - _init_start); + + /* DRAM metadata: + * 5. Destination address (VMA) for DRAM region + * 6. Flash offset (LMA) for start of DRAM region + * 7. Size of DRAM region + */ + LONG(ADDR(.dram0.data)) + LONG(LOADADDR(.dram0.data)) + LONG(_data_end - _data_start) + } > metadata +#endif /* CONFIG_BOOTLOADER_MCUBOOT */ + #include #ifdef CONFIG_LLEXT #include #endif - /* Send .iram0 code to iram */ + /* --- START OF IRAM --- */ + + /* Send .iram0 code to iram */ .iram0.vectors : ALIGN(4) { + _iram_start = ABSOLUTE(.); /* Vectors go to IRAM */ _init_start = ABSOLUTE(.); /* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */ @@ -83,15 +156,14 @@ SECTIONS *(.entry.text) *(.init.literal) *(.init) - . = ALIGN (4); + . = ALIGN (16); + _init_end = ABSOLUTE(.); - _iram_start = ABSOLUTE(.); - } GROUP_LINK_IN(IRAM_REGION) + } GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION) - SECTION_PROLOGUE(_TEXT_SECTION_NAME, , ALIGN(4)) + .iram0.text : ALIGN(4) { - /* Code marked as running out of IRAM */ _iram_text_start = ABSOLUTE(.); *(.iram1 .iram1.*) *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text) @@ -122,13 +194,104 @@ SECTIONS *libphy.a:(.phyiram .phyiram.*) *libgcov.a:(.literal .text .literal.* .text.*) + . = ALIGN(16); + + } GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION) + + .flash.text : ALIGN(16) + { + _stext = .; + _text_start = ABSOLUTE(.); + + *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.fini.literal) + *(.fini) + *(.gnu.version) + *(.literal .text .literal.* .text.*) + + /* CPU will try to prefetch up to 16 bytes of + * of instructions. This means that any configuration (e.g. MMU, PMS) must allow + * safe access to up to 16 bytes after the last real instruction, add + * dummy bytes to ensure this + */ + . += 16; + + _text_end = ABSOLUTE(.); + _etext = .; + + /* Similar to _iram_start, this symbol goes here so it is + * resolved by addr2line in preference to the first symbol in + * the flash.text segment. + */ + . = ALIGN(4); + _flash_cache_start = ABSOLUTE(0); + . = ALIGN(4); _iram_end = ABSOLUTE(.); - . = ALIGN(4) + 16; - } GROUP_LINK_IN(IRAM_REGION) + } GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION) + + /* --- END OF IRAM --- */ - SECTION_PROLOGUE(_RODATA_SECTION_NAME,,) + /* --- START OF DRAM --- */ + + .dram0.dummy (NOLOAD): + { + . = ORIGIN(dram0_1_seg) + MAX(_iram_end, appcpu_iram_org) - appcpu_iram_org; + . = ALIGN(16); + } GROUP_LINK_IN(RAMABLE_REGION) + + .dram0.data : + { + . = ALIGN (8); + __data_start = ABSOLUTE(.); + _data_start = ABSOLUTE(.); + + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + /* rodata for panic handler(libarch__xtensa__core.a) and all + * dependent functions should be placed in DRAM to avoid issue + * when flash cache is disabled */ + *libarch__xtensa__core.a:(.rodata .rodata.*) + *libkernel.a:fatal.*(.rodata .rodata.*) + *libkernel.a:init.*(.rodata .rodata.*) + *libzephyr.a:cbprintf_complete*(.rodata .rodata.*) + *libzephyr.a:systimer_hal.*(.rodata .rodata.*) + *libzephyr.a:log_core.*(.rodata .rodata.*) + *libzephyr.a:log_backend_uart.*(.rodata .rodata.*) + *libzephyr.a:log_output.*(.rodata .rodata.*) + *libzephyr.a:loader.*(.rodata .rodata.*) + *libdrivers__serial.a:uart_esp32.*(.rodata .rodata.*) + *libdrivers__flash.a:flash_esp32.*(.rodata .rodata.*) + + . = ALIGN(4); + #include + . = ALIGN(4); + + KEEP(*(.jcr)) + *(.dram1 .dram1.*) + . = ALIGN(16); + + } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION) + + #include + #include + #include + #include + #include + #include + + /* SECTION_PROLOGUE(_RODATA_SECTION_NAME,,) */ + .dram0.rodata : ALIGN(4) { _rodata_start = ABSOLUTE(.); @@ -140,8 +303,29 @@ SECTIONS #include . = ALIGN(4); - *(EXCLUDE_FILE (*libarch__xtensa__core.a:* *libkernel.a:fatal.* *libkernel.a:init.* *libzephyr.a:cbprintf_complete* *libzephyr.a:log_core.* *libzephyr.a:log_backend_uart.* *libzephyr.a:log_output.* *libzephyr.a:loader.* *libdrivers__serial.a:uart_esp32.*) .rodata) - *(EXCLUDE_FILE (*libarch__xtensa__core.a:* *libkernel.a:fatal.* *libkernel.a:init.* *libzephyr.a:cbprintf_complete* *libzephyr.a:log_core.* *libzephyr.a:log_backend_uart.* *libzephyr.a:log_output.* *libzephyr.a:loader.* *libdrivers__serial.a:uart_esp32.*) .rodata.*) + *(EXCLUDE_FILE ( + *libarch__xtensa__core.a:* + *libkernel.a:fatal.* + *libkernel.a:init.* + *libzephyr.a:cbprintf_complete* + *libzephyr.a:log_core.* + *libzephyr.a:log_backend_uart.* + *libzephyr.a:log_output.* + *libzephyr.a:loader.* + *libdrivers__serial.a:uart_esp32.*) .rodata) + + *(EXCLUDE_FILE ( + *libarch__xtensa__core.a:* + *libkernel.a:fatal.* + *libkernel.a:init.* + *libzephyr.a:cbprintf_complete* + *libzephyr.a:log_core.* + *libzephyr.a:log_backend_uart.* + *libzephyr.a:log_output.* + *libzephyr.a:loader.* + *libdrivers__serial.a:uart_esp32.*) .rodata.*) + + . = ALIGN(4); *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ *(.gnu.linkonce.r.*) @@ -183,13 +367,15 @@ SECTIONS _thread_local_end = ABSOLUTE(.); _rodata_reserved_end = ABSOLUTE(.); . = ALIGN(4); - } GROUP_DATA_LINK_IN(RAMABLE_REGION, IRAM_REGION) + } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION) /* Flash segments (rodata and text) should be mapped in virtual address space by providing VMA. * Executing directly from LMA is not possible. */ #pragma push_macro("GROUP_ROM_LINK_IN") #undef GROUP_ROM_LINK_IN #define GROUP_ROM_LINK_IN(vregion, lregion) > RAMABLE_REGION AT > lregion + + #include #include #include #include @@ -197,78 +383,37 @@ SECTIONS #include #include #include + #include + #include + #pragma pop_macro("GROUP_ROM_LINK_IN") /* Create an explicit section at the end of all the data that shall be mapped into drom. * This is used to calculate the size of the _image_drom_size variable */ - SECTION_PROLOGUE(_RODATA_SECTION_END,,) + /* SECTION_PROLOGUE(_RODATA_SECTION_END,,) */ + .dram0.rodata_end : ALIGN(0x10) { . = ALIGN(16); _image_rodata_end = ABSOLUTE(.); - } GROUP_DATA_LINK_IN(RAMABLE_REGION, IRAM_REGION) - -#include + } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION) - .dram0.data : - { - . = ALIGN (8); - __data_start = ABSOLUTE(.); - - *(.data) - *(.data.*) - *(.gnu.linkonce.d.*) - *(.data1) - *(.sdata) - *(.sdata.*) - *(.gnu.linkonce.s.*) - *(.sdata2) - *(.sdata2.*) - *(.gnu.linkonce.s2.*) - /* rodata for panic handler(libarch__xtensa__core.a) and all - * dependent functions should be placed in DRAM to avoid issue - * when flash cache is disabled */ - *libarch__xtensa__core.a:(.rodata .rodata.*) - *libkernel.a:fatal.*(.rodata .rodata.*) - *libkernel.a:init.*(.rodata .rodata.*) - *libzephyr.a:cbprintf_complete*(.rodata .rodata.*) - *libzephyr.a:systimer_hal.*(.rodata .rodata.*) - *libzephyr.a:log_core.*(.rodata .rodata.*) - *libzephyr.a:log_backend_uart.*(.rodata .rodata.*) - *libzephyr.a:log_output.*(.rodata .rodata.*) - *libzephyr.a:loader.*(.rodata .rodata.*) - *libdrivers__serial.a:uart_esp32.*(.rodata .rodata.*) - *libdrivers__flash.a:flash_esp32.*(.rodata .rodata.*) - - KEEP(*(.jcr)) - *(.dram1 .dram1.*) - . = ALIGN(4); - } GROUP_DATA_LINK_IN(RAMABLE_REGION, IRAM_REGION) - - #include - #include - #include - #include - #include - - /* logging sections should be placed in RAM area to avoid flash cache disabled issues */ - #pragma push_macro("GROUP_ROM_LINK_IN") - #undef GROUP_ROM_LINK_IN - #define GROUP_ROM_LINK_IN GROUP_DATA_LINK_IN - #include - #pragma pop_macro("GROUP_ROM_LINK_IN") .dram0.end : { - . = ALIGN(4); - - #include - - . = ALIGN(4); __data_end = ABSOLUTE(.); - } GROUP_DATA_LINK_IN(RAMABLE_REGION, IRAM_REGION) + _data_end = ABSOLUTE(.); + } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION) + + .dram0.noinit (NOLOAD): + { + . = ALIGN(8); + *(.noinit) + *(.noinit.*) + . = ALIGN(8) ; + } GROUP_LINK_IN(RAMABLE_REGION) /* Shared RAM */ - SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),) + .dram0.bss (NOLOAD) : { . = ALIGN (8); _bss_start = ABSOLUTE(.); /* required by bluetooth library */ @@ -296,45 +441,15 @@ SECTIONS _image_ram_start = _iram_start - IRAM_DRAM_OFFSET; #include - ASSERT(((__bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.") - - SECTION_DATA_PROLOGUE(_NOINIT_SECTION_NAME, (NOLOAD),) - { - . = ALIGN(8); - *(.noinit) - *(.noinit.*) - . = ALIGN(8) ; - } GROUP_LINK_IN(RAMABLE_REGION) - - .flash.text : ALIGN(IROM_SEG_ALIGN) - { - _stext = .; - _text_start = ABSOLUTE(.); - - *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) - *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.fini.literal) - *(.fini) - *(.gnu.version) - *(.literal .text .literal.* .text.*) + ASSERT(((__bss_end - ORIGIN(dram0_1_seg)) <= LENGTH(dram0_1_seg)), "DRAM segment data does not fit.") - /* CPU will try to prefetch up to 16 bytes of - * of instructions. This means that any configuration (e.g. MMU, PMS) must allow - * safe access to up to 16 bytes after the last real instruction, add - * dummy bytes to ensure this - */ - . += 16; + /* --- END OF DRAM --- */ - _text_end = ABSOLUTE(.); - _etext = .; + /* --- START OF IROM --- */ + /* --- END OF IROM --- */ - /* Similar to _iram_start, this symbol goes here so it is - * resolved by addr2line in preference to the first symbol in - * the flash.text segment. - */ - . = ALIGN(4); - _flash_cache_start = ABSOLUTE(0); - } GROUP_LINK_IN(IRAM_REGION) + /* --- START OF DROM --- */ + /* --- END OF DROM --- */ #ifdef CONFIG_GEN_ISR_TABLES #include @@ -375,8 +490,7 @@ SECTIONS KEEP (*(.xt.profile_files)) KEEP (*(.gnu.linkonce.xt.profile_files.*)) } - } -ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), +ASSERT(((_iram_end - ORIGIN(iram0_1_seg)) <= LENGTH(iram0_1_seg)), "IRAM0 segment data does not fit.") diff --git a/soc/espressif/esp32s3/esp32s3-mp.c b/soc/espressif/esp32s3/esp32s3-mp.c index 61e4d8d5812a4..8cae6d5e87cad 100644 --- a/soc/espressif/esp32s3/esp32s3-mp.c +++ b/soc/espressif/esp32s3/esp32s3-mp.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 */ @@ -8,19 +8,22 @@ #include #include #include +#include +#include #include #include -#include +#include "esp_rom_uart.h" -void smp_log(const char *msg) -{ - while (*msg) { - esp_rom_uart_tx_one_char(*msg++); - } - esp_rom_uart_tx_one_char('\r'); - esp_rom_uart_tx_one_char('\n'); -} +#include "esp_mcuboot_image.h" +#include "esp_memory_utils.h" + +#ifdef CONFIG_SOC_ENABLE_APPCPU + +#include "bootloader_flash_priv.h" + +#define sys_mmap bootloader_mmap +#define sys_munmap bootloader_munmap void esp_appcpu_start(void *entry_point) { @@ -35,7 +38,135 @@ void esp_appcpu_start(void *entry_point) esp_rom_ets_set_appcpu_boot_addr((void *)entry_point); - ets_delay_us(50000); + esp_cpu_reset(1); +} + +static int load_segment(uint32_t src_addr, uint32_t src_len, uint32_t dst_addr) +{ + const uint32_t *data = (const uint32_t *)sys_mmap(src_addr, src_len); + + if (!data) { + ets_printf("%s: mmap failed", __func__); + return -1; + } + + volatile uint32_t *dst = (volatile uint32_t *)dst_addr; + + for (int i = 0; i < src_len / 4; i++) { + dst[i] = data[i]; + } + + sys_munmap(data); + + return 0; +} + +int IRAM_ATTR esp_appcpu_image_load(unsigned int hdr_offset, unsigned int *entry_addr) +{ + const uint32_t img_off = FIXED_PARTITION_OFFSET(slot0_appcpu_partition); + const uint32_t fa_size = FIXED_PARTITION_SIZE(slot0_appcpu_partition); + const uint8_t fa_id = FIXED_PARTITION_ID(slot0_appcpu_partition); + int rc = 0; + + if (entry_addr == NULL) { + ets_printf("Can't return the entry address. Aborting!\n"); + abort(); + return -1; + } + + ets_printf("Loading appcpu image, area id: %d, offset: 0x%x, hdr.off: 0x%x, size: %d kB\n", + fa_id, img_off, hdr_offset, fa_size / 1024); + + uint32_t mcuboot_header[8] = {0}; + esp_image_load_header_t image_header = {0}; + + const uint32_t *data = (const uint32_t *)sys_mmap(img_off, 0x40); + + memcpy((void *)&mcuboot_header, data, sizeof(mcuboot_header)); + memcpy((void *)&image_header, data + (hdr_offset / sizeof(uint32_t)), + sizeof(esp_image_load_header_t)); + + sys_munmap(data); + + if (image_header.header_magic == ESP_LOAD_HEADER_MAGIC) { + ets_printf("MCUboot image format\n"); + } else if ((image_header.header_magic & 0xff) == 0xE9) { + ets_printf("ESP image format is not supported\n"); + abort(); + } else { + ets_printf("Unknown or empty image detected. Aborting!\n"); + abort(); + } + + if (!esp_ptr_in_iram((void *)image_header.iram_dest_addr) || + !esp_ptr_in_iram((void *)(image_header.iram_dest_addr + image_header.iram_size))) { + ets_printf("IRAM region in load header is not valid. Aborting"); + abort(); + } + + if (!esp_ptr_in_dram((void *)image_header.dram_dest_addr) || + !esp_ptr_in_dram((void *)(image_header.dram_dest_addr + image_header.dram_size))) { + ets_printf("DRAM region in load header is not valid. Aborting"); + abort(); + } + + if (!esp_ptr_in_iram((void *)image_header.entry_addr)) { + ets_printf("Application entry point (%xh) is not in IRAM. Aborting", + image_header.entry_addr); + abort(); + } + + ets_printf("IRAM segment: paddr=%08xh, vaddr=%08xh, size=%05xh (%6d) load\n", + (img_off + image_header.iram_flash_offset), image_header.iram_dest_addr, + image_header.iram_size, image_header.iram_size); + + load_segment(img_off + image_header.iram_flash_offset, image_header.iram_size, + image_header.iram_dest_addr); + + ets_printf("DRAM segment: paddr=%08xh, vaddr=%08xh, size=%05xh (%6d) load\n", + (img_off + image_header.dram_flash_offset), image_header.dram_dest_addr, + image_header.dram_size, image_header.dram_size); + + load_segment(img_off + image_header.dram_flash_offset, image_header.dram_size, + image_header.dram_dest_addr); + + ets_printf("Application start=%xh\n", image_header.entry_addr); + esp_rom_uart_tx_wait_idle(0); + + assert(entry_addr != NULL); + *entry_addr = image_header.entry_addr; + + return rc; +} + +void esp_appcpu_image_stop(void) +{ + esp_cpu_stall(1); +} + +void esp_appcpu_image_start(unsigned int hdr_offset) +{ + static int started; + unsigned int entry_addr = 0; + + if (started) { + printk("APPCPU already started.\r\n"); + return; + } + + /* Input image meta header, output appcpu entry point */ + esp_appcpu_image_load(hdr_offset, &entry_addr); + + esp_appcpu_start((void *)entry_addr); +} + +int esp_appcpu_init(void) +{ + /* Load APPCPU image using image header offset + * (skipping the MCUBoot header) + */ + esp_appcpu_image_start(0x20); - smp_log("ESP32S3: CPU1 start sequence complete"); + return 0; } +#endif /* CONFIG_SOC_ENABLE_APPCPU */ diff --git a/soc/espressif/esp32s3/memory.h b/soc/espressif/esp32s3/memory.h index 0283c51fe0d55..f3e22a0451375 100644 --- a/soc/espressif/esp32s3/memory.h +++ b/soc/espressif/esp32s3/memory.h @@ -4,17 +4,19 @@ */ #pragma once -/* SRAM0 (64k), SRAM1 (416k), SRAM2 (64k) memories +/* SRAM0 (32k), SRAM1 (416k), SRAM2 (64k) memories * Ibus and Dbus address space */ -#define SRAM0_IRAM_START 0x40370000 -#define SRAM0_SIZE 0x8000 -#define SRAM1_DRAM_START 0x3fc88000 +#define SRAM0_IRAM_START 0x40370000 +#define SRAM0_SIZE 0x8000 +#define SRAM1_DRAM_START 0x3fc88000 +#define SRAM1_IRAM_START 0x40378000 +#define SRAM_USER_IRAM_START (SRAM0_IRAM_START + CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE) -/* IRAM equivalent address where DRAM actually start */ -#define SRAM1_IRAM_START (SRAM0_IRAM_START + SRAM0_SIZE) -#define SRAM2_DRAM_START 0x3fcf0000 -#define SRAM2_SIZE 0x10000 +#define SRAM2_DRAM_START 0x3fcf0000 +#define SRAM2_SIZE 0x10000 +#define SRAM2_USER_DRAM_START (SRAM2_DRAM_START + CONFIG_ESP32S3_DATA_CACHE_SIZE) +#define SRAM2_USER_DRAM_SIZE (SRAM2_SIZE - CONFIG_ESP32S3_DATA_CACHE_SIZE) /** Simplified memory map for the bootloader. * Make sure the bootloader can load into main memory without overwriting itself. @@ -43,24 +45,51 @@ /* Set the limit for the application runtime dynamic allocations */ #define DRAM_RESERVED_START DRAM_BUFFERS_END -/* Base address used for calculating memory layout - * counted from Dbus backwards and back to the Ibus - */ -#define BOOTLOADER_USER_DRAM_END DRAM_BUFFERS_START - /* For safety margin between bootloader data section and startup stacks */ #define BOOTLOADER_STACK_OVERHEAD 0x0 #define BOOTLOADER_DRAM_SEG_LEN 0x15000 #define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x1a00 #define BOOTLOADER_IRAM_SEG_LEN 0xc000 +/* Base address used for calculating memory layout + * counted from Dbus backwards and back to the Ibus + */ +#define BOOTLOADER_USER_DRAM_END (DRAM_BUFFERS_START - BOOTLOADER_STACK_OVERHEAD) + /* Start of the lower region is determined by region size and the end of the higher region */ -#define BOOTLOADER_IRAM_LOADER_SEG_START (BOOTLOADER_USER_DRAM_END - BOOTLOADER_STACK_OVERHEAD + \ - IRAM_DRAM_OFFSET - BOOTLOADER_IRAM_LOADER_SEG_LEN) +#define BOOTLOADER_IRAM_LOADER_SEG_START \ + (BOOTLOADER_USER_DRAM_END - BOOTLOADER_IRAM_LOADER_SEG_LEN + IRAM_DRAM_OFFSET) #define BOOTLOADER_IRAM_SEG_START (BOOTLOADER_IRAM_LOADER_SEG_START - BOOTLOADER_IRAM_SEG_LEN) #define BOOTLOADER_DRAM_SEG_END (BOOTLOADER_IRAM_SEG_START - IRAM_DRAM_OFFSET) #define BOOTLOADER_DRAM_SEG_START (BOOTLOADER_DRAM_SEG_END - BOOTLOADER_DRAM_SEG_LEN) +/* The "USER_IRAM_END" represents the end of staticaly allocated memory. + * This address is where 2nd stage bootloader starts allocating memory, + * and it should not be overlapped by the user image. + * When there is no 2nd stage bootloader the bootstrapping is done + * by the so-called SIMPLE_BOOT. + */ +#ifdef CONFIG_ESP_SIMPLE_BOOT +#define USER_DRAM_END BOOTLOADER_USER_DRAM_END +#else +#define USER_DRAM_END (BOOTLOADER_IRAM_LOADER_SEG_START - IRAM_DRAM_OFFSET) +#endif +#define USER_IRAM_END (USER_DRAM_END + IRAM_DRAM_OFFSET) + +/* AMP */ +#if defined(CONFIG_SOC_ENABLE_APPCPU) || defined(CONFIG_SOC_ESP32S3_APPCPU) +#define APPCPU_IRAM_SIZE CONFIG_ESP32S3_APPCPU_IRAM_SIZE +#define APPCPU_DRAM_SIZE CONFIG_ESP32S3_APPCPU_DRAM_SIZE +#define AMP_COMM_SIZE (0x4000 + 0x400) +#else +#define APPCPU_IRAM_SIZE 0 +#define APPCPU_DRAM_SIZE 0 +#define AMP_COMM_SIZE 0 +#endif + +#define APPCPU_SRAM_SIZE (APPCPU_IRAM_SIZE + APPCPU_DRAM_SIZE) +#define APPCPU_SRAM_TOTAL_SIZE (APPCPU_SRAM_SIZE + AMP_COMM_SIZE) + /* Flash */ #ifdef CONFIG_FLASH_SIZE #define FLASH_SIZE CONFIG_FLASH_SIZE @@ -74,12 +103,3 @@ #define IROM_SEG_LEN FLASH_SIZE #define DROM_SEG_ORG 0x3c000000 #define DROM_SEG_LEN FLASH_SIZE - -/* AMP */ -#ifdef CONFIG_SOC_ENABLE_APPCPU -#define APPCPU_IRAM_SIZE CONFIG_ESP32S3_APPCPU_IRAM -#define APPCPU_DRAM_SIZE CONFIG_ESP32S3_APPCPU_DRAM -#else -#define APPCPU_IRAM_SIZE 0 -#define APPCPU_DRAM_SIZE 0 -#endif diff --git a/soc/espressif/esp32s3/soc.c b/soc/espressif/esp32s3/soc.c index a1349b61db01b..80a02696fe049 100644 --- a/soc/espressif/esp32s3/soc.c +++ b/soc/espressif/esp32s3/soc.c @@ -47,49 +47,14 @@ #include #include "esp_log.h" +#include +#include + #define TAG "boot.esp32s3" extern void z_prep_c(void); extern void esp_reset_reason_init(void); - -#ifdef CONFIG_SOC_ENABLE_APPCPU -extern const unsigned char esp32s3_appcpu_fw_array[]; - -void IRAM_ATTR esp_start_appcpu(void) -{ - esp_image_header_t *header = (esp_image_header_t *)&esp32s3_appcpu_fw_array[0]; - esp_image_segment_header_t *segment = - (esp_image_segment_header_t *)&esp32s3_appcpu_fw_array[sizeof(esp_image_header_t)]; - uint8_t *segment_payload; - uint32_t entry_addr = header->entry_addr; - uint32_t idx = sizeof(esp_image_header_t) + sizeof(esp_image_segment_header_t); - - for (int i = 0; i < header->segment_count; i++) { - segment_payload = (uint8_t *)&esp32s3_appcpu_fw_array[idx]; - - if (segment->load_addr >= SOC_IRAM_LOW && segment->load_addr < SOC_IRAM_HIGH) { - /* IRAM segment only accepts 4 byte access, avoid memcpy usage here */ - volatile uint32_t *src = (volatile uint32_t *)segment_payload; - volatile uint32_t *dst = (volatile uint32_t *)segment->load_addr; - - for (int i = 0; i < segment->data_len / 4; i++) { - dst[i] = src[i]; - } - - } else if (segment->load_addr >= SOC_DRAM_LOW && - segment->load_addr < SOC_DRAM_HIGH) { - memcpy((void *)segment->load_addr, (const void *)segment_payload, - segment->data_len); - } - - idx += segment->data_len; - segment = (esp_image_segment_header_t *)&esp32s3_appcpu_fw_array[idx]; - idx += sizeof(esp_image_segment_header_t); - } - - esp_appcpu_start((void *)entry_addr); -} -#endif /* CONFIG_SOC_ENABLE_APPCPU*/ +extern int esp_appcpu_init(void); #ifndef CONFIG_MCUBOOT /* @@ -175,11 +140,6 @@ void IRAM_ATTR __esp_platform_start(void) esp_init_psram(); #endif /* CONFIG_ESP_SPIRAM */ -#if CONFIG_SOC_ENABLE_APPCPU - /* start the ESP32S3 APP CPU */ - esp_start_appcpu(); -#endif - #endif /* !CONFIG_MCUBOOT */ esp_intr_initialize(); @@ -213,3 +173,8 @@ void sys_arch_reboot(int type) { esp_restart_noos(); } + +#if defined(CONFIG_SOC_ENABLE_APPCPU) && !defined(CONFIG_MCUBOOT) +extern int esp_appcpu_init(void); +SYS_INIT(esp_appcpu_init, POST_KERNEL, 50); +#endif diff --git a/soc/espressif/esp32s3/soc_appcpu.c b/soc/espressif/esp32s3/soc_appcpu.c index 6ca213557ced0..a03304c87519e 100644 --- a/soc/espressif/esp32s3/soc_appcpu.c +++ b/soc/espressif/esp32s3/soc_appcpu.c @@ -33,6 +33,11 @@ #include #include +#define HDR_ATTR __attribute__((section(".entry_addr"))) __attribute__((used)) + +void __appcpu_start(void); +static HDR_ATTR void (*_entry_point)(void) = &__appcpu_start; + extern void z_prep_c(void); static void core_intr_matrix_clear(void) @@ -44,7 +49,7 @@ static void core_intr_matrix_clear(void) } } -void IRAM_ATTR __app_cpu_start(void) +void IRAM_ATTR __appcpu_start(void) { extern uint32_t _init_start; diff --git a/west.yml b/west.yml index f6c0a3b09f380..d068140a23c8c 100644 --- a/west.yml +++ b/west.yml @@ -157,7 +157,7 @@ manifest: groups: - hal - name: hal_espressif - revision: 23c17a8735d3047da95e3a81adafa36425636c55 + revision: 174547ef6a97dafcd6786ecd171cc701f5c0893b path: modules/hal/espressif west-commands: west/west-commands.yml groups: