diff --git a/boards/nordic/nrf54l15dk/Kconfig.defconfig b/boards/nordic/nrf54l15dk/Kconfig.defconfig index 2b753df35151b..cbb822eec9c8a 100644 --- a/boards/nordic/nrf54l15dk/Kconfig.defconfig +++ b/boards/nordic/nrf54l15dk/Kconfig.defconfig @@ -1,7 +1,8 @@ # Copyright (c) 2024 Nordic Semiconductor ASA # SPDX-License-Identifier: Apache-2.0 -if BOARD_NRF54L15DK_NRF54L15_CPUAPP +if BOARD_NRF54L15DK_NRF54L05_CPUAPP || BOARD_NRF54L15DK_NRF54L10_CPUAPP || \ + BOARD_NRF54L15DK_NRF54L15_CPUAPP config BT_CTLR default BT @@ -9,4 +10,5 @@ config BT_CTLR config ROM_START_OFFSET default 0x800 if BOOTLOADER_MCUBOOT -endif # BOARD_NRF54L15DK_NRF54L15_CPUAPP +endif # BOARD_NRF54L15DK_NRF54L05_CPUAPP || BOARD_NRF54L15DK_NRF54L10_CPUAPP || \ + # BOARD_NRF54L15DK_NRF54L15_CPUAPP diff --git a/boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk b/boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk index e385ef84f8917..25472cfff6c47 100644 --- a/boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk +++ b/boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk @@ -2,6 +2,8 @@ # SPDX-License-Identifier: Apache-2.0 config BOARD_NRF54L15DK + select SOC_NRF54L05_CPUAPP if BOARD_NRF54L15DK_NRF54L05_CPUAPP + select SOC_NRF54L10_CPUAPP if BOARD_NRF54L15DK_NRF54L10_CPUAPP select SOC_NRF54L15_CPUAPP if BOARD_NRF54L15DK_NRF54L15_CPUAPP select SOC_NRF54L15_CPUFLPR if BOARD_NRF54L15DK_NRF54L15_CPUFLPR || \ BOARD_NRF54L15DK_NRF54L15_CPUFLPR_XIP diff --git a/boards/nordic/nrf54l15dk/board.yml b/boards/nordic/nrf54l15dk/board.yml index 8d750b3d14b9e..f1a873cc35f42 100644 --- a/boards/nordic/nrf54l15dk/board.yml +++ b/boards/nordic/nrf54l15dk/board.yml @@ -3,6 +3,8 @@ board: full_name: nRF54L15 DK vendor: nordic socs: + - name: nrf54l05 + - name: nrf54l10 - name: nrf54l15 variants: - name: xip diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15-common.dtsi b/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi similarity index 97% rename from boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15-common.dtsi rename to boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi index 02170276476af..33cfebb55d6e6 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15-common.dtsi +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "nrf54l15dk_nrf54l15-pinctrl.dtsi" +#include "nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi" / { leds { diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts new file mode 100644 index 0000000000000..e2215ce129491 --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "nrf54l_05_10_15_cpuapp_common.dtsi" + +/ { + compatible = "nordic,nrf54l15dk_nrf54l05-cpuapp"; + model = "Nordic nRF54L15 DK nRF54L05 Application MCU"; + + chosen { + zephyr,code-partition = &slot0_partition; + zephyr,sram = &cpuapp_sram; + }; +}; + +/* FLPR not supported yet, give all SRAM and RRAM to the APP core */ +&cpuapp_sram { + reg = <0x20000000 DT_SIZE_K(96)>; + ranges = <0x0 0x20000000 DT_SIZE_K(96)>; +}; + +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(500)>; +}; + +/* These partition sizes assume no FLPR area in RRAM */ +&cpuapp_rram { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(64)>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x10000 DT_SIZE_K(100)>; + }; + slot0_ns_partition: partition@29000 { + label = "image-0-nonsecure"; + reg = <0x29000 DT_SIZE_K(100)>; + }; + slot1_partition: partition@42000 { + label = "image-1"; + reg = <0x42000 DT_SIZE_K(100)>; + }; + slot1_ns_partition: partition@5b000 { + label = "image-1-nonsecure"; + reg = <0x5b000 DT_SIZE_K(100)>; + }; + storage_partition: partition@74000 { + label = "storage"; + reg = <0x74000 DT_SIZE_K(36)>; + }; + }; +}; diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.yaml b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.yaml new file mode 100644 index 0000000000000..0c451b19a2efd --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.yaml @@ -0,0 +1,24 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +identifier: nrf54l15dk/nrf54l05/cpuapp +name: nRF54L15-DK-nRF54L05-Application +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +sysbuild: true +ram: 96 +flash: 100 +supported: + - adc + - counter + - gpio + - i2c + - pwm + - retained_mem + - spi + - watchdog + - i2s diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp_defconfig b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp_defconfig new file mode 100644 index 0000000000000..02796a1361ef9 --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp_defconfig @@ -0,0 +1,29 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable GPIO +CONFIG_GPIO=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# MPU-based null-pointer dereferencing detection cannot +# be applied as the (0x0 - 0x400) is unmapped for this target. +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y + +# Enable Cache +CONFIG_CACHE_MANAGEMENT=y +CONFIG_EXTERNAL_CACHE=y + +# Start SYSCOUNTER on driver init +CONFIG_NRF_GRTC_START_SYSCOUNTER=y diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.dts b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.dts new file mode 100644 index 0000000000000..1ae6be3e9e9c0 --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.dts @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "nrf54l_05_10_15_cpuapp_common.dtsi" + +/ { + compatible = "nordic,nrf54l15dk_nrf54l10-cpuapp"; + model = "Nordic nRF54L15 DK nRF54L10 Application MCU"; + + chosen { + zephyr,code-partition = &slot0_partition; + zephyr,sram = &cpuapp_sram; + }; +}; + +/* FLPR not supported yet, give all SRAM and RRAM to the APP core */ +&cpuapp_sram { + reg = <0x20000000 DT_SIZE_K(192)>; + ranges = <0x0 0x20000000 DT_SIZE_K(192)>; +}; + +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(1022)>; +}; + +/* These partition sizes assume no FLPR area in RRAM */ +&cpuapp_rram { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(64)>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x10000 DT_SIZE_K(230)>; + }; + slot0_ns_partition: partition@49800 { + label = "image-0-nonsecure"; + reg = <0x49800 DT_SIZE_K(230)>; + }; + slot1_partition: partition@83000 { + label = "image-1"; + reg = <0x83000 DT_SIZE_K(230)>; + }; + slot1_ns_partition: partition@bc800 { + label = "image-1-nonsecure"; + reg = <0xbc800 DT_SIZE_K(230)>; + }; + storage_partition: partition@f6000 { + label = "storage"; + reg = <0xf6000 DT_SIZE_K(38)>; + }; + }; +}; diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.yaml b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.yaml new file mode 100644 index 0000000000000..63afb059b9361 --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.yaml @@ -0,0 +1,24 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +identifier: nrf54l15dk/nrf54l10/cpuapp +name: nRF54L15-DK-nRF54L10-Application +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +sysbuild: true +ram: 192 +flash: 230 +supported: + - adc + - counter + - gpio + - i2c + - pwm + - retained_mem + - spi + - watchdog + - i2s diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp_defconfig b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp_defconfig new file mode 100644 index 0000000000000..02796a1361ef9 --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp_defconfig @@ -0,0 +1,29 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable GPIO +CONFIG_GPIO=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# MPU-based null-pointer dereferencing detection cannot +# be applied as the (0x0 - 0x400) is unmapped for this target. +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y + +# Enable Cache +CONFIG_CACHE_MANAGEMENT=y +CONFIG_EXTERNAL_CACHE=y + +# Start SYSCOUNTER on driver init +CONFIG_NRF_GRTC_START_SYSCOUNTER=y diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts index b71f55c5fb439..79b16bd41254e 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts @@ -6,7 +6,8 @@ /dts-v1/; -#include "nrf54l15_cpuapp_common.dtsi" +#include +#include "nrf54l_05_10_15_cpuapp_common.dtsi" / { compatible = "nordic,nrf54l15dk_nrf54l15-cpuapp"; @@ -17,3 +18,36 @@ zephyr,sram = &cpuapp_sram; }; }; + +&cpuapp_rram { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(64)>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x10000 DT_SIZE_K(324)>; + }; + slot0_ns_partition: partition@61000 { + label = "image-0-nonsecure"; + reg = <0x61000 DT_SIZE_K(324)>; + }; + slot1_partition: partition@b2000 { + label = "image-1"; + reg = <0xb2000 DT_SIZE_K(324)>; + }; + slot1_ns_partition: partition@103000 { + label = "image-1-nonsecure"; + reg = <0x103000 DT_SIZE_K(324)>; + }; + /* 32k from 0x154000 to 0x15bfff reserved for TF-M partitions */ + storage_partition: partition@15c000 { + label = "storage"; + reg = <0x15c000 DT_SIZE_K(36)>; + }; + }; +}; diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuflpr.dts b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuflpr.dts index 472e3f2b8d38b..2bc4ba292bed6 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuflpr.dts +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuflpr.dts @@ -6,7 +6,7 @@ /dts-v1/; #include -#include "nrf54l15dk_nrf54l15-common.dtsi" +#include "nrf54l15dk_common.dtsi" / { model = "Nordic nRF54L15 DK nRF54L15 FLPR MCU"; diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15-pinctrl.dtsi b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi similarity index 100% rename from boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15-pinctrl.dtsi rename to boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi diff --git a/boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi b/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi similarity index 68% rename from boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi rename to boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi index 191babb632f6e..323ebfd1a1b7f 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi +++ b/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi @@ -6,8 +6,7 @@ /* This file is common to the secure and non-secure domain */ -#include -#include "nrf54l15dk_nrf54l15-common.dtsi" +#include "nrf54l15dk_common.dtsi" / { chosen { @@ -52,39 +51,6 @@ status = "okay"; }; -&cpuapp_rram { - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x0 DT_SIZE_K(64)>; - }; - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x10000 DT_SIZE_K(324)>; - }; - slot0_ns_partition: partition@61000 { - label = "image-0-nonsecure"; - reg = <0x61000 DT_SIZE_K(324)>; - }; - slot1_partition: partition@b2000 { - label = "image-1"; - reg = <0xb2000 DT_SIZE_K(324)>; - }; - slot1_ns_partition: partition@103000 { - label = "image-1-nonsecure"; - reg = <0x103000 DT_SIZE_K(324)>; - }; - /* 32k from 0x154000 to 0x15bfff reserved for TF-M partitions */ - storage_partition: partition@15c000 { - label = "storage"; - reg = <0x15c000 DT_SIZE_K(36)>; - }; - }; -}; - &uart20 { status = "okay"; }; diff --git a/drivers/misc/nordic_vpr_launcher/nordic_vpr_launcher.c b/drivers/misc/nordic_vpr_launcher/nordic_vpr_launcher.c index c688a97f65458..2c2915a798438 100644 --- a/drivers/misc/nordic_vpr_launcher/nordic_vpr_launcher.c +++ b/drivers/misc/nordic_vpr_launcher/nordic_vpr_launcher.c @@ -14,7 +14,7 @@ #include #include -#if defined(CONFIG_SOC_NRF54L15_CPUAPP) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) +#if defined(CONFIG_SOC_NRF54L_CPUAPP_COMMON) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) #include #endif @@ -41,7 +41,7 @@ static int nordic_vpr_launcher_init(const struct device *dev) } #endif -#if defined(CONFIG_SOC_NRF54L15_CPUAPP) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) +#if defined(CONFIG_SOC_NRF54L_CPUAPP_COMMON) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) nrf_spu_periph_perm_secattr_set(NRF_SPU00, nrf_address_slave_get((uint32_t)config->vpr), true); #endif diff --git a/dts/arm/nordic/nrf54l05_cpuapp.dtsi b/dts/arm/nordic/nrf54l05_cpuapp.dtsi new file mode 100644 index 0000000000000..45bdfea1f9c66 --- /dev/null +++ b/dts/arm/nordic/nrf54l05_cpuapp.dtsi @@ -0,0 +1,8 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include "nrf54l_05_10_15_cpuapp.dtsi" diff --git a/dts/arm/nordic/nrf54l10_cpuapp.dtsi b/dts/arm/nordic/nrf54l10_cpuapp.dtsi new file mode 100644 index 0000000000000..cf8bc6ab5ea02 --- /dev/null +++ b/dts/arm/nordic/nrf54l10_cpuapp.dtsi @@ -0,0 +1,8 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include "nrf54l_05_10_15_cpuapp.dtsi" diff --git a/dts/arm/nordic/nrf54l15_cpuapp.dtsi b/dts/arm/nordic/nrf54l15_cpuapp.dtsi index 458d5a2e12acb..59ffca714dd65 100644 --- a/dts/arm/nordic/nrf54l15_cpuapp.dtsi +++ b/dts/arm/nordic/nrf54l15_cpuapp.dtsi @@ -5,84 +5,4 @@ */ #include - -cpu: &cpuapp {}; -systick: &cpuapp_systick {}; -nvic: &cpuapp_nvic {}; - -/delete-node/ &cpuflpr; -/delete-node/ &cpuflpr_rram; -/delete-node/ &cpuflpr_sram; -/delete-node/ &cpuflpr_clic; - -/ { - chosen { - zephyr,bt-hci = &bt_hci_controller; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&cpuapp_nvic>; - ranges; - }; - - psa_rng: psa-rng { - compatible = "zephyr,psa-crypto-rng"; - status = "disabled"; - }; -}; - -&bt_hci_controller { - status = "okay"; -}; - -&cpuflpr_vpr { - cpuapp_vevif_rx: mailbox@1 { - compatible = "nordic,nrf-vevif-event-rx"; - reg = <0x0 0x1000>; - status = "disabled"; - interrupts = <76 NRF_DEFAULT_IRQ_PRIORITY>; - #mbox-cells = <1>; - nordic,events = <1>; - nordic,events-mask = <0x00100000>; - }; - - cpuapp_vevif_tx: mailbox@0 { - compatible = "nordic,nrf-vevif-task-tx"; - reg = <0x0 0x1000>; - #mbox-cells = <1>; - nordic,tasks = <7>; - nordic,tasks-mask = <0x007f0000>; - status = "disabled"; - }; -}; - -&cpuapp_ppb { - compatible = "simple-bus"; - ranges; -}; - -&grtc { -#ifdef USE_NON_SECURE_ADDRESS_MAP - interrupts = <227 NRF_DEFAULT_IRQ_PRIORITY>, -#else - interrupts = <228 NRF_DEFAULT_IRQ_PRIORITY>, -#endif - <229 NRF_DEFAULT_IRQ_PRIORITY>; /* reserved for Zero Latency IRQs */ -}; - -&gpiote20 { -#ifdef USE_NON_SECURE_ADDRESS_MAP - interrupts = <218 NRF_DEFAULT_IRQ_PRIORITY>; -#else - interrupts = <219 NRF_DEFAULT_IRQ_PRIORITY>; -#endif -}; - -&gpiote30 { -#ifdef USE_NON_SECURE_ADDRESS_MAP - interrupts = <268 NRF_DEFAULT_IRQ_PRIORITY>; -#else - interrupts = <269 NRF_DEFAULT_IRQ_PRIORITY>; -#endif -}; +#include "nrf54l_05_10_15_cpuapp.dtsi" diff --git a/dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi b/dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi new file mode 100644 index 0000000000000..33b0d2cd4536a --- /dev/null +++ b/dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +cpu: &cpuapp {}; +systick: &cpuapp_systick {}; +nvic: &cpuapp_nvic {}; + +/delete-node/ &cpuflpr; +/delete-node/ &cpuflpr_rram; +/delete-node/ &cpuflpr_sram; +/delete-node/ &cpuflpr_clic; + +/ { + chosen { + zephyr,bt-hci = &bt_hci_controller; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&cpuapp_nvic>; + ranges; + }; + + psa_rng: psa-rng { + compatible = "zephyr,psa-crypto-rng"; + status = "disabled"; + }; +}; + +&bt_hci_controller { + status = "okay"; +}; + +&cpuflpr_vpr { + cpuapp_vevif_rx: mailbox@1 { + compatible = "nordic,nrf-vevif-event-rx"; + reg = <0x0 0x1000>; + status = "disabled"; + interrupts = <76 NRF_DEFAULT_IRQ_PRIORITY>; + #mbox-cells = <1>; + nordic,events = <1>; + nordic,events-mask = <0x00100000>; + }; + + cpuapp_vevif_tx: mailbox@0 { + compatible = "nordic,nrf-vevif-task-tx"; + reg = <0x0 0x1000>; + #mbox-cells = <1>; + nordic,tasks = <7>; + nordic,tasks-mask = <0x007f0000>; + status = "disabled"; + }; +}; + +&cpuapp_ppb { + compatible = "simple-bus"; + ranges; +}; + +&grtc { +#ifdef USE_NON_SECURE_ADDRESS_MAP + interrupts = <227 NRF_DEFAULT_IRQ_PRIORITY>, +#else + interrupts = <228 NRF_DEFAULT_IRQ_PRIORITY>, +#endif + <229 NRF_DEFAULT_IRQ_PRIORITY>; /* reserved for Zero Latency IRQs */ +}; + +&gpiote20 { +#ifdef USE_NON_SECURE_ADDRESS_MAP + interrupts = <218 NRF_DEFAULT_IRQ_PRIORITY>; +#else + interrupts = <219 NRF_DEFAULT_IRQ_PRIORITY>; +#endif +}; + +&gpiote30 { +#ifdef USE_NON_SECURE_ADDRESS_MAP + interrupts = <268 NRF_DEFAULT_IRQ_PRIORITY>; +#else + interrupts = <269 NRF_DEFAULT_IRQ_PRIORITY>; +#endif +}; diff --git a/dts/common/nordic/nrf54l05.dtsi b/dts/common/nordic/nrf54l05.dtsi new file mode 100644 index 0000000000000..747fea0c54983 --- /dev/null +++ b/dts/common/nordic/nrf54l05.dtsi @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "nrf54l_05_10_15.dtsi" + +&cpuapp_sram { + reg = <0x20000000 DT_SIZE_K(72)>; + ranges = <0x0 0x20000000 DT_SIZE_K(72)>; +}; + +/* 72 + 24 = 96KB */ +/ { + soc { + cpuflpr_sram: memory@20012000 { + compatible = "mmio-sram"; + reg = <0x20012000 DT_SIZE_K(24)>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20012000 DT_SIZE_K(24)>; + }; + }; +}; + +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(470)>; +}; + +/* 470 + 30 = 500KB */ +&rram_controller { + cpuflpr_rram: rram@75800 { + compatible = "soc-nv-flash"; + reg = <0x75800 DT_SIZE_K(30)>; + erase-block-size = <4096>; + write-block-size = <16>; + }; +}; diff --git a/dts/common/nordic/nrf54l10.dtsi b/dts/common/nordic/nrf54l10.dtsi new file mode 100644 index 0000000000000..a515fbb42f531 --- /dev/null +++ b/dts/common/nordic/nrf54l10.dtsi @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "nrf54l_05_10_15.dtsi" + +&cpuapp_sram { + reg = <0x20000000 DT_SIZE_K(144)>; + ranges = <0x0 0x20000000 DT_SIZE_K(144)>; +}; + +/* 144 + 48 = 192KB */ +/ { + soc { + cpuflpr_sram: memory@20024000 { + compatible = "mmio-sram"; + reg = <0x20024000 DT_SIZE_K(48)>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20024000 DT_SIZE_K(48)>; + }; + }; +}; + +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(960)>; +}; + +/* 960 + 62 = 1022KB */ +&rram_controller { + cpuflpr_rram: rram@f0000 { + compatible = "soc-nv-flash"; + reg = <0xf0000 DT_SIZE_K(62)>; + erase-block-size = <4096>; + write-block-size = <16>; + }; +}; diff --git a/dts/common/nordic/nrf54l15.dtsi b/dts/common/nordic/nrf54l15.dtsi index 7dfa6a314b226..9bf64c935dad0 100644 --- a/dts/common/nordic/nrf54l15.dtsi +++ b/dts/common/nordic/nrf54l15.dtsi @@ -4,700 +4,36 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include -#include -#include -#include +#include "nrf54l_05_10_15.dtsi" -/delete-node/ &sw_pwm; - -/* Domain IDs. Can be used to specify channel links in IPCT nodes. */ -#define NRF_DOMAIN_ID_APPLICATION 0 -#define NRF_DOMAIN_ID_FLPR 1 +&cpuapp_sram { + reg = <0x20000000 DT_SIZE_K(188)>; + ranges = <0x0 0x20000000 DT_SIZE_K(188)>; +}; +/* 188 + 68 = 256KB */ / { - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpuapp: cpu@0 { - compatible = "arm,cortex-m33f"; - reg = <0>; - device_type = "cpu"; - clock-frequency = ; - #address-cells = <1>; - #size-cells = <1>; - itm: itm@e0000000 { - compatible = "arm,armv8m-itm"; - reg = <0xe0000000 0x1000>; - swo-ref-frequency = ; - }; - }; - - cpuflpr: cpu@1 { - compatible = "nordic,vpr"; - reg = <1>; - device_type = "cpu"; - clock-frequency = ; - riscv,isa = "rv32emc"; - nordic,bus-width = <32>; - }; - }; - - clocks { - lfxo: lfxo { - compatible = "nordic,nrf-lfxo"; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - - hfxo: hfxo { - compatible = "nordic,nrf-hfxo"; - #clock-cells = <0>; - clock-frequency = ; - }; - }; - soc { - #address-cells = <1>; - #size-cells = <1>; - -#ifdef USE_NON_SECURE_ADDRESS_MAP - /* intentionally empty because UICR is hardware fixed to Secure */ -#else - uicr: uicr@ffd000 { - compatible = "nordic,nrf-uicr"; - reg = <0xffd000 0x1000>; - }; -#endif - ficr: ficr@ffc000 { - compatible = "nordic,nrf-ficr"; - reg = <0xffc000 0x1000>; - #nordic,ficr-cells = <1>; - }; - - cpuapp_sram: memory@20000000 { - compatible = "mmio-sram"; - reg = <0x20000000 DT_SIZE_K(188)>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x20000000 0x2f000>; - }; - cpuflpr_sram: memory@2002f000 { compatible = "mmio-sram"; reg = <0x2002f000 DT_SIZE_K(68)>; #address-cells = <1>; #size-cells = <1>; - ranges = <0x0 0x2002f000 0x11000>; + ranges = <0x0 0x2002f000 DT_SIZE_K(68)>>; }; + }; +}; -#ifdef USE_NON_SECURE_ADDRESS_MAP - global_peripherals: peripheral@40000000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x40000000 0x10000000>; -#else - global_peripherals: peripheral@50000000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x50000000 0x10000000>; -#endif - - dppic00: dppic@42000 { - compatible = "nordic,nrf-dppic"; - reg = <0x42000 0x808>; - status = "disabled"; - }; - - spi00: spi@4a000 { - /* - * This spi node can be either SPIM or SPIS, - * for the user to pick: - * compatible = "nordic,nrf-spim" or - * "nordic,nrf-spis". - */ - compatible = "nordic,nrf-spim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x4a000 0x1000>; - interrupts = <74 NRF_DEFAULT_IRQ_PRIORITY>; - max-frequency = ; - easydma-maxcnt-bits = <16>; - rx-delay-supported; - rx-delay = <1>; - status = "disabled"; - }; - - uart00: uart@4a000 { - compatible = "nordic,nrf-uarte"; - reg = <0x4a000 0x1000>; - interrupts = <74 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - endtx-stoptx-supported; - frame-timeout-supported; - }; - - cpuflpr_vpr: vpr@4c000 { - compatible = "nordic,nrf-vpr-coprocessor"; - reg = <0x4c000 0x1000>; - ranges = <0x0 0x4c000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - status = "disabled"; - - cpuflpr_clic: interrupt-controller@f0000000 { - compatible = "nordic,nrf-clic"; - reg = <0xf0000000 0x1780>; - interrupt-controller; - #interrupt-cells = <2>; - #address-cells = <1>; - status = "disabled"; - }; - }; - - gpio2: gpio@50400 { - compatible = "nordic,nrf-gpio"; - gpio-controller; - reg = <0x50400 0x300>; - #gpio-cells = <2>; - ngpios = <11>; - status = "disabled"; - port = <2>; - }; - - timer00: timer@55000 { - compatible = "nordic,nrf-timer"; - status = "disabled"; - reg = <0x55000 0x1000>; - cc-num = <6>; - max-bit-width = <32>; - interrupts = <85 NRF_DEFAULT_IRQ_PRIORITY>; - max-frequency = ; - prescaler = <0>; - }; - - dppic10: dppic@82000 { - compatible = "nordic,nrf-dppic"; - reg = <0x82000 0x808>; - status = "disabled"; - }; - - timer10: timer@85000 { - compatible = "nordic,nrf-timer"; - status = "disabled"; - reg = <0x85000 0x1000>; - cc-num = <8>; - max-bit-width = <32>; - interrupts = <133 NRF_DEFAULT_IRQ_PRIORITY>; - max-frequency = ; - prescaler = <0>; - }; - - egu10: egu@87000 { - compatible = "nordic,nrf-egu"; - reg = <0x87000 0x1000>; - interrupts = <135 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - radio: radio@8a000 { - compatible = "nordic,nrf-radio"; - reg = <0x8a000 0x1000>; - interrupts = <138 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - dfe-supported; - ieee802154-supported; - ble-2mbps-supported; - ble-coded-phy-supported; - cs-supported; - - ieee802154: ieee802154 { - compatible = "nordic,nrf-ieee802154"; - status = "disabled"; - }; - - /* Note: In the nRF Connect SDK the SoftDevice Controller - * is added and set as the default Bluetooth Controller. - */ - bt_hci_controller: bt_hci_controller { - compatible = "zephyr,bt-hci-ll-sw-split"; - status = "disabled"; - }; - }; - - dppic20: dppic@c2000 { - compatible = "nordic,nrf-dppic"; - reg = <0xc2000 0x808>; - status = "disabled"; - }; - - i2c20: i2c@c6000 { - compatible = "nordic,nrf-twim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xc6000 0x1000>; - interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; - easydma-maxcnt-bits = <16>; - status = "disabled"; - zephyr,pm-device-runtime-auto; - }; - - spi20: spi@c6000 { - /* - * This spi node can be either SPIM or SPIS, - * for the user to pick: - * compatible = "nordic,nrf-spim" or - * "nordic,nrf-spis". - */ - compatible = "nordic,nrf-spim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xc6000 0x1000>; - interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; - max-frequency = ; - easydma-maxcnt-bits = <16>; - rx-delay-supported; - rx-delay = <1>; - status = "disabled"; - }; - - uart20: uart@c6000 { - compatible = "nordic,nrf-uarte"; - reg = <0xc6000 0x1000>; - interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - endtx-stoptx-supported; - frame-timeout-supported; - }; - - i2c21: i2c@c7000 { - compatible = "nordic,nrf-twim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xc7000 0x1000>; - interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; - easydma-maxcnt-bits = <16>; - status = "disabled"; - zephyr,pm-device-runtime-auto; - }; - - spi21: spi@c7000 { - /* - * This spi node can be either SPIM or SPIS, - * for the user to pick: - * compatible = "nordic,nrf-spim" or - * "nordic,nrf-spis". - */ - compatible = "nordic,nrf-spim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xc7000 0x1000>; - interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; - max-frequency = ; - easydma-maxcnt-bits = <16>; - rx-delay-supported; - rx-delay = <1>; - status = "disabled"; - }; - - uart21: uart@c7000 { - compatible = "nordic,nrf-uarte"; - reg = <0xc7000 0x1000>; - interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - endtx-stoptx-supported; - frame-timeout-supported; - }; - - i2c22: i2c@c8000 { - compatible = "nordic,nrf-twim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xc8000 0x1000>; - interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; - easydma-maxcnt-bits = <16>; - status = "disabled"; - zephyr,pm-device-runtime-auto; - }; - - spi22: spi@c8000 { - /* - * This spi node can be either SPIM or SPIS, - * for the user to pick: - * compatible = "nordic,nrf-spim" or - * "nordic,nrf-spis". - */ - compatible = "nordic,nrf-spim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xc8000 0x1000>; - interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; - max-frequency = ; - easydma-maxcnt-bits = <16>; - rx-delay-supported; - rx-delay = <1>; - status = "disabled"; - }; - - uart22: uart@c8000 { - compatible = "nordic,nrf-uarte"; - reg = <0xc8000 0x1000>; - interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - endtx-stoptx-supported; - frame-timeout-supported; - }; - - egu20: egu@c9000 { - compatible = "nordic,nrf-egu"; - reg = <0xc9000 0x1000>; - interrupts = <201 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - timer20: timer@ca000 { - compatible = "nordic,nrf-timer"; - status = "disabled"; - reg = <0xca000 0x1000>; - cc-num = <6>; - max-bit-width = <32>; - interrupts = <202 NRF_DEFAULT_IRQ_PRIORITY>; - prescaler = <0>; - }; - - timer21: timer@cb000 { - compatible = "nordic,nrf-timer"; - status = "disabled"; - reg = <0xcb000 0x1000>; - cc-num = <6>; - max-bit-width = <32>; - interrupts = <203 NRF_DEFAULT_IRQ_PRIORITY>; - prescaler = <0>; - }; - - timer22: timer@cc000 { - compatible = "nordic,nrf-timer"; - status = "disabled"; - reg = <0xcc000 0x1000>; - cc-num = <6>; - max-bit-width = <32>; - interrupts = <204 NRF_DEFAULT_IRQ_PRIORITY>; - prescaler = <0>; - }; - - timer23: timer@cd000 { - compatible = "nordic,nrf-timer"; - status = "disabled"; - reg = <0xcd000 0x1000>; - cc-num = <6>; - max-bit-width = <32>; - interrupts = <205 NRF_DEFAULT_IRQ_PRIORITY>; - prescaler = <0>; - }; - - timer24: timer@ce000 { - compatible = "nordic,nrf-timer"; - status = "disabled"; - reg = <0xce000 0x1000>; - cc-num = <6>; - max-bit-width = <32>; - interrupts = <206 NRF_DEFAULT_IRQ_PRIORITY>; - prescaler = <0>; - }; - - pdm20: pdm@d0000 { - compatible = "nordic,nrf-pdm"; - status = "disabled"; - reg = <0xd0000 0x1000>; - interrupts = <208 NRF_DEFAULT_IRQ_PRIORITY>; - }; - - pdm21: pdm@d1000 { - compatible = "nordic,nrf-pdm"; - status = "disabled"; - reg = <0xd1000 0x1000>; - interrupts = <209 NRF_DEFAULT_IRQ_PRIORITY>; - }; - - pwm20: pwm@d2000 { - compatible = "nordic,nrf-pwm"; - status = "disabled"; - reg = <0xd2000 0x1000>; - interrupts = <210 NRF_DEFAULT_IRQ_PRIORITY>; - #pwm-cells = <3>; - }; - - pwm21: pwm@d3000 { - compatible = "nordic,nrf-pwm"; - status = "disabled"; - reg = <0xd3000 0x1000>; - interrupts = <211 NRF_DEFAULT_IRQ_PRIORITY>; - #pwm-cells = <3>; - }; - - pwm22: pwm@d4000 { - compatible = "nordic,nrf-pwm"; - status = "disabled"; - reg = <0xd4000 0x1000>; - interrupts = <212 NRF_DEFAULT_IRQ_PRIORITY>; - #pwm-cells = <3>; - }; - - adc: adc@d5000 { - compatible = "nordic,nrf-saadc"; - reg = <0xd5000 0x1000>; - interrupts = <213 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - #io-channel-cells = <1>; - }; - - nfct: nfct@d6000 { - compatible = "nordic,nrf-nfct"; - reg = <0xd6000 0x1000>; - interrupts = <214 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - temp: temp@d7000 { - compatible = "nordic,nrf-temp"; - reg = <0xd7000 0x1000>; - interrupts = <215 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - gpio1: gpio@d8200 { - compatible = "nordic,nrf-gpio"; - gpio-controller; - reg = <0xd8200 0x300>; - #gpio-cells = <2>; - ngpios = <16>; - status = "disabled"; - port = <1>; - gpiote-instance = <&gpiote20>; - }; - - gpiote20: gpiote@da000 { - compatible = "nordic,nrf-gpiote"; - reg = <0xda000 0x1000>; - status = "disabled"; - instance = <20>; - }; - - i2s20: i2s@dd000 { - compatible = "nordic,nrf-i2s"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xdd000 0x1000>; - interrupts = <221 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - qdec20: qdec@e0000 { - compatible = "nordic,nrf-qdec"; - reg = <0xe0000 0x1000>; - interrupts = <224 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - qdec21: qdec@e1000 { - compatible = "nordic,nrf-qdec"; - reg = <0xe1000 0x1000>; - interrupts = <225 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - grtc: grtc@e2000 { - compatible = "nordic,nrf-grtc"; - reg = <0xe2000 0x1000>; - cc-num = <12>; - status = "disabled"; - }; - - dppic30: dppic@102000 { - compatible = "nordic,nrf-dppic"; - reg = <0x102000 0x808>; - status = "disabled"; - }; - - i2c30: i2c@104000 { - compatible = "nordic,nrf-twim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x104000 0x1000>; - interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; - easydma-maxcnt-bits = <16>; - status = "disabled"; - zephyr,pm-device-runtime-auto; - }; - - spi30: spi@104000 { - /* - * This spi node can be either SPIM or SPIS, - * for the user to pick: - * compatible = "nordic,nrf-spim" or - * "nordic,nrf-spis". - */ - compatible = "nordic,nrf-spim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x104000 0x1000>; - interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; - max-frequency = ; - easydma-maxcnt-bits = <16>; - rx-delay-supported; - rx-delay = <1>; - status = "disabled"; - }; - - uart30: uart@104000 { - compatible = "nordic,nrf-uarte"; - reg = <0x104000 0x1000>; - interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - endtx-stoptx-supported; - frame-timeout-supported; - }; - - comp: comparator@106000 { - /* - * Use compatible "nordic,nrf-comp" to configure as COMP - * Use compatible "nordic,nrf-lpcomp" to configure as LPCOMP - */ - compatible = "nordic,nrf-comp"; - reg = <0x106000 0x1000>; - status = "disabled"; - interrupts = <262 NRF_DEFAULT_IRQ_PRIORITY>; - }; - -#ifdef USE_NON_SECURE_ADDRESS_MAP - /* intentionally empty because WDT30 is hardware fixed to Secure */ -#else - wdt30: watchdog@108000 { - compatible = "nordic,nrf-wdt"; - reg = <0x108000 0x620>; - interrupts = <264 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; -#endif - - wdt31: watchdog@109000 { - compatible = "nordic,nrf-wdt"; - reg = <0x109000 0x620>; - interrupts = <265 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - gpio0: gpio@10a000 { - compatible = "nordic,nrf-gpio"; - gpio-controller; - reg = <0x10a000 0x300>; - #gpio-cells = <2>; - ngpios = <5>; - status = "disabled"; - port = <0>; - gpiote-instance = <&gpiote30>; - }; - - gpiote30: gpiote@10c000 { - compatible = "nordic,nrf-gpiote"; - reg = <0x10c000 0x1000>; - status = "disabled"; - instance = <30>; - }; - - clock: clock@10e000 { - compatible = "nordic,nrf-clock"; - reg = <0x10e000 0x1000>; - interrupts = <270 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - power: power@10e000 { - compatible = "nordic,nrf-power"; - reg = <0x10e000 0x1000>; - ranges = <0x0 0x10e000 0x1000>; - interrupts = <270 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <1>; - - gpregret1: gpregret1@51c { - #address-cells = <1>; - #size-cells = <1>; - compatible = "nordic,nrf-gpregret"; - reg = <0x51c 0x1>; - status = "disabled"; - }; - - gpregret2: gpregret2@520 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "nordic,nrf-gpregret"; - reg = <0x520 0x1>; - status = "disabled"; - }; - }; - - regulators: regulator@120000 { - compatible = "nordic,nrf54l-regulators"; - reg = <0x120000 0x1000>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <1>; - - vregmain: regulator@120600 { - compatible = "nordic,nrf5x-regulator"; - reg = <0x120600 0x1>; - status = "disabled"; - regulator-name = "VREGMAIN"; - regulator-initial-mode = ; - }; - }; - }; - - rram_controller: rram-controller@5004b000 { - compatible = "nordic,rram-controller"; - reg = <0x5004b000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - interrupts = <75 NRF_DEFAULT_IRQ_PRIORITY>; - - cpuapp_rram: rram@0 { - compatible = "soc-nv-flash"; - reg = <0x0 DT_SIZE_K(1428)>; - erase-block-size = <4096>; - write-block-size = <16>; - }; - cpuflpr_rram: rram@165000 { - compatible = "soc-nv-flash"; - reg = <0x165000 DT_SIZE_K(96)>; - erase-block-size = <4096>; - write-block-size = <16>; - }; - }; - - cpuapp_ppb: cpuapp-ppb-bus { - #address-cells = <1>; - #size-cells = <1>; - - cpuapp_nvic: interrupt-controller@e000e100 { - #address-cells = <1>; - compatible = "arm,v8m-nvic"; - reg = <0xe000e100 0xc00>; - arm,num-irq-priority-bits = <3>; - interrupt-controller; - #interrupt-cells = <2>; - }; +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(1428)>; +}; - cpuapp_systick: timer@e000e010 { - compatible = "arm,armv8m-systick"; - reg = <0xe000e010 0x10>; - status = "disabled"; - }; - }; +/* 1428 + 96 = 1524KB */ +&rram_controller { + cpuflpr_rram: rram@165000 { + compatible = "soc-nv-flash"; + reg = <0x165000 DT_SIZE_K(96)>; + erase-block-size = <4096>; + write-block-size = <16>; }; }; diff --git a/dts/common/nordic/nrf54l_05_10_15.dtsi b/dts/common/nordic/nrf54l_05_10_15.dtsi new file mode 100644 index 0000000000000..4766c2a3a4c67 --- /dev/null +++ b/dts/common/nordic/nrf54l_05_10_15.dtsi @@ -0,0 +1,686 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include + +/delete-node/ &sw_pwm; + +/* Domain IDs. Can be used to specify channel links in IPCT nodes. */ +#define NRF_DOMAIN_ID_APPLICATION 0 +#define NRF_DOMAIN_ID_FLPR 1 + +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpuapp: cpu@0 { + compatible = "arm,cortex-m33f"; + reg = <0>; + device_type = "cpu"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <1>; + itm: itm@e0000000 { + compatible = "arm,armv8m-itm"; + reg = <0xe0000000 0x1000>; + swo-ref-frequency = ; + }; + }; + + cpuflpr: cpu@1 { + compatible = "nordic,vpr"; + reg = <1>; + device_type = "cpu"; + clock-frequency = ; + riscv,isa = "rv32emc"; + nordic,bus-width = <32>; + }; + }; + + clocks { + lfxo: lfxo { + compatible = "nordic,nrf-lfxo"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + + hfxo: hfxo { + compatible = "nordic,nrf-hfxo"; + #clock-cells = <0>; + clock-frequency = ; + }; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + +#ifdef USE_NON_SECURE_ADDRESS_MAP + /* intentionally empty because UICR is hardware fixed to Secure */ +#else + uicr: uicr@ffd000 { + compatible = "nordic,nrf-uicr"; + reg = <0xffd000 0x1000>; + }; +#endif + ficr: ficr@ffc000 { + compatible = "nordic,nrf-ficr"; + reg = <0xffc000 0x1000>; + #nordic,ficr-cells = <1>; + }; + + cpuapp_sram: memory@20000000 { + compatible = "mmio-sram"; + #address-cells = <1>; + #size-cells = <1>; + }; + +#ifdef USE_NON_SECURE_ADDRESS_MAP + global_peripherals: peripheral@40000000 { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x40000000 0x10000000>; +#else + global_peripherals: peripheral@50000000 { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x50000000 0x10000000>; +#endif + + dppic00: dppic@42000 { + compatible = "nordic,nrf-dppic"; + reg = <0x42000 0x808>; + status = "disabled"; + }; + + spi00: spi@4a000 { + /* + * This spi node can be either SPIM or SPIS, + * for the user to pick: + * compatible = "nordic,nrf-spim" or + * "nordic,nrf-spis". + */ + compatible = "nordic,nrf-spim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4a000 0x1000>; + interrupts = <74 NRF_DEFAULT_IRQ_PRIORITY>; + max-frequency = ; + easydma-maxcnt-bits = <16>; + rx-delay-supported; + rx-delay = <1>; + status = "disabled"; + }; + + uart00: uart@4a000 { + compatible = "nordic,nrf-uarte"; + reg = <0x4a000 0x1000>; + interrupts = <74 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + endtx-stoptx-supported; + frame-timeout-supported; + }; + + cpuflpr_vpr: vpr@4c000 { + compatible = "nordic,nrf-vpr-coprocessor"; + reg = <0x4c000 0x1000>; + ranges = <0x0 0x4c000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + + cpuflpr_clic: interrupt-controller@f0000000 { + compatible = "nordic,nrf-clic"; + reg = <0xf0000000 0x1780>; + interrupt-controller; + #interrupt-cells = <2>; + #address-cells = <1>; + status = "disabled"; + }; + }; + + gpio2: gpio@50400 { + compatible = "nordic,nrf-gpio"; + gpio-controller; + reg = <0x50400 0x300>; + #gpio-cells = <2>; + ngpios = <11>; + status = "disabled"; + port = <2>; + }; + + timer00: timer@55000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = <0x55000 0x1000>; + cc-num = <6>; + max-bit-width = <32>; + interrupts = <85 NRF_DEFAULT_IRQ_PRIORITY>; + max-frequency = ; + prescaler = <0>; + }; + + dppic10: dppic@82000 { + compatible = "nordic,nrf-dppic"; + reg = <0x82000 0x808>; + status = "disabled"; + }; + + timer10: timer@85000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = <0x85000 0x1000>; + cc-num = <8>; + max-bit-width = <32>; + interrupts = <133 NRF_DEFAULT_IRQ_PRIORITY>; + max-frequency = ; + prescaler = <0>; + }; + + egu10: egu@87000 { + compatible = "nordic,nrf-egu"; + reg = <0x87000 0x1000>; + interrupts = <135 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + radio: radio@8a000 { + compatible = "nordic,nrf-radio"; + reg = <0x8a000 0x1000>; + interrupts = <138 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + dfe-supported; + ieee802154-supported; + ble-2mbps-supported; + ble-coded-phy-supported; + cs-supported; + + ieee802154: ieee802154 { + compatible = "nordic,nrf-ieee802154"; + status = "disabled"; + }; + + /* Note: In the nRF Connect SDK the SoftDevice Controller + * is added and set as the default Bluetooth Controller. + */ + bt_hci_controller: bt_hci_controller { + compatible = "zephyr,bt-hci-ll-sw-split"; + status = "disabled"; + }; + }; + + dppic20: dppic@c2000 { + compatible = "nordic,nrf-dppic"; + reg = <0xc2000 0x808>; + status = "disabled"; + }; + + i2c20: i2c@c6000 { + compatible = "nordic,nrf-twim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc6000 0x1000>; + interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; + easydma-maxcnt-bits = <16>; + status = "disabled"; + zephyr,pm-device-runtime-auto; + }; + + spi20: spi@c6000 { + /* + * This spi node can be either SPIM or SPIS, + * for the user to pick: + * compatible = "nordic,nrf-spim" or + * "nordic,nrf-spis". + */ + compatible = "nordic,nrf-spim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc6000 0x1000>; + interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; + max-frequency = ; + easydma-maxcnt-bits = <16>; + rx-delay-supported; + rx-delay = <1>; + status = "disabled"; + }; + + uart20: uart@c6000 { + compatible = "nordic,nrf-uarte"; + reg = <0xc6000 0x1000>; + interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + endtx-stoptx-supported; + frame-timeout-supported; + }; + + i2c21: i2c@c7000 { + compatible = "nordic,nrf-twim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc7000 0x1000>; + interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; + easydma-maxcnt-bits = <16>; + status = "disabled"; + zephyr,pm-device-runtime-auto; + }; + + spi21: spi@c7000 { + /* + * This spi node can be either SPIM or SPIS, + * for the user to pick: + * compatible = "nordic,nrf-spim" or + * "nordic,nrf-spis". + */ + compatible = "nordic,nrf-spim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc7000 0x1000>; + interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; + max-frequency = ; + easydma-maxcnt-bits = <16>; + rx-delay-supported; + rx-delay = <1>; + status = "disabled"; + }; + + uart21: uart@c7000 { + compatible = "nordic,nrf-uarte"; + reg = <0xc7000 0x1000>; + interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + endtx-stoptx-supported; + frame-timeout-supported; + }; + + i2c22: i2c@c8000 { + compatible = "nordic,nrf-twim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc8000 0x1000>; + interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; + easydma-maxcnt-bits = <16>; + status = "disabled"; + zephyr,pm-device-runtime-auto; + }; + + spi22: spi@c8000 { + /* + * This spi node can be either SPIM or SPIS, + * for the user to pick: + * compatible = "nordic,nrf-spim" or + * "nordic,nrf-spis". + */ + compatible = "nordic,nrf-spim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc8000 0x1000>; + interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; + max-frequency = ; + easydma-maxcnt-bits = <16>; + rx-delay-supported; + rx-delay = <1>; + status = "disabled"; + }; + + uart22: uart@c8000 { + compatible = "nordic,nrf-uarte"; + reg = <0xc8000 0x1000>; + interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + endtx-stoptx-supported; + frame-timeout-supported; + }; + + egu20: egu@c9000 { + compatible = "nordic,nrf-egu"; + reg = <0xc9000 0x1000>; + interrupts = <201 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + timer20: timer@ca000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = <0xca000 0x1000>; + cc-num = <6>; + max-bit-width = <32>; + interrupts = <202 NRF_DEFAULT_IRQ_PRIORITY>; + prescaler = <0>; + }; + + timer21: timer@cb000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = <0xcb000 0x1000>; + cc-num = <6>; + max-bit-width = <32>; + interrupts = <203 NRF_DEFAULT_IRQ_PRIORITY>; + prescaler = <0>; + }; + + timer22: timer@cc000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = <0xcc000 0x1000>; + cc-num = <6>; + max-bit-width = <32>; + interrupts = <204 NRF_DEFAULT_IRQ_PRIORITY>; + prescaler = <0>; + }; + + timer23: timer@cd000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = <0xcd000 0x1000>; + cc-num = <6>; + max-bit-width = <32>; + interrupts = <205 NRF_DEFAULT_IRQ_PRIORITY>; + prescaler = <0>; + }; + + timer24: timer@ce000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = <0xce000 0x1000>; + cc-num = <6>; + max-bit-width = <32>; + interrupts = <206 NRF_DEFAULT_IRQ_PRIORITY>; + prescaler = <0>; + }; + + pdm20: pdm@d0000 { + compatible = "nordic,nrf-pdm"; + status = "disabled"; + reg = <0xd0000 0x1000>; + interrupts = <208 NRF_DEFAULT_IRQ_PRIORITY>; + }; + + pdm21: pdm@d1000 { + compatible = "nordic,nrf-pdm"; + status = "disabled"; + reg = <0xd1000 0x1000>; + interrupts = <209 NRF_DEFAULT_IRQ_PRIORITY>; + }; + + pwm20: pwm@d2000 { + compatible = "nordic,nrf-pwm"; + status = "disabled"; + reg = <0xd2000 0x1000>; + interrupts = <210 NRF_DEFAULT_IRQ_PRIORITY>; + #pwm-cells = <3>; + }; + + pwm21: pwm@d3000 { + compatible = "nordic,nrf-pwm"; + status = "disabled"; + reg = <0xd3000 0x1000>; + interrupts = <211 NRF_DEFAULT_IRQ_PRIORITY>; + #pwm-cells = <3>; + }; + + pwm22: pwm@d4000 { + compatible = "nordic,nrf-pwm"; + status = "disabled"; + reg = <0xd4000 0x1000>; + interrupts = <212 NRF_DEFAULT_IRQ_PRIORITY>; + #pwm-cells = <3>; + }; + + adc: adc@d5000 { + compatible = "nordic,nrf-saadc"; + reg = <0xd5000 0x1000>; + interrupts = <213 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + #io-channel-cells = <1>; + }; + + nfct: nfct@d6000 { + compatible = "nordic,nrf-nfct"; + reg = <0xd6000 0x1000>; + interrupts = <214 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + temp: temp@d7000 { + compatible = "nordic,nrf-temp"; + reg = <0xd7000 0x1000>; + interrupts = <215 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + gpio1: gpio@d8200 { + compatible = "nordic,nrf-gpio"; + gpio-controller; + reg = <0xd8200 0x300>; + #gpio-cells = <2>; + ngpios = <16>; + status = "disabled"; + port = <1>; + gpiote-instance = <&gpiote20>; + }; + + gpiote20: gpiote@da000 { + compatible = "nordic,nrf-gpiote"; + reg = <0xda000 0x1000>; + status = "disabled"; + instance = <20>; + }; + + i2s20: i2s@dd000 { + compatible = "nordic,nrf-i2s"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xdd000 0x1000>; + interrupts = <221 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + qdec20: qdec@e0000 { + compatible = "nordic,nrf-qdec"; + reg = <0xe0000 0x1000>; + interrupts = <224 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + qdec21: qdec@e1000 { + compatible = "nordic,nrf-qdec"; + reg = <0xe1000 0x1000>; + interrupts = <225 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + grtc: grtc@e2000 { + compatible = "nordic,nrf-grtc"; + reg = <0xe2000 0x1000>; + cc-num = <12>; + status = "disabled"; + }; + + dppic30: dppic@102000 { + compatible = "nordic,nrf-dppic"; + reg = <0x102000 0x808>; + status = "disabled"; + }; + + i2c30: i2c@104000 { + compatible = "nordic,nrf-twim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x104000 0x1000>; + interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; + easydma-maxcnt-bits = <16>; + status = "disabled"; + zephyr,pm-device-runtime-auto; + }; + + spi30: spi@104000 { + /* + * This spi node can be either SPIM or SPIS, + * for the user to pick: + * compatible = "nordic,nrf-spim" or + * "nordic,nrf-spis". + */ + compatible = "nordic,nrf-spim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x104000 0x1000>; + interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; + max-frequency = ; + easydma-maxcnt-bits = <16>; + rx-delay-supported; + rx-delay = <1>; + status = "disabled"; + }; + + uart30: uart@104000 { + compatible = "nordic,nrf-uarte"; + reg = <0x104000 0x1000>; + interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + endtx-stoptx-supported; + frame-timeout-supported; + }; + + comp: comparator@106000 { + /* + * Use compatible "nordic,nrf-comp" to configure as COMP + * Use compatible "nordic,nrf-lpcomp" to configure as LPCOMP + */ + compatible = "nordic,nrf-comp"; + reg = <0x106000 0x1000>; + status = "disabled"; + interrupts = <262 NRF_DEFAULT_IRQ_PRIORITY>; + }; + +#ifdef USE_NON_SECURE_ADDRESS_MAP + /* intentionally empty because WDT30 is hardware fixed to Secure */ +#else + wdt30: watchdog@108000 { + compatible = "nordic,nrf-wdt"; + reg = <0x108000 0x620>; + interrupts = <264 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; +#endif + + wdt31: watchdog@109000 { + compatible = "nordic,nrf-wdt"; + reg = <0x109000 0x620>; + interrupts = <265 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + gpio0: gpio@10a000 { + compatible = "nordic,nrf-gpio"; + gpio-controller; + reg = <0x10a000 0x300>; + #gpio-cells = <2>; + ngpios = <5>; + status = "disabled"; + port = <0>; + gpiote-instance = <&gpiote30>; + }; + + gpiote30: gpiote@10c000 { + compatible = "nordic,nrf-gpiote"; + reg = <0x10c000 0x1000>; + status = "disabled"; + instance = <30>; + }; + + clock: clock@10e000 { + compatible = "nordic,nrf-clock"; + reg = <0x10e000 0x1000>; + interrupts = <270 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + power: power@10e000 { + compatible = "nordic,nrf-power"; + reg = <0x10e000 0x1000>; + ranges = <0x0 0x10e000 0x1000>; + interrupts = <270 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + + gpregret1: gpregret1@51c { + #address-cells = <1>; + #size-cells = <1>; + compatible = "nordic,nrf-gpregret"; + reg = <0x51c 0x1>; + status = "disabled"; + }; + + gpregret2: gpregret2@520 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "nordic,nrf-gpregret"; + reg = <0x520 0x1>; + status = "disabled"; + }; + }; + + regulators: regulator@120000 { + compatible = "nordic,nrf54l-regulators"; + reg = <0x120000 0x1000>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + + vregmain: regulator@120600 { + compatible = "nordic,nrf5x-regulator"; + reg = <0x120600 0x1>; + status = "disabled"; + regulator-name = "VREGMAIN"; + regulator-initial-mode = ; + }; + }; + }; + + rram_controller: rram-controller@5004b000 { + compatible = "nordic,rram-controller"; + reg = <0x5004b000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + interrupts = <75 NRF_DEFAULT_IRQ_PRIORITY>; + + cpuapp_rram: rram@0 { + compatible = "soc-nv-flash"; + erase-block-size = <4096>; + write-block-size = <16>; + }; + }; + + cpuapp_ppb: cpuapp-ppb-bus { + #address-cells = <1>; + #size-cells = <1>; + + cpuapp_nvic: interrupt-controller@e000e100 { + #address-cells = <1>; + compatible = "arm,v8m-nvic"; + reg = <0xe000e100 0xc00>; + arm,num-irq-priority-bits = <3>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + cpuapp_systick: timer@e000e010 { + compatible = "arm,armv8m-systick"; + reg = <0xe000e010 0x10>; + status = "disabled"; + }; + }; + }; +}; diff --git a/dts/riscv/nordic/nrf54l05_cpuflpr.dtsi b/dts/riscv/nordic/nrf54l05_cpuflpr.dtsi new file mode 100644 index 0000000000000..d4725112a465d --- /dev/null +++ b/dts/riscv/nordic/nrf54l05_cpuflpr.dtsi @@ -0,0 +1,8 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include "nrf54l_05_10_15_cpuflpr.dtsi" diff --git a/dts/riscv/nordic/nrf54l10_cpuflpr.dtsi b/dts/riscv/nordic/nrf54l10_cpuflpr.dtsi new file mode 100644 index 0000000000000..cea4112d363de --- /dev/null +++ b/dts/riscv/nordic/nrf54l10_cpuflpr.dtsi @@ -0,0 +1,8 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include "nrf54l_05_10_15_cpuflpr.dtsi" diff --git a/dts/riscv/nordic/nrf54l15_cpuflpr.dtsi b/dts/riscv/nordic/nrf54l15_cpuflpr.dtsi index fefa43b76c03d..4dedf1fbca553 100644 --- a/dts/riscv/nordic/nrf54l15_cpuflpr.dtsi +++ b/dts/riscv/nordic/nrf54l15_cpuflpr.dtsi @@ -5,63 +5,4 @@ */ #include - -cpu: &cpuflpr {}; -clic: &cpuflpr_clic {}; - -/delete-node/ &cpuapp; -/delete-node/ &cpuapp_rram; -/delete-node/ &cpuapp_ppb; -/delete-node/ &cpuapp_sram; - -/ { - soc { - compatible = "simple-bus"; - interrupt-parent = <&cpuflpr_clic>; - ranges; - }; -}; - -&cpuflpr { - cpuflpr_vevif_rx: mailbox { - compatible = "nordic,nrf-vevif-task-rx"; - status = "disabled"; - interrupt-parent = <&cpuflpr_clic>; - interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>, - <17 NRF_DEFAULT_IRQ_PRIORITY>, - <18 NRF_DEFAULT_IRQ_PRIORITY>, - <19 NRF_DEFAULT_IRQ_PRIORITY>, - <20 NRF_DEFAULT_IRQ_PRIORITY>, - <21 NRF_DEFAULT_IRQ_PRIORITY>, - <22 NRF_DEFAULT_IRQ_PRIORITY>; - #mbox-cells = <1>; - nordic,tasks = <7>; - nordic,tasks-mask = <0x007f0000>; - }; -}; - -&cpuflpr_vpr { - cpuflpr_vevif_tx: mailbox { - compatible = "nordic,nrf-vevif-event-tx"; - #mbox-cells = <1>; - nordic,events = <1>; - nordic,events-mask = <0x00100000>; - status = "disabled"; - }; -}; - -&cpuflpr_clic { - status = "okay"; -}; - -&grtc { - interrupts = <226 NRF_DEFAULT_IRQ_PRIORITY>; -}; - -&gpiote20 { - interrupts = <218 NRF_DEFAULT_IRQ_PRIORITY>; -}; - -&gpiote30 { - interrupts = <268 NRF_DEFAULT_IRQ_PRIORITY>; -}; +#include "nrf54l_05_10_15_cpuflpr.dtsi" diff --git a/dts/riscv/nordic/nrf54l_05_10_15_cpuflpr.dtsi b/dts/riscv/nordic/nrf54l_05_10_15_cpuflpr.dtsi new file mode 100644 index 0000000000000..b20ddbb1bdaba --- /dev/null +++ b/dts/riscv/nordic/nrf54l_05_10_15_cpuflpr.dtsi @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +cpu: &cpuflpr {}; +clic: &cpuflpr_clic {}; + +/delete-node/ &cpuapp; +/delete-node/ &cpuapp_rram; +/delete-node/ &cpuapp_ppb; +/delete-node/ &cpuapp_sram; + +/ { + soc { + compatible = "simple-bus"; + interrupt-parent = <&cpuflpr_clic>; + ranges; + }; +}; + +&cpuflpr { + cpuflpr_vevif_rx: mailbox { + compatible = "nordic,nrf-vevif-task-rx"; + status = "disabled"; + interrupt-parent = <&cpuflpr_clic>; + interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>, + <17 NRF_DEFAULT_IRQ_PRIORITY>, + <18 NRF_DEFAULT_IRQ_PRIORITY>, + <19 NRF_DEFAULT_IRQ_PRIORITY>, + <20 NRF_DEFAULT_IRQ_PRIORITY>, + <21 NRF_DEFAULT_IRQ_PRIORITY>, + <22 NRF_DEFAULT_IRQ_PRIORITY>; + #mbox-cells = <1>; + nordic,tasks = <7>; + nordic,tasks-mask = <0x007f0000>; + }; +}; + +&cpuflpr_vpr { + cpuflpr_vevif_tx: mailbox { + compatible = "nordic,nrf-vevif-event-tx"; + #mbox-cells = <1>; + nordic,events = <1>; + nordic,events-mask = <0x00100000>; + status = "disabled"; + }; +}; + +&cpuflpr_clic { + status = "okay"; +}; + +&grtc { + interrupts = <226 NRF_DEFAULT_IRQ_PRIORITY>; +}; + +&gpiote20 { + interrupts = <218 NRF_DEFAULT_IRQ_PRIORITY>; +}; + +&gpiote30 { + interrupts = <268 NRF_DEFAULT_IRQ_PRIORITY>; +}; diff --git a/modules/hal_nordic/nrfx/CMakeLists.txt b/modules/hal_nordic/nrfx/CMakeLists.txt index 51c613f0104e5..df0ee9c71a8c8 100644 --- a/modules/hal_nordic/nrfx/CMakeLists.txt +++ b/modules/hal_nordic/nrfx/CMakeLists.txt @@ -44,6 +44,12 @@ zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54H20_CPUPPR NRF54H20_XXAA NRF_PPR) zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54H20_CPUFLPR NRF54H20_XXAA NRF_FLPR) +zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L05 NRF54L05_XXAA) +zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L05_CPUAPP NRF_APPLICATION) +zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L05_CPUFLPR NRF_FLPR) +zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L10 NRF54L10_XXAA) +zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L10_CPUAPP NRF_APPLICATION) +zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L10_CPUFLPR NRF_FLPR) zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L15 NRF54L15_XXAA) zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L15_CPUAPP NRF_APPLICATION) zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L15_CPUFLPR NRF_FLPR) @@ -168,7 +174,7 @@ if(DEFINED uicr_path) endif() endif() -if(CONFIG_SOC_NRF54L15_CPUAPP OR CONFIG_SOC_NRF54L20_ENGA_CPUAPP) +if(CONFIG_SOC_NRF54L_CPUAPP_COMMON) dt_prop(clock_frequency PATH "/cpus/cpu@0" PROPERTY "clock-frequency") math(EXPR clock_frequency_mhz "${clock_frequency} / 1000000") zephyr_compile_definitions("NRF_CONFIG_CPU_FREQ_MHZ=${clock_frequency_mhz}") @@ -218,6 +224,10 @@ mdk_svd_ifdef(CONFIG_SOC_NRF54H20_CPUAPP nrf54h20_application.svd) mdk_svd_ifdef(CONFIG_SOC_NRF54H20_CPUPPR nrf54h20_ppr.svd) mdk_svd_ifdef(CONFIG_SOC_NRF54H20_CPUFLPR nrf54h20_flpr.svd) mdk_svd_ifdef(CONFIG_SOC_NRF54H20_CPURAD nrf54h20_radiocore.svd) +mdk_svd_ifdef(CONFIG_SOC_NRF54L05_CPUAPP nrf54l05_application.svd) +mdk_svd_ifdef(CONFIG_SOC_NRF54L05_CPUFLPR nrf54l05_flpr.svd) +mdk_svd_ifdef(CONFIG_SOC_NRF54L10_CPUAPP nrf54l10_application.svd) +mdk_svd_ifdef(CONFIG_SOC_NRF54L10_CPUFLPR nrf54l10_flpr.svd) mdk_svd_ifdef(CONFIG_SOC_NRF54L15_CPUAPP nrf54l15_application.svd) mdk_svd_ifdef(CONFIG_SOC_NRF54L15_CPUFLPR nrf54l15_flpr.svd) mdk_svd_ifdef(CONFIG_SOC_NRF54L20_ENGA_CPUAPP nrf54l20_enga_application.svd) diff --git a/modules/hal_nordic/nrfx/nrfx_config.h b/modules/hal_nordic/nrfx/nrfx_config.h index 58e938492ffbd..9af0f46186cdd 100644 --- a/modules/hal_nordic/nrfx/nrfx_config.h +++ b/modules/hal_nordic/nrfx/nrfx_config.h @@ -1056,10 +1056,12 @@ #include #elif defined(NRF54H20_XXAA) && defined(NRF_FLPR) #include -#elif defined(NRF54L15_XXAA) && defined(NRF_APPLICATION) - #include -#elif defined(NRF54L15_XXAA) && defined(NRF_FLPR) - #include +#elif (defined(NRF54L05_XXAA) || defined(NRF54L10_XXAA) || defined(NRF54L15_XXAA)) \ + && defined(NRF_APPLICATION) + #include +#elif (defined(NRF54L05_XXAA) || defined(NRF54L10_XXAA) || defined(NRF54L15_XXAA)) \ + && defined(NRF_FLPR) + #include #elif (defined(NRF54L20_XXAA) || defined(NRF54L20_ENGA_XXAA)) && defined(NRF_APPLICATION) #include #elif defined(NRF9120_XXAA) || defined(NRF9160_XXAA) diff --git a/modules/hal_nordic/nrfx/nrfx_config_nrf54l15_application.h b/modules/hal_nordic/nrfx/nrfx_config_nrf54l_05_10_15_application.h similarity index 99% rename from modules/hal_nordic/nrfx/nrfx_config_nrf54l15_application.h rename to modules/hal_nordic/nrfx/nrfx_config_nrf54l_05_10_15_application.h index e423c8b515d71..f5d50dfdd3824 100644 --- a/modules/hal_nordic/nrfx/nrfx_config_nrf54l15_application.h +++ b/modules/hal_nordic/nrfx/nrfx_config_nrf54l_05_10_15_application.h @@ -4,8 +4,8 @@ * SPDX-License-Identifier: Apache-2.0 */ -#ifndef NRFX_CONFIG_NRF54L15_APPLICATION_H__ -#define NRFX_CONFIG_NRF54L15_APPLICATION_H__ +#ifndef NRFX_CONFIG_NRF54L_05_10_15_APPLICATION_H__ +#define NRFX_CONFIG_NRF54L_05_10_15_APPLICATION_H__ #ifndef NRFX_CONFIG_H__ #error "This file should not be included directly. Include nrfx_config.h instead." @@ -1640,4 +1640,4 @@ #define NRFX_WDT31_ENABLED 0 #endif -#endif /* NRFX_CONFIG_NRF54L15_APPLICATION_H__ */ +#endif /* NRFX_CONFIG_NRF54L_05_10_15_APPLICATION_H__ */ diff --git a/modules/hal_nordic/nrfx/nrfx_config_nrf54l15_flpr.h b/modules/hal_nordic/nrfx/nrfx_config_nrf54l_05_10_15_flpr.h similarity index 99% rename from modules/hal_nordic/nrfx/nrfx_config_nrf54l15_flpr.h rename to modules/hal_nordic/nrfx/nrfx_config_nrf54l_05_10_15_flpr.h index a036f8c0a261b..df7b59a931ca2 100644 --- a/modules/hal_nordic/nrfx/nrfx_config_nrf54l15_flpr.h +++ b/modules/hal_nordic/nrfx/nrfx_config_nrf54l_05_10_15_flpr.h @@ -4,8 +4,8 @@ * SPDX-License-Identifier: Apache-2.0 */ -#ifndef NRFX_CONFIG_NRF54L15_FLPR_H__ -#define NRFX_CONFIG_NRF54L15_FLPR_H__ +#ifndef NRFX_CONFIG_NRF54L_05_10_15_FLPR_H__ +#define NRFX_CONFIG_NRF54L_05_10_15_FLPR_H__ #ifndef NRFX_CONFIG_H__ #error "This file should not be included directly. Include nrfx_config.h instead." @@ -1649,4 +1649,4 @@ #define NRFX_WDT31_ENABLED 0 #endif -#endif /* NRFX_CONFIG_NRF54L15_FLPR_H__ */ +#endif /* NRFX_CONFIG_NRF54L_05_10_15_FLPR_H__ */ diff --git a/soc/nordic/common/vpr/Kconfig.sysbuild b/soc/nordic/common/vpr/Kconfig.sysbuild index cfbd619f623f6..7cedba6e760d8 100644 --- a/soc/nordic/common/vpr/Kconfig.sysbuild +++ b/soc/nordic/common/vpr/Kconfig.sysbuild @@ -4,7 +4,7 @@ config VPR_LAUNCHER bool "VPR launcher" default y - depends on (SOC_NRF54H20_CPUPPR || SOC_NRF54H20_CPUFLPR || SOC_NRF54L15_CPUFLPR || SOC_NRF9280_CPUPPR) + depends on (SOC_NRF54H20_CPUPPR || SOC_NRF54H20_CPUFLPR || SOC_NRF9280_CPUPPR) help Include VPR launcher in build. VPR launcher is a minimal sample built for an ARM core that starts given VPR core. diff --git a/soc/nordic/nrf54l/Kconfig b/soc/nordic/nrf54l/Kconfig index 4f204c91fdb32..1a8f05ba89aae 100644 --- a/soc/nordic/nrf54l/Kconfig +++ b/soc/nordic/nrf54l/Kconfig @@ -9,7 +9,8 @@ config SOC_SERIES_NRF54LX select HAS_NORDIC_DRIVERS select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE -config SOC_NRF54L15_CPUAPP +config SOC_NRF54L_CPUAPP_COMMON + bool select ARM select ARMV8_M_DSP select CPU_CORTEX_M33 @@ -20,20 +21,27 @@ config SOC_NRF54L15_CPUAPP select HAS_HW_NRF_RADIO_IEEE802154 select HAS_POWEROFF -config SOC_NRF54L20_ENGA_CPUAPP - select ARM - select ARMV8_M_DSP - select CPU_CORTEX_M33 - select CPU_HAS_ARM_MPU - select CPU_HAS_ICACHE - select CPU_HAS_ARM_SAU - select CPU_HAS_FPU - select HAS_HW_NRF_RADIO_IEEE802154 - select HAS_POWEROFF +config SOC_NRF54L05_CPUAPP + select SOC_NRF54L_CPUAPP_COMMON + +config SOC_NRF54L10_CPUAPP + select SOC_NRF54L_CPUAPP_COMMON + +config SOC_NRF54L15_CPUAPP + select SOC_NRF54L_CPUAPP_COMMON + +config SOC_NRF54L05_CPUFLPR + depends on RISCV_CORE_NORDIC_VPR + +config SOC_NRF54L10_CPUFLPR + depends on RISCV_CORE_NORDIC_VPR config SOC_NRF54L15_CPUFLPR depends on RISCV_CORE_NORDIC_VPR +config SOC_NRF54L20_ENGA_CPUAPP + select SOC_NRF54L_CPUAPP_COMMON + if SOC_SERIES_NRF54LX config SOC_NRF54LX_SKIP_CLOCK_CONFIG diff --git a/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_cpuapp b/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_cpuapp deleted file mode 100644 index 9c8e0b4e34b3f..0000000000000 --- a/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_cpuapp +++ /dev/null @@ -1,11 +0,0 @@ -# Nordic Semiconductor nRF54L15 MCU - -# Copyright (c) 2024 Nordic Semiconductor ASA -# SPDX-License-Identifier: Apache-2.0 - -if SOC_NRF54L15_CPUAPP - -config NUM_IRQS - default 271 - -endif # SOC_NRF54L15_CPUAPP diff --git a/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l_05_10_15_cpuapp b/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l_05_10_15_cpuapp new file mode 100644 index 0000000000000..ecc2e6124da3f --- /dev/null +++ b/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l_05_10_15_cpuapp @@ -0,0 +1,11 @@ +# Nordic Semiconductor nRF54 L05, L10 and L15 MCUs + +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +if SOC_NRF54L05_CPUAPP || SOC_NRF54L10_CPUAPP || SOC_NRF54L15_CPUAPP + +config NUM_IRQS + default 271 + +endif # SOC_NRF54L05_CPUAPP || SOC_NRF54L10_CPUAPP || SOC_NRF54L15_CPUAPP diff --git a/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_cpuflpr b/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l_05_10_15_cpuflpr similarity index 52% rename from soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_cpuflpr rename to soc/nordic/nrf54l/Kconfig.defconfig.nrf54l_05_10_15_cpuflpr index 7c653d14b9317..76af552472828 100644 --- a/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_cpuflpr +++ b/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l_05_10_15_cpuflpr @@ -1,9 +1,9 @@ -# Nordic Semiconductor nRF54L15 MCU +# Nordic Semiconductor nRF54 L05, L10 and L15 MCUs # Copyright (c) 2024 Nordic Semiconductor ASA # SPDX-License-Identifier: Apache-2.0 -if SOC_NRF54L15_CPUFLPR +if SOC_NRF54L05_CPUFLPR || SOC_NRF54L10_CPUFLPR || SOC_NRF54L15_CPUFLPR config NUM_IRQS default 287 @@ -12,4 +12,4 @@ config NUM_IRQS config ASSERT default n -endif # SOC_NRF54L15_CPUFLPR +endif # SOC_NRF54L05_CPUFLPR || SOC_NRF54L10_CPUFLPR || SOC_NRF54L15_CPUFLPR diff --git a/soc/nordic/nrf54l/Kconfig.soc b/soc/nordic/nrf54l/Kconfig.soc index 25deae9fade71..f7c5adf6924e9 100644 --- a/soc/nordic/nrf54l/Kconfig.soc +++ b/soc/nordic/nrf54l/Kconfig.soc @@ -3,6 +3,42 @@ # Copyright (c) 2024 Nordic Semiconductor ASA # SPDX-License-Identifier: Apache-2.0 +config SOC_NRF54L05 + bool + select SOC_SERIES_NRF54LX + help + NRF54L05 + +config SOC_NRF54L05_CPUAPP + bool + select SOC_NRF54L05 + help + NRF54L05 CPUAPP + +config SOC_NRF54L05_CPUFLPR + bool + select SOC_NRF54L05 + help + NRF54L05 CPUFLPR + +config SOC_NRF54L10 + bool + select SOC_SERIES_NRF54LX + help + NRF54L10 + +config SOC_NRF54L10_CPUAPP + bool + select SOC_NRF54L10 + help + NRF54L10 CPUAPP + +config SOC_NRF54L10_CPUFLPR + bool + select SOC_NRF54L10 + help + NRF54L10 CPUFLPR + config SOC_NRF54L15 bool select SOC_SERIES_NRF54LX @@ -40,5 +76,7 @@ config SOC_NRF54L20_ENGA_CPUAPP NRF54L20 ENGA CPUAPP config SOC + default "nrf54l05" if SOC_NRF54L05 + default "nrf54l10" if SOC_NRF54L10 default "nrf54l15" if SOC_NRF54L15 default "nrf54l20" if SOC_NRF54L20 diff --git a/soc/nordic/soc.yml b/soc/nordic/soc.yml index 27db57b90995d..a12923308fc41 100644 --- a/soc/nordic/soc.yml +++ b/soc/nordic/soc.yml @@ -21,6 +21,14 @@ family: - name: cpunet - name: nrf54l socs: + - name: nrf54l05 + cpuclusters: + - name: cpuapp + - name: cpuflpr + - name: nrf54l10 + cpuclusters: + - name: cpuapp + - name: cpuflpr - name: nrf54l15 cpuclusters: - name: cpuapp @@ -94,6 +102,12 @@ runners: - qualifiers: - nrf9161 - nrf9161/ns + - qualifiers: + - nrf54l05/cpuapp + - nrf54l05/cpuflpr + - qualifiers: + - nrf54l10/cpuapp + - nrf54l10/cpuflpr - qualifiers: - nrf54l15/cpuapp - nrf54l15/cpuflpr @@ -147,6 +161,12 @@ runners: - qualifiers: - nrf9161 - nrf9161/ns + - qualifiers: + - nrf54l05/cpuapp + - nrf54l05/cpuflpr + - qualifiers: + - nrf54l10/cpuapp + - nrf54l10/cpuflpr - qualifiers: - nrf54l15/cpuapp - nrf54l15/cpuflpr @@ -200,6 +220,12 @@ runners: - qualifiers: - nrf9161 - nrf9161/ns + - qualifiers: + - nrf54l05/cpuapp + - nrf54l05/cpuflpr + - qualifiers: + - nrf54l10/cpuapp + - nrf54l10/cpuflpr - qualifiers: - nrf54l15/cpuapp - nrf54l15/cpuflpr diff --git a/tests/kernel/interrupt/src/nested_irq.c b/tests/kernel/interrupt/src/nested_irq.c index 6d84dda2ef8e3..d488be5b42684 100644 --- a/tests/kernel/interrupt/src/nested_irq.c +++ b/tests/kernel/interrupt/src/nested_irq.c @@ -56,7 +56,7 @@ */ #define IRQ0_PRIO IRQ_DEFAULT_PRIORITY #define IRQ1_PRIO 0x0 -#elif defined(CONFIG_SOC_NRF54L15_CPUFLPR) +#elif defined(CONFIG_SOC_SERIES_NRF54LX) && defined(CONFIG_RISCV_CORE_NORDIC_VPR) #define IRQ0_LINE 16 #define IRQ1_LINE 17 diff --git a/west.yml b/west.yml index 6edfccef606c3..05fe0f68eb1c0 100644 --- a/west.yml +++ b/west.yml @@ -188,7 +188,7 @@ manifest: groups: - hal - name: hal_nordic - revision: 5c8d109371ebb740fbef1f440a3b59e488a36717 + revision: pull/257/head path: modules/hal/nordic groups: - hal