diff --git a/MAINTAINERS.yml b/MAINTAINERS.yml index d7154422342f8..846d4cc2bf63b 100644 --- a/MAINTAINERS.yml +++ b/MAINTAINERS.yml @@ -3680,7 +3680,7 @@ NXP Drivers: - drivers/*/*.mcux - drivers/*/*.nxp - drivers/*/*nxp* - - drivers/*/*kinetis* + - drivers/*/*/*kinetis* - drivers/misc/*/nxp* - include/zephyr/dt-bindings/*/*nxp* - include/zephyr/dt-bindings/*/*mcux* diff --git a/boards/nxp/ucans32k1sic/doc/index.rst b/boards/nxp/ucans32k1sic/doc/index.rst index 3aacf0459ddb2..8468d46669bb0 100644 --- a/boards/nxp/ucans32k1sic/doc/index.rst +++ b/boards/nxp/ucans32k1sic/doc/index.rst @@ -60,7 +60,7 @@ This board has 5 GPIO ports named from ``gpioa`` to ``gpioe``. Pin control can be further configured from your application overlay by adding children nodes with the desired pinmux configuration to the singleton node ``pinctrl``. Supported properties are described in -:zephyr_file:`dts/bindings/pinctrl/nxp,kinetis-pinctrl.yaml`. +:zephyr_file:`dts/bindings/pinctrl/nxp,port-pinctrl.yaml`. LEDs ---- diff --git a/doc/releases/migration-guide-4.1.rst b/doc/releases/migration-guide-4.1.rst index 4319afe2080c4..bdbef74554424 100644 --- a/doc/releases/migration-guide-4.1.rst +++ b/doc/releases/migration-guide-4.1.rst @@ -70,6 +70,12 @@ Interrupt Controller LED Strip ========= +Pin Control +=========== + + * Renamed the ``compatible`` from ``nxp,kinetis-pinctrl`` to :dtcompatible:`nxp,port-pinctrl`. + * Renamed the ``compatible`` from ``nxp,kinetis-pinmux`` to :dtcompatible:`nxp,port-pinmux`. + Sensors ======= diff --git a/drivers/clock_control/clock_control_mcux_syscon.c b/drivers/clock_control/clock_control_mcux_syscon.c index ca772e2cdd459..3229c7a9ecc7a 100644 --- a/drivers/clock_control/clock_control_mcux_syscon.c +++ b/drivers/clock_control/clock_control_mcux_syscon.c @@ -44,7 +44,7 @@ static int mcux_lpc_syscon_clock_control_on(const struct device *dev, } #endif -#if defined(CONFIG_PINCTRL_NXP_KINETIS) +#if defined(CONFIG_PINCTRL_NXP_PORT) switch ((uint32_t)sub_system) { #if defined(CONFIG_SOC_SERIES_MCXA) case MCUX_PORT0_CLK: @@ -82,7 +82,7 @@ static int mcux_lpc_syscon_clock_control_on(const struct device *dev, default: break; } -#endif /* defined(CONFIG_PINCTRL_NXP_KINETIS) */ +#endif /* defined(CONFIG_PINCTRL_NXP_PORT) */ #ifdef CONFIG_ETH_NXP_ENET_QOS if ((uint32_t)sub_system == MCUX_ENET_QOS_CLK) { diff --git a/drivers/pinctrl/CMakeLists.txt b/drivers/pinctrl/CMakeLists.txt index 99cb8d6b9e5f9..d83272acf1e2b 100644 --- a/drivers/pinctrl/CMakeLists.txt +++ b/drivers/pinctrl/CMakeLists.txt @@ -15,7 +15,7 @@ zephyr_library_sources_ifdef(CONFIG_PINCTRL_RPI_PICO pinctrl_rpi_pico.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_SAM pinctrl_sam.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_SAM0 pinctrl_sam0.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_STM32 pinctrl_stm32.c) -zephyr_library_sources_ifdef(CONFIG_PINCTRL_NXP_KINETIS pinctrl_kinetis.c) +zephyr_library_sources_ifdef(CONFIG_PINCTRL_NXP_PORT pinctrl_nxp_port.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_MCHP_XEC pinctrl_mchp_xec.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_IMX pinctrl_imx.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_SIFIVE pinctrl_sifive.c) diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 511a8a22cb9ca..5dcb9be4d734a 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -44,7 +44,7 @@ source "drivers/pinctrl/Kconfig.rpi_pico" source "drivers/pinctrl/Kconfig.sam" source "drivers/pinctrl/Kconfig.sam0" source "drivers/pinctrl/Kconfig.stm32" -source "drivers/pinctrl/Kconfig.kinetis" +source "drivers/pinctrl/Kconfig.nxp_port" source "drivers/pinctrl/Kconfig.xec" source "drivers/pinctrl/Kconfig.imx" source "drivers/pinctrl/Kconfig.sifive" diff --git a/drivers/pinctrl/Kconfig.kinetis b/drivers/pinctrl/Kconfig.kinetis deleted file mode 100644 index 04c2ee04df239..0000000000000 --- a/drivers/pinctrl/Kconfig.kinetis +++ /dev/null @@ -1,9 +0,0 @@ -# Copyright (c) 2022 NXP -# SPDX-License-Identifier: Apache-2.0 - -config PINCTRL_NXP_KINETIS - bool "Pin controller driver for NXP Kinetis MCUs" - default y - depends on DT_HAS_NXP_KINETIS_PINMUX_ENABLED - help - Enable pin controller driver for NXP Kinetis MCUs diff --git a/drivers/pinctrl/Kconfig.nxp_port b/drivers/pinctrl/Kconfig.nxp_port new file mode 100644 index 0000000000000..0aed599cf9438 --- /dev/null +++ b/drivers/pinctrl/Kconfig.nxp_port @@ -0,0 +1,9 @@ +# Copyright 2022, 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +config PINCTRL_NXP_PORT + bool "Pin controller driver for NXP PORT peripheral" + default y + depends on DT_HAS_NXP_PORT_PINMUX_ENABLED + help + Enable pin controller driver for NXP PORT peripheral diff --git a/drivers/pinctrl/pinctrl_kinetis.c b/drivers/pinctrl/pinctrl_nxp_port.c similarity index 88% rename from drivers/pinctrl/pinctrl_kinetis.c rename to drivers/pinctrl/pinctrl_nxp_port.c index bc250d742cf3f..4af6602703f43 100644 --- a/drivers/pinctrl/pinctrl_kinetis.c +++ b/drivers/pinctrl/pinctrl_nxp_port.c @@ -5,14 +5,14 @@ */ -#define DT_DRV_COMPAT nxp_kinetis_pinmux +#define DT_DRV_COMPAT nxp_port_pinmux #include #include #include #include -LOG_MODULE_REGISTER(pinctrl_kinetis, CONFIG_PINCTRL_LOG_LEVEL); +LOG_MODULE_REGISTER(pinctrl_nxp_port, CONFIG_PINCTRL_LOG_LEVEL); /* Port register addresses. */ static PORT_Type *ports[] = { @@ -32,7 +32,7 @@ static PORT_Type *ports[] = { #define PIN(mux) (((mux) & 0xFC00000) >> 22) #define PORT(mux) (((mux) & 0xF0000000) >> 28) -#define PINCFG(mux) ((mux) & Z_PINCTRL_KINETIS_PCR_MASK) +#define PINCFG(mux) ((mux) & Z_PINCTRL_NXP_PORT_PCR_MASK) struct pinctrl_mcux_config { const struct device *clock_dev; @@ -47,15 +47,11 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uint8_t pin = PIN(pins[i]); uint16_t mux = PINCFG(pins[i]); - base->PCR[pin] = (base->PCR[pin] & (~Z_PINCTRL_KINETIS_PCR_MASK)) | mux; + base->PCR[pin] = (base->PCR[pin] & (~Z_PINCTRL_NXP_PORT_PCR_MASK)) | mux; } return 0; } -/* Kinetis pinmux driver binds to the same DTS nodes, - * and handles clock init. Only bind to these nodes if pinmux driver - * is disabled. - */ static int pinctrl_mcux_init(const struct device *dev) { const struct pinctrl_mcux_config *config = dev->config; diff --git a/dts/arm/nxp/nxp_k2x.dtsi b/dts/arm/nxp/nxp_k2x.dtsi index 147ccffde0bb0..82f594e84e126 100644 --- a/dts/arm/nxp/nxp_k2x.dtsi +++ b/dts/arm/nxp/nxp_k2x.dtsi @@ -55,7 +55,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -194,31 +194,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; }; diff --git a/dts/arm/nxp/nxp_k6x.dtsi b/dts/arm/nxp/nxp_k6x.dtsi index 38c8dfe0517a0..f478e1eb1a828 100644 --- a/dts/arm/nxp/nxp_k6x.dtsi +++ b/dts/arm/nxp/nxp_k6x.dtsi @@ -74,7 +74,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -255,31 +255,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; }; diff --git a/dts/arm/nxp/nxp_k8x.dtsi b/dts/arm/nxp/nxp_k8x.dtsi index aeb747add09c5..7270656fd0693 100644 --- a/dts/arm/nxp/nxp_k8x.dtsi +++ b/dts/arm/nxp/nxp_k8x.dtsi @@ -34,7 +34,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -260,31 +260,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; }; diff --git a/dts/arm/nxp/nxp_ke1xf.dtsi b/dts/arm/nxp/nxp_ke1xf.dtsi index c6280351ca36f..e43ce5942785f 100644 --- a/dts/arm/nxp/nxp_ke1xf.dtsi +++ b/dts/arm/nxp/nxp_ke1xf.dtsi @@ -92,7 +92,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -422,31 +422,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0x1000>; clocks = <&pcc 0x124 KINETIS_PCC_SRC_NONE_OR_EXT>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0x1000>; clocks = <&pcc 0x128 KINETIS_PCC_SRC_NONE_OR_EXT>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0x1000>; clocks = <&pcc 0x12c KINETIS_PCC_SRC_NONE_OR_EXT>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0x1000>; clocks = <&pcc 0x130 KINETIS_PCC_SRC_NONE_OR_EXT>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0x1000>; clocks = <&pcc 0x134 KINETIS_PCC_SRC_NONE_OR_EXT>; }; diff --git a/dts/arm/nxp/nxp_ke1xz.dtsi b/dts/arm/nxp/nxp_ke1xz.dtsi index 6268ffb9aa464..7c40a9adbc26b 100644 --- a/dts/arm/nxp/nxp_ke1xz.dtsi +++ b/dts/arm/nxp/nxp_ke1xz.dtsi @@ -67,7 +67,7 @@ }; pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; }; soc { @@ -187,31 +187,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0x1000>; clocks = <&pcc 0x124 KINETIS_PCC_SRC_NONE_OR_EXT>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0x1000>; clocks = <&pcc 0x128 KINETIS_PCC_SRC_NONE_OR_EXT>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0x1000>; clocks = <&pcc 0x12c KINETIS_PCC_SRC_NONE_OR_EXT>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0x1000>; clocks = <&pcc 0x130 KINETIS_PCC_SRC_NONE_OR_EXT>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0x1000>; clocks = <&pcc 0x134 KINETIS_PCC_SRC_NONE_OR_EXT>; }; diff --git a/dts/arm/nxp/nxp_kl25z.dtsi b/dts/arm/nxp/nxp_kl25z.dtsi index bd1e30a98191d..c41820d63fdc9 100644 --- a/dts/arm/nxp/nxp_kl25z.dtsi +++ b/dts/arm/nxp/nxp_kl25z.dtsi @@ -31,7 +31,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -119,31 +119,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; }; diff --git a/dts/arm/nxp/nxp_kv5x.dtsi b/dts/arm/nxp/nxp_kv5x.dtsi index 6569d57b43170..230e0dccf62f6 100644 --- a/dts/arm/nxp/nxp_kv5x.dtsi +++ b/dts/arm/nxp/nxp_kv5x.dtsi @@ -29,7 +29,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -177,31 +177,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; }; diff --git a/dts/arm/nxp/nxp_kw2xd.dtsi b/dts/arm/nxp/nxp_kw2xd.dtsi index b0fd41ba9a335..e394885aa8a50 100644 --- a/dts/arm/nxp/nxp_kw2xd.dtsi +++ b/dts/arm/nxp/nxp_kw2xd.dtsi @@ -34,7 +34,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; /* * KW2XD is a system in package part, so the SPI1 controller is @@ -176,31 +176,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; }; diff --git a/dts/arm/nxp/nxp_kw40z.dtsi b/dts/arm/nxp/nxp_kw40z.dtsi index 06df329b44eb4..9046fe56a880d 100644 --- a/dts/arm/nxp/nxp_kw40z.dtsi +++ b/dts/arm/nxp/nxp_kw40z.dtsi @@ -32,7 +32,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -124,19 +124,19 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; diff --git a/dts/arm/nxp/nxp_kw41z.dtsi b/dts/arm/nxp/nxp_kw41z.dtsi index 87c69d17f5e4d..a3e61d11e7691 100644 --- a/dts/arm/nxp/nxp_kw41z.dtsi +++ b/dts/arm/nxp/nxp_kw41z.dtsi @@ -37,7 +37,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -131,19 +131,19 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; diff --git a/dts/arm/nxp/nxp_mcxa156.dtsi b/dts/arm/nxp/nxp_mcxa156.dtsi index 3397861dc6392..900b18b810990 100644 --- a/dts/arm/nxp/nxp_mcxa156.dtsi +++ b/dts/arm/nxp/nxp_mcxa156.dtsi @@ -24,7 +24,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -50,31 +50,31 @@ }; porta: pinmux@400bc000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x400bc000 0x1000>; clocks = <&syscon MCUX_PORT0_CLK>; }; portb: pinmux@400bd000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x400bd000 0x1000>; clocks = <&syscon MCUX_PORT1_CLK>; }; portc: pinmux@400be000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x400be000 0x1000>; clocks = <&syscon MCUX_PORT2_CLK>; }; portd: pinmux@400bf000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x400bf000 0x1000>; clocks = <&syscon MCUX_PORT3_CLK>; }; porte: pinmux@400c0000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x400c0000 0x1000>; clocks = <&syscon MCUX_PORT4_CLK>; }; diff --git a/dts/arm/nxp/nxp_mcxc_common.dtsi b/dts/arm/nxp/nxp_mcxc_common.dtsi index ef0b7f807e1e5..07c867ce1263d 100644 --- a/dts/arm/nxp/nxp_mcxc_common.dtsi +++ b/dts/arm/nxp/nxp_mcxc_common.dtsi @@ -35,7 +35,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -107,31 +107,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; }; diff --git a/dts/arm/nxp/nxp_mcxn23x_common.dtsi b/dts/arm/nxp/nxp_mcxn23x_common.dtsi index 3857b30af8dc9..d44324ac6f836 100644 --- a/dts/arm/nxp/nxp_mcxn23x_common.dtsi +++ b/dts/arm/nxp/nxp_mcxn23x_common.dtsi @@ -30,7 +30,7 @@ }; pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; }; @@ -74,37 +74,37 @@ }; porta: pinmux@116000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x116000 0x1000>; clocks = <&syscon MCUX_PORT0_CLK>; }; portb: pinmux@117000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x117000 0x1000>; clocks = <&syscon MCUX_PORT1_CLK>; }; portc: pinmux@118000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x118000 0x1000>; clocks = <&syscon MCUX_PORT2_CLK>; }; portd: pinmux@119000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x119000 0x1000>; clocks = <&syscon MCUX_PORT3_CLK>; }; porte: pinmux@11a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x11a000 0x1000>; clocks = <&syscon MCUX_PORT4_CLK>; }; portf: pinmux@42000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x42000 0x1000>; clocks = <&syscon MCUX_PORT5_CLK>; }; diff --git a/dts/arm/nxp/nxp_mcxn94x_common.dtsi b/dts/arm/nxp/nxp_mcxn94x_common.dtsi index fd36a4c2aef08..859916a094a2a 100644 --- a/dts/arm/nxp/nxp_mcxn94x_common.dtsi +++ b/dts/arm/nxp/nxp_mcxn94x_common.dtsi @@ -35,7 +35,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; }; @@ -80,37 +80,37 @@ }; porta: pinmux@116000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x116000 0x1000>; clocks = <&syscon MCUX_PORT0_CLK>; }; portb: pinmux@117000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x117000 0x1000>; clocks = <&syscon MCUX_PORT1_CLK>; }; portc: pinmux@118000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x118000 0x1000>; clocks = <&syscon MCUX_PORT2_CLK>; }; portd: pinmux@119000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x119000 0x1000>; clocks = <&syscon MCUX_PORT3_CLK>; }; porte: pinmux@11a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x11a000 0x1000>; clocks = <&syscon MCUX_PORT4_CLK>; }; portf: pinmux@42000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x42000 0x1000>; clocks = <&syscon MCUX_PORT5_CLK>; }; diff --git a/dts/arm/nxp/nxp_mcxw71.dtsi b/dts/arm/nxp/nxp_mcxw71.dtsi index e17ae42ea5f8a..695c0fd65bb54 100644 --- a/dts/arm/nxp/nxp_mcxw71.dtsi +++ b/dts/arm/nxp/nxp_mcxw71.dtsi @@ -116,7 +116,7 @@ }; pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; }; }; @@ -147,25 +147,25 @@ }; porta: pinctrl@42000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x42000 0xe0>; clocks = <&scg SCG_K4_SLOW_CLK 0x108>; }; portb: pinctrl@43000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x43000 0xe0>; clocks = <&scg SCG_K4_SLOW_CLK 0x10c>; }; portc: pinctrl@44000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x44000 0xe0>; clocks = <&scg SCG_K4_SLOW_CLK 0x110>; }; portd: pinctrl@45000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x45000 0xe0>; clocks = <&scg SCG_K4_SLOW_CLK 0>; }; diff --git a/dts/arm/nxp/nxp_s32k1xx.dtsi b/dts/arm/nxp/nxp_s32k1xx.dtsi index db200638781a2..8668b3aed2012 100644 --- a/dts/arm/nxp/nxp_s32k1xx.dtsi +++ b/dts/arm/nxp/nxp_s32k1xx.dtsi @@ -25,7 +25,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -99,31 +99,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0x1000>; clocks = <&clock NXP_S32_PORTA_CLK>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0x1000>; clocks = <&clock NXP_S32_PORTB_CLK>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0x1000>; clocks = <&clock NXP_S32_PORTC_CLK>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0x1000>; clocks = <&clock NXP_S32_PORTD_CLK>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0x1000>; clocks = <&clock NXP_S32_PORTE_CLK>; }; diff --git a/dts/bindings/pinctrl/nxp,kinetis-pinctrl.yaml b/dts/bindings/pinctrl/nxp,port-pinctrl.yaml similarity index 73% rename from dts/bindings/pinctrl/nxp,kinetis-pinctrl.yaml rename to dts/bindings/pinctrl/nxp,port-pinctrl.yaml index 819ab7e2ab750..ec0968022503c 100644 --- a/dts/bindings/pinctrl/nxp,kinetis-pinctrl.yaml +++ b/dts/bindings/pinctrl/nxp,port-pinctrl.yaml @@ -2,13 +2,14 @@ # SPDX-License-Identifier: Apache-2.0 description: | - Kinetis pinctrl node. This node will define pin configurations in pin groups, - and has the 'pinctrl' node identifier in the SOC's devicetree. Each group - within the pin configuration defines the pin configuration for a peripheral, - and each numbered subgroup in the pin group defines all the pins for that - peripheral with the same configuration properties. The 'pins' property in - a group selects the pins to be configured, and the remaining properties set - configuration values for those pins. Here is an example group for UART0 pins: + NXP PORT pinctrl node. This node will define pin configurations in pin + groups, and has the 'pinctrl' node identifier in the SOC's devicetree. Each + group within the pin configuration defines the pin configuration for a + peripheral, and each numbered subgroup in the pin group defines all the pins + for that peripheral with the same configuration properties. The 'pins' + property in a group selects the pins to be configured, and the remaining + properties set configuration values for those pins. Here is an example + group for UART0 pins: uart0_default: uart0_default { group0 { @@ -28,15 +29,15 @@ description: | PCR_DSE=, PCR_PFE=0 -compatible: "nxp,kinetis-pinctrl" +compatible: "nxp,port-pinctrl" include: base.yaml child-binding: - description: Kinetis pin controller pin group + description: NXP PORT pin controller pin group child-binding: description: | - Kinetis pin controller pin configuration node + NXP PORT pin controller pin configuration node include: - name: pincfg-node.yaml diff --git a/dts/bindings/pinctrl/nxp,kinetis-pinmux.yaml b/dts/bindings/pinctrl/nxp,port-pinmux.yaml similarity index 67% rename from dts/bindings/pinctrl/nxp,kinetis-pinmux.yaml rename to dts/bindings/pinctrl/nxp,port-pinmux.yaml index d81e5a4ad8791..7bdb56b2b5ec6 100644 --- a/dts/bindings/pinctrl/nxp,kinetis-pinmux.yaml +++ b/dts/bindings/pinctrl/nxp,port-pinmux.yaml @@ -1,6 +1,6 @@ -description: Kinetis pinmux node +description: NXP PORT pinmux node -compatible: "nxp,kinetis-pinmux" +compatible: "nxp,port-pinmux" include: base.yaml diff --git a/include/zephyr/drivers/pinctrl/pinctrl_soc_kinetis_common.h b/include/zephyr/drivers/pinctrl/pinctrl_nxp_port_common.h similarity index 57% rename from include/zephyr/drivers/pinctrl/pinctrl_soc_kinetis_common.h rename to include/zephyr/drivers/pinctrl/pinctrl_nxp_port_common.h index 2d9f9ff1ed499..e7976b5c6ed1d 100644 --- a/include/zephyr/drivers/pinctrl/pinctrl_soc_kinetis_common.h +++ b/include/zephyr/drivers/pinctrl/pinctrl_nxp_port_common.h @@ -6,50 +6,49 @@ /* * @file - * NXP Kinetis SOC specific helpers for pinctrl driver + * NXP PORT SOC specific helpers for pinctrl driver */ -#ifndef ZEPHYR_SOC_ARM_NXP_KINETIS_COMMON_PINCTRL_SOC_H_ -#define ZEPHYR_SOC_ARM_NXP_KINETIS_COMMON_PINCTRL_SOC_H_ +#ifndef ZEPHYR_INCLUDE_DRIVERS_PINCTRL_PINCTRL_NXP_PORT_COMMON_H_ +#define ZEPHYR_INCLUDE_DRIVERS_PINCTRL_PINCTRL_NXP_PORT_COMMON_H_ /** @cond INTERNAL_HIDDEN */ #include #include +/* Include SOC headers, so we get definitions for PCR bitmasks */ +#include + #ifdef __cplusplus extern "C" { #endif - -typedef uint32_t pinctrl_soc_pin_t; - -/* Kinetis KW/KL/KE series does not support open drain. Define macros to have no effect - * Note: KW22 and KW24 do support open drain, rest of KW series does not +/* + * Some PORT IP instantiations lack certain features, include input buffers, + * open drain, and slew rate. If masks aren't defined for these bitfields, + * define them to have no effect */ -/* clang-format off */ -#if (defined(CONFIG_SOC_SERIES_KINETIS_KWX) && \ - !(defined(CONFIG_SOC_MKW24D5) || defined(CONFIG_SOC_MKW22D5))) || \ - defined(CONFIG_SOC_SERIES_KINETIS_KL2X) || defined(CONFIG_SOC_SERIES_KINETIS_KE1XF) || \ - defined(CONFIG_SOC_SERIES_KE1XZ) -#define PORT_PCR_ODE(x) 0x0 -#define PORT_PCR_ODE_MASK 0x0 +#ifndef PORT_PCR_IBE_MASK /* Input buffer enable */ +#define PORT_PCR_IBE_MASK 0x0 +#define PORT_PCR_IBE(x) 0x0 #endif -/* clang-format on */ -/* Kinetis KE series does not support slew rate. Define macros to have no effect */ -#if defined(CONFIG_SOC_SERIES_KINETIS_KE1XF) || defined(CONFIG_SOC_SERIES_KE1XZ) -#define PORT_PCR_SRE(x) 0x0 +#ifndef PORT_PCR_SRE_MASK /* Slew rate */ #define PORT_PCR_SRE_MASK 0x0 +#define PORT_PCR_SRE(x) 0x0 #endif -#if !(defined(CONFIG_SOC_SERIES_MCXA)) -#define PORT_PCR_IBE(x) 0x0 -#define PORT_PCR_IBE_MASK 0x0 +#ifndef PORT_PCR_ODE_MASK /* Open drain */ +#define PORT_PCR_ODE_MASK 0x0 +#define PORT_PCR_ODE(x) 0x0 #endif -#define Z_PINCTRL_KINETIS_PINCFG(node_id) \ + +typedef uint32_t pinctrl_soc_pin_t; + +#define Z_PINCTRL_NXP_PORT_PINCFG(node_id) \ (PORT_PCR_DSE(DT_ENUM_IDX(node_id, drive_strength)) | \ PORT_PCR_PS(DT_PROP(node_id, bias_pull_up)) | \ PORT_PCR_PE(DT_PROP(node_id, bias_pull_up)) | \ @@ -59,12 +58,12 @@ typedef uint32_t pinctrl_soc_pin_t; PORT_PCR_IBE(DT_PROP(node_id, input_enable)) | \ PORT_PCR_PFE(DT_PROP(node_id, nxp_passive_filter))) -#define Z_PINCTRL_KINETIS_PCR_MASK \ +#define Z_PINCTRL_NXP_PORT_PCR_MASK \ (PORT_PCR_MUX_MASK | PORT_PCR_DSE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_PFE_MASK | \ PORT_PCR_IBE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_PE_MASK | PORT_PCR_PS_MASK) #define Z_PINCTRL_STATE_PIN_INIT(group, pin_prop, idx) \ - DT_PROP_BY_IDX(group, pin_prop, idx) | Z_PINCTRL_KINETIS_PINCFG(group), + DT_PROP_BY_IDX(group, pin_prop, idx) | Z_PINCTRL_NXP_PORT_PINCFG(group), #define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \ {DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), DT_FOREACH_PROP_ELEM, pinmux, \ @@ -76,4 +75,4 @@ typedef uint32_t pinctrl_soc_pin_t; /** @endcond */ -#endif /* ZEPHYR_SOC_ARM_NXP_KINETIS_COMMON_PINCTRL_SOC_H_ */ +#endif /* ZEPHYR_INCLUDE_DRIVERS_PINCTRL_PINCTRL_NXP_PORT_COMMON_H_ */ diff --git a/soc/nxp/kinetis/common/pinctrl_soc.h b/soc/nxp/kinetis/common/pinctrl_soc.h index 9a6c34358d02c..c94682a1bd035 100644 --- a/soc/nxp/kinetis/common/pinctrl_soc.h +++ b/soc/nxp/kinetis/common/pinctrl_soc.h @@ -4,4 +4,4 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include +#include diff --git a/soc/nxp/mcx/mcxa/pinctrl_soc.h b/soc/nxp/mcx/mcxa/pinctrl_soc.h index 9a6c34358d02c..c94682a1bd035 100644 --- a/soc/nxp/mcx/mcxa/pinctrl_soc.h +++ b/soc/nxp/mcx/mcxa/pinctrl_soc.h @@ -4,4 +4,4 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include +#include diff --git a/soc/nxp/mcx/mcxc/pinctrl_soc.h b/soc/nxp/mcx/mcxc/pinctrl_soc.h index 1ed27294b8ff2..c94682a1bd035 100644 --- a/soc/nxp/mcx/mcxc/pinctrl_soc.h +++ b/soc/nxp/mcx/mcxc/pinctrl_soc.h @@ -4,46 +4,4 @@ * SPDX-License-Identifier: Apache-2.0 */ -#ifndef ZEPHYR_SOC_ARM_NXP_MCXC_COMMON_PINCTRL_SOC_H_ -#define ZEPHYR_SOC_ARM_NXP_MCXC_COMMON_PINCTRL_SOC_H_ - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -typedef uint32_t pinctrl_soc_pin_t; - -/* MCXC series does not support open drain. Define macros to have no effect */ -#define PORT_PCR_ODE(x) 0x0 -#define PORT_PCR_ODE_MASK 0x0 - -#define Z_PINCTRL_MCXC_PINCFG(node_id) \ - (PORT_PCR_DSE(DT_ENUM_IDX(node_id, drive_strength)) | \ - PORT_PCR_PS(DT_PROP(node_id, bias_pull_up)) | \ - PORT_PCR_PE(DT_PROP(node_id, bias_pull_up)) | \ - PORT_PCR_PE(DT_PROP(node_id, bias_pull_down)) | \ - PORT_PCR_ODE(DT_PROP(node_id, drive_open_drain)) | \ - PORT_PCR_SRE(DT_ENUM_IDX(node_id, slew_rate)) | \ - PORT_PCR_PFE(DT_PROP(node_id, nxp_passive_filter))) - -#define Z_PINCTRL_KINETIS_PCR_MASK \ - (PORT_PCR_MUX_MASK | PORT_PCR_DSE_MASK | PORT_PCR_ODE_MASK | \ - PORT_PCR_PFE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_PE_MASK | \ - PORT_PCR_PS_MASK) - - -#define Z_PINCTRL_STATE_PIN_INIT(group, pin_prop, idx) \ - DT_PROP_BY_IDX(group, pin_prop, idx) | Z_PINCTRL_MCXC_PINCFG(group), - -#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \ - {DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), \ - DT_FOREACH_PROP_ELEM, pinmux, Z_PINCTRL_STATE_PIN_INIT)}; - -#ifdef __cplusplus -} -#endif - -#endif /* ZEPHYR_SOC_ARM_NXP_MCXC_COMMON_PINCTRL_SOC_H_ */ +#include diff --git a/soc/nxp/mcx/mcxn/pinctrl_soc.h b/soc/nxp/mcx/mcxn/pinctrl_soc.h index 4869fb581806d..c94682a1bd035 100644 --- a/soc/nxp/mcx/mcxn/pinctrl_soc.h +++ b/soc/nxp/mcx/mcxn/pinctrl_soc.h @@ -4,43 +4,4 @@ * SPDX-License-Identifier: Apache-2.0 */ -#ifndef ZEPHYR_SOC_ARM_NXP_MCX_COMMON_PINCTRL_SOC_H_ -#define ZEPHYR_SOC_ARM_NXP_MCX_COMMON_PINCTRL_SOC_H_ - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -typedef uint32_t pinctrl_soc_pin_t; - -#define Z_PINCTRL_MCX_PINCFG(node_id) \ - (PORT_PCR_DSE(DT_ENUM_IDX(node_id, drive_strength)) | \ - PORT_PCR_PS(DT_PROP(node_id, bias_pull_up)) | \ - PORT_PCR_PE(DT_PROP(node_id, bias_pull_up)) | \ - PORT_PCR_PE(DT_PROP(node_id, bias_pull_down)) | \ - PORT_PCR_ODE(DT_PROP(node_id, drive_open_drain)) | \ - PORT_PCR_SRE(DT_ENUM_IDX(node_id, slew_rate)) | \ - PORT_PCR_IBE(DT_PROP(node_id, input_enable)) | \ - PORT_PCR_PFE(DT_PROP(node_id, nxp_passive_filter))) - -#define Z_PINCTRL_KINETIS_PCR_MASK \ - (PORT_PCR_IBE_MASK | PORT_PCR_MUX_MASK | PORT_PCR_DSE_MASK | \ - PORT_PCR_ODE_MASK | PORT_PCR_PFE_MASK | PORT_PCR_SRE_MASK | \ - PORT_PCR_PE_MASK | PORT_PCR_PS_MASK) - - -#define Z_PINCTRL_STATE_PIN_INIT(group, pin_prop, idx) \ - DT_PROP_BY_IDX(group, pin_prop, idx) | Z_PINCTRL_MCX_PINCFG(group), - -#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \ - {DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), \ - DT_FOREACH_PROP_ELEM, pinmux, Z_PINCTRL_STATE_PIN_INIT)}; - -#ifdef __cplusplus -} -#endif - -#endif /* ZEPHYR_SOC_ARM_NXP_MCX_COMMON_PINCTRL_SOC_H_ */ +#include diff --git a/soc/nxp/mcx/mcxw/pinctrl_soc.h b/soc/nxp/mcx/mcxw/pinctrl_soc.h index 9a6c34358d02c..c94682a1bd035 100644 --- a/soc/nxp/mcx/mcxw/pinctrl_soc.h +++ b/soc/nxp/mcx/mcxw/pinctrl_soc.h @@ -4,4 +4,4 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include +#include diff --git a/soc/nxp/s32/s32k1/pinctrl_soc.h b/soc/nxp/s32/s32k1/pinctrl_soc.h index fde3c12954fe4..2fe9e89303644 100644 --- a/soc/nxp/s32/s32k1/pinctrl_soc.h +++ b/soc/nxp/s32/s32k1/pinctrl_soc.h @@ -1,48 +1,7 @@ /* - * Copyright 2023 NXP + * Copyright 2023-2024 NXP * * SPDX-License-Identifier: Apache-2.0 */ -/* - * @file - * NXP S32K1 SOC specific helpers for pinctrl driver - */ - -#ifndef ZEPHYR_SOC_ARM_NXP_S32_S32K1_PINCTRL_SOC_H_ -#define ZEPHYR_SOC_ARM_NXP_S32_S32K1_PINCTRL_SOC_H_ - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @cond INTERNAL_HIDDEN */ - -typedef uint32_t pinctrl_soc_pin_t; - -#define Z_PINCTRL_KINETIS_PINCFG(node_id) \ - (PORT_PCR_DSE(DT_ENUM_IDX(node_id, drive_strength)) | \ - PORT_PCR_PS(DT_PROP(node_id, bias_pull_up)) | \ - PORT_PCR_PE(DT_PROP(node_id, bias_pull_up)) | \ - PORT_PCR_PE(DT_PROP(node_id, bias_pull_down)) | \ - PORT_PCR_PFE(DT_PROP(node_id, nxp_passive_filter))) - -#define Z_PINCTRL_KINETIS_PCR_MASK \ - (PORT_PCR_MUX_MASK | PORT_PCR_DSE_MASK | PORT_PCR_PFE_MASK | \ - PORT_PCR_PE_MASK | PORT_PCR_PS_MASK) - -#define Z_PINCTRL_STATE_PIN_INIT(group, pin_prop, idx) \ - DT_PROP_BY_IDX(group, pin_prop, idx) | Z_PINCTRL_KINETIS_PINCFG(group), - -#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \ - {DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), \ - DT_FOREACH_PROP_ELEM, pinmux, Z_PINCTRL_STATE_PIN_INIT)}; - -#ifdef __cplusplus -} -#endif - -#endif /* ZEPHYR_SOC_ARM_NXP_S32_S32K1_PINCTRL_SOC_H_ */ +#include diff --git a/west.yml b/west.yml index 8f691d40f74cd..94676fef4230e 100644 --- a/west.yml +++ b/west.yml @@ -198,7 +198,7 @@ manifest: groups: - hal - name: hal_nxp - revision: 3c64cd63125c86870802a561ce79dc33697b005c + revision: cae40020064894f67b00215dad2baf7c743e1dfb path: modules/hal/nxp groups: - hal