diff --git a/boards/infineon/cy8cproto_062_4343w/cy8cproto_062_4343w_defconfig b/boards/infineon/cy8cproto_062_4343w/cy8cproto_062_4343w_defconfig
index 2bda7847628ab..221643eca2791 100644
--- a/boards/infineon/cy8cproto_062_4343w/cy8cproto_062_4343w_defconfig
+++ b/boards/infineon/cy8cproto_062_4343w/cy8cproto_062_4343w_defconfig
@@ -17,6 +17,9 @@ CONFIG_UART_CONSOLE=y
 # Enable UART driver
 CONFIG_SERIAL=y
 
+# Enable GPIO driver
+CONFIG_GPIO=y
+
 # Enable clock controller
 CONFIG_CLOCK_CONTROL=y
 
diff --git a/boards/infineon/cy8cproto_063_ble/cy8cproto_063_ble_defconfig b/boards/infineon/cy8cproto_063_ble/cy8cproto_063_ble_defconfig
index 98136255552ab..7d0d29ea39cc9 100644
--- a/boards/infineon/cy8cproto_063_ble/cy8cproto_063_ble_defconfig
+++ b/boards/infineon/cy8cproto_063_ble/cy8cproto_063_ble_defconfig
@@ -18,6 +18,9 @@ CONFIG_UART_CONSOLE=y
 # Enable UART driver
 CONFIG_SERIAL=y
 
+# Enable GPIO
+CONFIG_GPIO=y
+
 # Enable clock controller
 CONFIG_CLOCK_CONTROL=y
 
diff --git a/boards/infineon/cyw920829m2evk_02/cyw920829m2evk_02_defconfig b/boards/infineon/cyw920829m2evk_02/cyw920829m2evk_02_defconfig
index 14c8035580030..426cd85d30f37 100644
--- a/boards/infineon/cyw920829m2evk_02/cyw920829m2evk_02_defconfig
+++ b/boards/infineon/cyw920829m2evk_02/cyw920829m2evk_02_defconfig
@@ -18,6 +18,9 @@ CONFIG_UART_CONSOLE=y
 # Enable UART driver
 CONFIG_SERIAL=y
 
+# Enable GPIO driver
+CONFIG_GPIO=y
+
 # Enable clock controller
 CONFIG_CLOCK_CONTROL=y
 
diff --git a/tests/arch/arm/arm_irq_advanced_features/boards/cy8cproto_062_4343w.overlay b/tests/arch/arm/arm_irq_advanced_features/boards/cy8cproto_062_4343w.overlay
new file mode 100644
index 0000000000000..bd164a6bf2885
--- /dev/null
+++ b/tests/arch/arm/arm_irq_advanced_features/boards/cy8cproto_062_4343w.overlay
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2024 Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Changed default interrupts priority for GPIO to 4 */
+&gpio_prt0 {
+	interrupts = <0 4>;
+};
+
+&gpio_prt2 {
+	interrupts = <2 4>;
+};
+
+&gpio_prt3 {
+	interrupts = <3 4>;
+};
+
+&gpio_prt5 {
+	interrupts = <5 4>;
+};
+
+&gpio_prt6 {
+	interrupts = <6 4>;
+};
+
+&gpio_prt9 {
+	interrupts = <9 4>;
+};
+
+&gpio_prt12 {
+	interrupts = <12 4>;
+};
+
+&gpio_prt13 {
+	interrupts = <13 4>;
+};
diff --git a/tests/arch/arm/arm_irq_advanced_features/boards/cy8cproto_063_ble.overlay b/tests/arch/arm/arm_irq_advanced_features/boards/cy8cproto_063_ble.overlay
new file mode 100644
index 0000000000000..155992e9cc52f
--- /dev/null
+++ b/tests/arch/arm/arm_irq_advanced_features/boards/cy8cproto_063_ble.overlay
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2024 Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Changed default interrupts priority for GPIO to 4 */
+&gpio_prt0 {
+	interrupts = <0 4>;
+};
+
+&gpio_prt5 {
+	interrupts = <5 4>;
+};
+
+&gpio_prt6 {
+	interrupts = <6 4>;
+};
+
+&gpio_prt7 {
+	interrupts = <7 4>;
+};
+
+&gpio_prt9 {
+	interrupts = <9 4>;
+};
+
+&gpio_prt10 {
+	interrupts = <10 4>;
+};
+
+&gpio_prt12 {
+	interrupts = <12 4>;
+};
diff --git a/tests/arch/arm/arm_irq_advanced_features/boards/cyw920829m2evk_02.overlay b/tests/arch/arm/arm_irq_advanced_features/boards/cyw920829m2evk_02.overlay
new file mode 100644
index 0000000000000..6ddd801888659
--- /dev/null
+++ b/tests/arch/arm/arm_irq_advanced_features/boards/cyw920829m2evk_02.overlay
@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2024 Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Changed default interrupts priority for GPIO to 4 */
+&gpio_prt0 {
+	interrupts = <0 4>;
+};
+
+&gpio_prt1 {
+	interrupts = <1 4>;
+};
+
+&gpio_prt3 {
+	interrupts = <3 4>;
+};
+
+&gpio_prt5 {
+	interrupts = <5 4>;
+};
diff --git a/tests/arch/arm/arm_irq_zero_latency_levels/boards/cy8cproto_062_4343w.overlay b/tests/arch/arm/arm_irq_zero_latency_levels/boards/cy8cproto_062_4343w.overlay
new file mode 100644
index 0000000000000..bd164a6bf2885
--- /dev/null
+++ b/tests/arch/arm/arm_irq_zero_latency_levels/boards/cy8cproto_062_4343w.overlay
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2024 Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Changed default interrupts priority for GPIO to 4 */
+&gpio_prt0 {
+	interrupts = <0 4>;
+};
+
+&gpio_prt2 {
+	interrupts = <2 4>;
+};
+
+&gpio_prt3 {
+	interrupts = <3 4>;
+};
+
+&gpio_prt5 {
+	interrupts = <5 4>;
+};
+
+&gpio_prt6 {
+	interrupts = <6 4>;
+};
+
+&gpio_prt9 {
+	interrupts = <9 4>;
+};
+
+&gpio_prt12 {
+	interrupts = <12 4>;
+};
+
+&gpio_prt13 {
+	interrupts = <13 4>;
+};
diff --git a/tests/arch/arm/arm_irq_zero_latency_levels/boards/cy8cproto_063_ble.overlay b/tests/arch/arm/arm_irq_zero_latency_levels/boards/cy8cproto_063_ble.overlay
new file mode 100644
index 0000000000000..155992e9cc52f
--- /dev/null
+++ b/tests/arch/arm/arm_irq_zero_latency_levels/boards/cy8cproto_063_ble.overlay
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2024 Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Changed default interrupts priority for GPIO to 4 */
+&gpio_prt0 {
+	interrupts = <0 4>;
+};
+
+&gpio_prt5 {
+	interrupts = <5 4>;
+};
+
+&gpio_prt6 {
+	interrupts = <6 4>;
+};
+
+&gpio_prt7 {
+	interrupts = <7 4>;
+};
+
+&gpio_prt9 {
+	interrupts = <9 4>;
+};
+
+&gpio_prt10 {
+	interrupts = <10 4>;
+};
+
+&gpio_prt12 {
+	interrupts = <12 4>;
+};
diff --git a/tests/arch/arm/arm_irq_zero_latency_levels/boards/cyw920829m2evk_02.overlay b/tests/arch/arm/arm_irq_zero_latency_levels/boards/cyw920829m2evk_02.overlay
new file mode 100644
index 0000000000000..6ddd801888659
--- /dev/null
+++ b/tests/arch/arm/arm_irq_zero_latency_levels/boards/cyw920829m2evk_02.overlay
@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2024 Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Changed default interrupts priority for GPIO to 4 */
+&gpio_prt0 {
+	interrupts = <0 4>;
+};
+
+&gpio_prt1 {
+	interrupts = <1 4>;
+};
+
+&gpio_prt3 {
+	interrupts = <3 4>;
+};
+
+&gpio_prt5 {
+	interrupts = <5 4>;
+};