diff --git a/drivers/flash/flash_mcux_flexspi_nor.c b/drivers/flash/flash_mcux_flexspi_nor.c index ac6fdac8223f6..2d536fdc53f16 100644 --- a/drivers/flash/flash_mcux_flexspi_nor.c +++ b/drivers/flash/flash_mcux_flexspi_nor.c @@ -944,8 +944,10 @@ static int flash_flexspi_nor_check_jedec(struct flash_flexspi_nor_data *data, } /* Switch on manufacturer and vendor ID */ - switch (vendor_id & 0xFFFF) { - case 0x609d: /* IS25LP flash, needs P[4:3] cleared with same method as IS25WP */ + switch (vendor_id & 0xFFFFFF) { + case 0x16609d: /* IS25LP032 flash, needs P[4:3] cleared with same method as IS25WP */ + case 0x17609d: /* IS25LP064 */ + case 0x18609d: /* IS25LP128 */ read_params = 0xE0U; ret = flash_flexspi_nor_is25_clear_read_param(data, flexspi_lut, &read_params); if (ret < 0) { @@ -959,7 +961,9 @@ static int flash_flexspi_nor_check_jedec(struct flash_flexspi_nor_data *data, } /* Still return an error- we want the JEDEC configuration to run */ return -ENOTSUP; - case 0x709d: + case 0x16709d: /* IS25WP032 */ + case 0x17709d: /* IS25WP064 */ + case 0x18709d: /* IS25WP128 */ /* * IS25WP flash. We can support this flash with the JEDEC probe, * but we need to insure P[6:3] are at the default value @@ -977,15 +981,8 @@ static int flash_flexspi_nor_check_jedec(struct flash_flexspi_nor_data *data, } /* Still return an error- we want the JEDEC configuration to run */ return -ENOTSUP; - case 0x40ef: - if ((vendor_id & 0xFFFFFF) != 0x2040ef) { - /* - * This is not the correct flash chip, and will not - * support the LUT table. Return here - */ - return -ENOTSUP; - } - /* W25Q512JV flash, use 4 byte read/write */ + case 0x2040ef: + /* W25Q512JV-IQ/IN flash, use 4 byte read/write */ flexspi_lut[READ][0] = FLEXSPI_LUT_SEQ( kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, SPI_NOR_CMD_4READ_4B, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 32); @@ -1015,14 +1012,7 @@ static int flash_flexspi_nor_check_jedec(struct flash_flexspi_nor_data *data, /* Device uses bit 1 of status reg 2 for QE */ return flash_flexspi_nor_quad_enable(data, flexspi_lut, JESD216_DW15_QER_VAL_S2B1v5); - case 0x60ef: - if ((vendor_id & 0xFFFFFF) != 0x2060ef) { - /* - * This is not the correct flash chip, and will not - * support the LUT table. Return here - */ - return -ENOTSUP; - } + case 0x2060ef: /* W25Q512NW-IQ/IN flash, use 4 byte read/write */ flexspi_lut[READ][0] = FLEXSPI_LUT_SEQ( kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, SPI_NOR_CMD_4READ_4B, @@ -1053,8 +1043,8 @@ static int flash_flexspi_nor_check_jedec(struct flash_flexspi_nor_data *data, /* Device uses bit 1 of status reg 2 for QE */ return flash_flexspi_nor_quad_enable(data, flexspi_lut, JESD216_DW15_QER_VAL_S2B1v5); - case 0x25C2: - /* MX25 flash, use 4 byte read/write */ + case 0x3A25C2: + /* MX25U51245G flash, use 4 byte read/write */ flexspi_lut[READ][0] = FLEXSPI_LUT_SEQ( kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, SPI_NOR_CMD_4READ_4B, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 32);