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stm32h7rs xspi Node with domain clock for peripheral clock configuration #88051

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Merged
merged 8 commits into from
May 21, 2025
Merged

stm32h7rs xspi Node with domain clock for peripheral clock configuration #88051

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0cfdd54
soc: st: stm32 Kconfig to retrieve the external Flash Base address
FRASTM May 5, 2025
c41a0c7
drivers: flash: stm32 xspi driver supports clock domain config
FRASTM May 27, 2024
c7b54c2
drivers: flash: stm32 xspi drivers supporting the stm32h7r/s mcu
FRASTM May 31, 2024
15bcfb6
drivers: flash: stm32 xspi flash driver set the DelayBlock if exists
FRASTM May 6, 2025
09493b9
drivers: clock control: stm32H7RS has a PLL2 & 3 or HCLK5 output
FRASTM Apr 3, 2025
c2ddf9f
dts: arm: stm32h7rs mcu with external memory area
FRASTM May 30, 2024
e7a1f50
boards: st: stm32h7s3l8 nucleo board supporting xspi instance
FRASTM Nov 18, 2024
20adb4b
boards: arm: stm32h7s78 disco kit supporting xspi instance
FRASTM May 27, 2024
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20 changes: 17 additions & 3 deletions drivers/flash/flash_stm32_xspi.c
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Original file line number Diff line number Diff line change
Expand Up @@ -52,6 +52,11 @@ LOG_MODULE_REGISTER(flash_stm32_xspi, CONFIG_FLASH_LOG_LEVEL);
#include <stm32_ll_dma.h>
#endif /* STM32_XSPI_USE_DMA */

#if defined(CONFIG_SOC_SERIES_STM32H7RSX)
#include <stm32_ll_pwr.h>
#include <stm32_ll_system.h>
#endif /* CONFIG_SOC_SERIES_STM32H7RSX */

#include "flash_stm32_xspi.h"

static inline void xspi_lock_thread(const struct device *dev)
Expand Down Expand Up @@ -2068,6 +2073,11 @@ static int flash_stm32_xspi_init(const struct device *dev)
LOG_ERR("XSPI mode SPI|DUAL|QUAD/DTR is not valid");
return -ENOTSUP;
}
#if defined(CONFIG_SOC_SERIES_STM32H7RSX)
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@etienne-lms etienne-lms May 21, 2025

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Nitpicking: may I suggest an empty line above?

LL_PWR_EnableXSPIM2();
__HAL_RCC_SBS_CLK_ENABLE();
LL_SBS_EnableXSPI2SpeedOptim();
#endif /* CONFIG_SOC_SERIES_STM32H7RSX */

/* Signals configuration */
ret = pinctrl_apply_state(dev_cfg->pcfg, PINCTRL_STATE_DEFAULT);
Expand Down Expand Up @@ -2158,7 +2168,8 @@ static int flash_stm32_xspi_init(const struct device *dev)

LOG_DBG("XSPI Init'd");

#if defined(HAL_XSPIM_IOPORT_1) || defined(HAL_XSPIM_IOPORT_2)
#if defined(HAL_XSPIM_IOPORT_1) || defined(HAL_XSPIM_IOPORT_2) || \
defined(XSPIM) || defined(XSPIM1) || defined(XSPIM2)
/* XSPI I/O manager init Function */
XSPIM_CfgTypeDef xspi_mgr_cfg;

Expand Down Expand Up @@ -2471,9 +2482,12 @@ static struct flash_stm32_xspi_data flash_stm32_xspi_dev_data = {
: HAL_XSPI_CSSEL_NCS2),
#endif
.FreeRunningClock = HAL_XSPI_FREERUNCLK_DISABLE,
#if defined(OCTOSPI_DCR4_REFRESH)
#if defined(XSPI_DCR3_MAXTRAN)
.MaxTran = 0,
#endif /* XSPI_DCR3_MAXTRAN */
#if defined(XSPI_DCR4_REFRESH)
.Refresh = 0,
#endif /* OCTOSPI_DCR4_REFRESH */
#endif /* XSPI_DCR4_REFRESH */
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@etienne-lms etienne-lms May 21, 2025

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Default loading 0 values is not strictly needed. Maybe simpler if removed.

},
},
.qer_type = DT_QER_PROP_OR(0, JESD216_DW15_QER_VAL_S1B6),
Expand Down