From 8202d5f6434cb377d4deb186b3e94ebf964dfb33 Mon Sep 17 00:00:00 2001
From: Etienne Carriere <etienne.carriere@st.com>
Date: Mon, 31 Mar 2025 12:27:51 +0200
Subject: [PATCH 01/10] boards: st: Add stm32wba65i-dk1

Add stm32wba65i-dk1 board support with UART console, LEDs, joystick keys
using ADC channel 6.

Board YAML file does not list 'supported' tags since the board is
very similar to nucleo_wba65ri for which supported features are already
covered.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
---
 boards/st/stm32wba65i_dk1/Kconfig.defconfig   |  13 +
 .../stm32wba65i_dk1/Kconfig.stm32wba65i_dk1   |   5 +
 .../stm32wba65i_dk1/arduino_r3_connector.dtsi |  41 ++++
 boards/st/stm32wba65i_dk1/board.cmake         |   7 +
 boards/st/stm32wba65i_dk1/board.yml           |   6 +
 .../doc/img/stm32wba65i-dk1.webp              | Bin 0 -> 40424 bytes
 boards/st/stm32wba65i_dk1/doc/index.rst       | 232 ++++++++++++++++++
 boards/st/stm32wba65i_dk1/stm32wba65i_dk1.dts | 187 ++++++++++++++
 .../st/stm32wba65i_dk1/stm32wba65i_dk1.yaml   |  10 +
 .../stm32wba65i_dk1/stm32wba65i_dk1_defconfig |  24 ++
 boards/st/stm32wba65i_dk1/support/openocd.cfg |  26 ++
 11 files changed, 551 insertions(+)
 create mode 100644 boards/st/stm32wba65i_dk1/Kconfig.defconfig
 create mode 100644 boards/st/stm32wba65i_dk1/Kconfig.stm32wba65i_dk1
 create mode 100644 boards/st/stm32wba65i_dk1/arduino_r3_connector.dtsi
 create mode 100644 boards/st/stm32wba65i_dk1/board.cmake
 create mode 100644 boards/st/stm32wba65i_dk1/board.yml
 create mode 100644 boards/st/stm32wba65i_dk1/doc/img/stm32wba65i-dk1.webp
 create mode 100644 boards/st/stm32wba65i_dk1/doc/index.rst
 create mode 100644 boards/st/stm32wba65i_dk1/stm32wba65i_dk1.dts
 create mode 100644 boards/st/stm32wba65i_dk1/stm32wba65i_dk1.yaml
 create mode 100644 boards/st/stm32wba65i_dk1/stm32wba65i_dk1_defconfig
 create mode 100644 boards/st/stm32wba65i_dk1/support/openocd.cfg

diff --git a/boards/st/stm32wba65i_dk1/Kconfig.defconfig b/boards/st/stm32wba65i_dk1/Kconfig.defconfig
new file mode 100644
index 0000000000000..620565526e58c
--- /dev/null
+++ b/boards/st/stm32wba65i_dk1/Kconfig.defconfig
@@ -0,0 +1,13 @@
+# STM32WBA65I Discovery kit board configuration
+
+# Copyright (c) 2025 STMicroelectronics
+
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_STM32WBA65I_DK1
+
+config SPI_STM32_INTERRUPT
+	default y
+	depends on SPI
+
+endif # BOARD_STM32WBA65I_DK1
diff --git a/boards/st/stm32wba65i_dk1/Kconfig.stm32wba65i_dk1 b/boards/st/stm32wba65i_dk1/Kconfig.stm32wba65i_dk1
new file mode 100644
index 0000000000000..9fcfc52471d83
--- /dev/null
+++ b/boards/st/stm32wba65i_dk1/Kconfig.stm32wba65i_dk1
@@ -0,0 +1,5 @@
+# Copyright (c) 2025 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_STM32WBA65I_DK1
+	select SOC_STM32WBA65XX
diff --git a/boards/st/stm32wba65i_dk1/arduino_r3_connector.dtsi b/boards/st/stm32wba65i_dk1/arduino_r3_connector.dtsi
new file mode 100644
index 0000000000000..999cb7600ea3c
--- /dev/null
+++ b/boards/st/stm32wba65i_dk1/arduino_r3_connector.dtsi
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2025 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/gpio/arduino-header-r3.h>
+
+/ {
+	arduino_header: connector {
+		compatible = "arduino-header-r3";
+		#gpio-cells = <2>;
+		gpio-map-mask = <0xffffffff 0xffffffc0>;
+		gpio-map-pass-thru = <0 0x3f>;
+		gpio-map = <ARDUINO_HEADER_R3_A0 0 &gpioa 4 0>,
+			   <ARDUINO_HEADER_R3_A1 0 &gpioa 6 0>,
+			   <ARDUINO_HEADER_R3_A2 0 &gpioa 2 0>,
+			   <ARDUINO_HEADER_R3_A3 0 &gpioa 1 0>,
+			   <ARDUINO_HEADER_R3_A4 0 &gpioa 5 0>,
+			   <ARDUINO_HEADER_R3_A5 0 &gpioa 0 0>,
+			   <ARDUINO_HEADER_R3_D0 0 &gpioa 11 0>,
+			   <ARDUINO_HEADER_R3_D1 0 &gpioa 12 0>,
+			   <ARDUINO_HEADER_R3_D2 0 &gpioe 0 0>,
+			   <ARDUINO_HEADER_R3_D3 0 &gpiob 13 0>,
+			   <ARDUINO_HEADER_R3_D4 0 &gpioa 3 0>,
+			   <ARDUINO_HEADER_R3_D5 0 &gpiob 14 0>,
+			   <ARDUINO_HEADER_R3_D6 0 &gpiob 0 0>,
+			   <ARDUINO_HEADER_R3_D7 0 &gpiod 14 0>,
+			   <ARDUINO_HEADER_R3_D8 0 &gpioa 10 0>,
+			   <ARDUINO_HEADER_R3_D9 0 &gpiob 11 0>,
+			   <ARDUINO_HEADER_R3_D10 0 &gpiob 9 0>,
+			   <ARDUINO_HEADER_R3_D11 0 &gpioc 3 0>,
+			   <ARDUINO_HEADER_R3_D12 0 &gpioa 9 0>,
+			   <ARDUINO_HEADER_R3_D13 0 &gpiob 10 0>,
+			   <ARDUINO_HEADER_R3_D14 0 &gpiob 1 0>,
+			   <ARDUINO_HEADER_R3_D15 0 &gpiob 2 0>;
+	};
+};
+
+arduino_i2c: &i2c1 {};
+arduino_spi: &spi1 {};
diff --git a/boards/st/stm32wba65i_dk1/board.cmake b/boards/st/stm32wba65i_dk1/board.cmake
new file mode 100644
index 0000000000000..45abc466464fe
--- /dev/null
+++ b/boards/st/stm32wba65i_dk1/board.cmake
@@ -0,0 +1,7 @@
+# Copyright (c) 2025 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
+
+include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/openocd-stm32.board.cmake)
diff --git a/boards/st/stm32wba65i_dk1/board.yml b/boards/st/stm32wba65i_dk1/board.yml
new file mode 100644
index 0000000000000..521ca2c3169e2
--- /dev/null
+++ b/boards/st/stm32wba65i_dk1/board.yml
@@ -0,0 +1,6 @@
+board:
+  name: stm32wba65i_dk1
+  full_name: STM32WBA65I Discovery kit
+  vendor: st
+  socs:
+    - name: stm32wba65xx
diff --git a/boards/st/stm32wba65i_dk1/doc/img/stm32wba65i-dk1.webp b/boards/st/stm32wba65i_dk1/doc/img/stm32wba65i-dk1.webp
new file mode 100644
index 0000000000000000000000000000000000000000..4cae2e31f470880f264e98b0d351cffeff87aa20
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diff --git a/boards/st/stm32wba65i_dk1/doc/index.rst b/boards/st/stm32wba65i_dk1/doc/index.rst
new file mode 100644
index 0000000000000..fab127b663186
--- /dev/null
+++ b/boards/st/stm32wba65i_dk1/doc/index.rst
@@ -0,0 +1,232 @@
+.. zephyr:board:: stm32wba65i_dk1
+
+Overview
+********
+
+STM32WBA65I-DK1 is a Bluetooth |reg| Low Energy, 802.15.4 and Zigbee |reg|
+wireless and ultra-low-power board embedding a powerful and ultra-low-power
+radio compliant with the Bluetooth |reg| Low Energy SIG specification v5.4
+with IEEE 802.15.4-2015 and Zigbee |reg| specifications.
+
+The ARDUINO |reg| Uno V3 connectivity support and the ST morpho headers allow
+the easy expansion of the functionality of the STM32 Discovery kit open
+development platform with a wide choice of specialized shields.
+
+- Ultra-low-power wireless STM32WBA65RI microcontroller based on the Arm |reg|
+  Cortex |reg| ‑M33 core with TrustZone |reg|, MPU, DSP, and FPU, that operates
+  at a frequency of up to 100 MHz, featuring 2 Mbyte of flash memory and 512
+  Kbytes of SRAM in a VFQFPN68 package
+
+- MCU RF board (MB2130):
+
+  - 2.4 GHz RF transceiver supporting Bluetooth |reg| specification v5.4
+  - Arm |reg| Cortex |reg| M33 CPU with TrustZone |reg|, MPU, DSP, and FPU
+  - Integrated PCB antenna
+
+- Three user LEDs (incl. one default not connected)
+- One reset push-buttons
+- One Joystick
+
+- Board connectors:
+
+  - 2 USB Type-C
+  - ARDUINO |reg| Uno V3 expansion connector
+  - ST morpho headers for full access to all STM32 I/Os
+
+- Flexible power-supply options: ST-LINK USB VBUS or external sources
+- On-board STLINK-V3MODS debugger/programmer with USB re-enumeration capability:
+  mass storage, Virtual COM port, and debug port
+
+Hardware
+********
+
+The STM32WBA65xx multiprotocol wireless and ultralow power devices embed a
+powerful and ultralow power radio compliant with the Bluetooth |reg| SIG Low
+Energy specification 5.4.
+
+- Includes ST state-of-the-art patented technology
+
+- Ultra low power radio:
+
+  - 2.4 GHz radio
+  - RF transceiver supporting Bluetooth |reg| Low Energy 5.4 specification
+    IEEE 802.15.4-2015 PHY and MAC, supporting Thread, Matter and Zigbee |reg|
+  - Proprietary protocols
+  - RX sensitivity: -96 dBm (Bluetooth |reg| Low Energy at 1 Mbps)
+    and -100 dBm (IEEE 802.15.4 at 250 kbps)
+  - Programmable output power, up to +10 dBm with 1 dB steps
+  - Support for external PA
+  - Integrated balun to reduce BOM
+  - Suitable for systems requiring compliance with radio frequency regulations
+    ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
+
+- Ultra low power platform with FlexPowerControl:
+
+  - 1.71 to 3.6 V power supply
+  - - 40 °C to 85 °C temperature range
+  - Autonomous peripherals with DMA, functional down to Stop 1 mode
+  - 120 nA Standby mode (16 wake-up pins)
+  - 1.68 |micro| A Standby mode with 64 KB SRAM with RTC
+  - 5.58 |micro| A Stop 2 mode with 64 KB SRAM with RTC
+  - 28.75 |micro| A/MHz Run mode at 3.3 V
+  - Radio: Rx 4.26 mA / Tx at 0 dBm 5.94 mA
+
+- ART Accelerator |trade|: 8-Kbyte instruction cache allowing 0-wait-state execution
+  from flash memory (frequency up to 100 MHz, 150 DMIPS)
+- Power management: embedded regulator LDO and SMPS step-down converter
+- Supporting switch on-the-fly and voltage scaling
+
+- Benchmarks:
+
+  - 1.5 DMIPS/MHz (Drystone 2.1)
+  - 410 CoreMark |reg| (4.10 CoreMark/MHz)
+
+- Clock sources:
+
+  - 32 MHz crystal oscillator
+  - 32 kHz crystal oscillator (LSE)
+  - Internal low-power 32 kHz (±5%) RC
+  - Internal 16 MHz factory trimmed RC (±1%)
+  - PLL for system clock and ADC
+
+- Memories:
+
+  - 2 MB flash memory with ECC, including 256 Kbytes with 100 cycles
+  - 512 KB SRAM, including 64 KB with parity check
+  - 512-byte (32 rows) OTP
+
+- Rich analog peripherals (independent supply):
+
+  - 12-bit ADC 2.5 Msps with hardware oversampling
+
+- Communication peripherals:
+
+  - Four UARTs (ISO 7816, IrDA, modem)
+  - Three SPIs
+  - Four I2C Fm+ (1 Mbit/s), SMBus/PMBus |reg|
+
+- System peripherals:
+
+  - Touch sensing controller, up to 24 sensors, supporting touch key, linear,
+     rotary touch sensors
+  - One 16-bit, advanced motor control timer
+  - Three 16-bit timers
+  - Two 32-bit timer
+  - Two low-power 16-bit timers (available in Stop mode)
+  - Two Systick timers
+  - RTC with hardware calendar and calibration
+  - Two watchdogs
+  - 8-channel DMA controller, functional in Stop mode
+
+- Security and cryptography:
+
+  - Arm |reg| TrustZone |reg| and securable I/Os, memories, and peripherals
+  - Flexible life cycle scheme with RDP and password protected debug
+  - Root of trust thanks to unique boot entry and secure hide protection area (HDP)
+  - SFI (secure firmware installation) thanks to embedded RSS (root secure services)
+  - Secure data storage with root hardware unique key (RHUK)
+  - Secure firmware upgrade support with TF-M
+  - Two AES co-processors, including one with DPA resistance
+  - Public key accelerator, DPA resistant
+  - HASH hardware accelerator
+  - True random number generator, NIST SP800-90B compliant
+  - 96-bit unique ID
+  - Active tampers
+  - CRC calculation unit
+
+- Up to 86 I/Os (most of them 5 V-tolerant) with interrupt capability
+
+- Development support:
+
+  - Serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
+
+- ECOPACK2 compliant package
+
+More information about STM32WBA series can be found here:
+
+- `STM32WBA Series on www.st.com`_
+
+Supported Features
+==================
+
+.. zephyr:board-supported-hw::
+
+Connections and IOs
+===================
+
+STM32WBA65I-DK1 board has 4 GPIO controllers. These controllers are responsible for pin muxing,
+input/output, pull-up, etc.
+
+Default Zephyr Peripheral Mapping:
+----------------------------------
+
+.. rst-class:: rst-columns
+
+- USART_1 TX/RX : PB12/PA8
+- I2C_1_SCL : PB2
+- I2C_1_SDA : PB1
+- LD6 : PD8
+- SPI_1_NSS : PA12 (arduino_spi)
+- SPI_1_SCK : PB4 (arduino_spi)
+- SPI_1_MISO : PB3 (arduino_spi)
+- SPI_1_MOSI : PA15 (arduino_spi)
+
+System Clock
+------------
+
+STM32WBA65I-DK1 System Clock could be driven by internal or external oscillator,
+as well as main PLL clock. By default System clock is driven by HSE+PLL clock at 100MHz.
+
+Serial Port
+-----------
+
+STM32WBA65I-DK1 board has 3 U(S)ARTs. The Zephyr console output is assigned to USART1.
+Default settings are 115200 8N1.
+
+
+Programming and Debugging
+*************************
+
+.. zephyr:board-supported-runners::
+
+STM32WBA65I-DK1 board includes an ST-LINK/V3 embedded debug tool interface.
+It could be used for flash and debug using STM32Cube ecosystem tools.
+
+Flashing
+========
+
+The board is configured to be flashed using west `STM32CubeProgrammer`_ runner,
+so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required.
+
+Flashing an application to a STM32WBA65I-DK1
+--------------------------------------------
+
+Here is an example for the :zephyr:code-sample:`blinky` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/basic/blinky
+   :board: stm32wba65i_dk1
+   :goals: build flash
+
+You will see the LED blinking every second.
+
+Debugging
+=========
+
+Debugging using OpenOCD
+-----------------------
+
+You can debug an application in the usual way using OpenOCD. Here is an example for the
+:zephyr:code-sample:`blinky` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/basic/blinky
+   :board: stm32wba65i_dk1
+   :maybe-skip-config:
+   :goals: debug
+
+.. _STM32WBA Series on www.st.com:
+   https://www.st.com/en/microcontrollers-microprocessors/stm32wba-series.html
+
+.. _STM32CubeProgrammer:
+   https://www.st.com/en/development-tools/stm32cubeprog.html
diff --git a/boards/st/stm32wba65i_dk1/stm32wba65i_dk1.dts b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1.dts
new file mode 100644
index 0000000000000..48e70a3e121eb
--- /dev/null
+++ b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1.dts
@@ -0,0 +1,187 @@
+/*
+ * Copyright (c) 2025 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <st/wba/stm32wba65Xi.dtsi>
+#include <st/wba/stm32wba65rivx-pinctrl.dtsi>
+#include "arduino_r3_connector.dtsi"
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+
+/ {
+	model = "STMicroelectronics STM32WBA65I Discovery kit board";
+	compatible = "st,stm32wba65i-dk1";
+
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	chosen {
+		zephyr,bt-c2h-uart = &usart1;
+		zephyr,console = &usart1;
+		zephyr,shell-uart = &usart1;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+
+	leds: leds {
+		compatible = "gpio-leds";
+
+		green_led_1: led_0 {
+			gpios = <&gpiod 8 GPIO_ACTIVE_LOW>;
+			label = "User LD6";
+		};
+
+		red_led_2: led_1 {
+			gpios = <&gpiod 9 GPIO_ACTIVE_LOW>;
+			label = "User LD5";
+		};
+
+		blue_led_3: led_2 {
+			/* Not functional w/o a 0Ohm resistor on MB2143 R42 */
+			gpios = <&gpiob 10 GPIO_ACTIVE_LOW>;
+			label = "User LD3";
+		};
+	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&adc4 6>;
+		keyup-threshold-mv = <3300>;
+
+		select_key {
+			press-thresholds-mv = <0>;
+			zephyr,code = <INPUT_KEY_ENTER>;
+		};
+
+		left_key {
+			press-thresholds-mv = <670>;
+			zephyr,code = <INPUT_KEY_LEFT>;
+		};
+
+		down_key {
+			press-thresholds-mv = <1320>;
+			zephyr,code = <INPUT_KEY_DOWN>;
+		};
+
+		up_key {
+			press-thresholds-mv = <2010>;
+			zephyr,code = <INPUT_KEY_UP>;
+		};
+
+		right_key {
+			press-thresholds-mv = <2650>;
+			zephyr,code = <INPUT_KEY_RIGHT>;
+		};
+	};
+
+	aliases {
+		led0 = &green_led_1;
+		led1 = &red_led_2;
+	};
+};
+
+&clk_lsi {
+	status = "okay";
+};
+
+&clk_lse {
+	status = "okay";
+};
+
+&clk_hse {
+	hse-div2;
+	status = "okay";
+};
+
+&clk_hsi {
+	status = "okay";
+};
+
+&rcc {
+	clocks = <&clk_hse>;
+	clock-frequency = <DT_FREQ_M(16)>;
+	ahb-prescaler = <1>;
+	ahb5-prescaler = <2>;
+	apb1-prescaler = <1>;
+	apb2-prescaler = <2>;
+	apb7-prescaler = <1>;
+};
+
+&iwdg {
+	status = "okay";
+};
+
+&rtc {
+	status = "okay";
+	clocks = <&rcc STM32_CLOCK(APB7, 21)>,
+		 <&rcc STM32_SRC_LSE RTC_SEL(1)>;
+	prescaler = <32768>;
+};
+
+&usart1 {
+	clocks = <&rcc STM32_CLOCK(APB2, 14)>,
+		 <&rcc STM32_SRC_HSI16 USART1_SEL(2)>;
+	pinctrl-0 = <&usart1_tx_pb12 &usart1_rx_pa8>;
+	pinctrl-1 = <&analog_pb12 &analog_pa8>;
+	pinctrl-names = "default", "sleep";
+	current-speed = <115200>;
+	status = "okay";
+};
+
+&spi1 {
+	pinctrl-0 = <&spi1_nss_pa12 &spi1_sck_pb4
+		     &spi1_miso_pb3 &spi1_mosi_pa15>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&i2c1 {
+	pinctrl-0 = <&i2c1_scl_pb2 &i2c1_sda_pb1>;
+	pinctrl-names = "default";
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_FAST>;
+};
+
+&adc4 {
+	pinctrl-0 = <&adc4_in6_pa3>;
+	pinctrl-names = "default";
+	st,adc-clock-source = "ASYNC";
+	st,adc-prescaler = <4>;
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	channel@6 {
+		reg = <0x6>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_INTERNAL";
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <12>;
+		zephyr,vref-mv = <3300>;
+	};
+};
+
+stm32_lp_tick_source: &lptim1 {
+	clocks = <&rcc STM32_CLOCK(APB7, 11)>,
+		 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
+	status = "okay";
+};
+
+&rng {
+	status = "okay";
+};
+
+&flash0 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		storage_partition: partition@1c0000 {
+			label = "storage";
+			reg = <0x001c0000 DT_SIZE_K(256)>;
+		};
+	};
+};
diff --git a/boards/st/stm32wba65i_dk1/stm32wba65i_dk1.yaml b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1.yaml
new file mode 100644
index 0000000000000..b77e57240f1a9
--- /dev/null
+++ b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1.yaml
@@ -0,0 +1,10 @@
+identifier: stm32wba65i_dk1/stm32wba65xx
+name: ST STM32WBA65I Discovery kit
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+ram: 512
+flash: 2048
+vendor: st
diff --git a/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_defconfig b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_defconfig
new file mode 100644
index 0000000000000..5e650e6826cb7
--- /dev/null
+++ b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_defconfig
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: Apache-2.0
+# Copyright (c) 2025 STMicroelectronics
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable HW stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable the internal SMPS regulator
+CONFIG_POWER_SUPPLY_DIRECT_SMPS=y
+
+# Enable ADC for joystick
+CONFIG_ADC=y
diff --git a/boards/st/stm32wba65i_dk1/support/openocd.cfg b/boards/st/stm32wba65i_dk1/support/openocd.cfg
new file mode 100644
index 0000000000000..0745453a16a5c
--- /dev/null
+++ b/boards/st/stm32wba65i_dk1/support/openocd.cfg
@@ -0,0 +1,26 @@
+# Note: Using OpenOCD using stm32wba65i_dk1 requires using openocd fork.
+# See board documentation for more information
+
+source [find interface/stlink-dap.cfg]
+
+set WORKAREASIZE 0x8000
+
+transport select "dapdirect_swd"
+
+# Enable debug when in low power modes
+set ENABLE_LOW_POWER 1
+
+# Stop Watchdog counters when halt
+set STOP_WATCHDOG 1
+
+# STlink Debug clock frequency
+set CLOCK_FREQ 8000
+
+# Reset configuration
+# use hardware reset, connect under reset
+# connect_assert_srst needed if low power mode application running (WFI...)
+reset_config srst_only srst_nogate
+
+source [find target/stm32wbax.cfg]
+
+gdb_memory_map disable

From e3ac17296bbdc9a8ea8964fa38d5d1c7ce572d3c Mon Sep 17 00:00:00 2001
From: Etienne Carriere <etienne.carriere@st.com>
Date: Fri, 16 May 2025 09:33:16 +0200
Subject: [PATCH 02/10] modules: trusted-firmware-m: Declare stm32wba65i
 support

Declare stm32wba65i-dk1 and nucleo_wba65ri boards support in TF-M.
Both comply with TF-M integration of platform stm/stm32wba65i-dk.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
---
 modules/trusted-firmware-m/Kconfig.tfm | 1 +
 1 file changed, 1 insertion(+)

diff --git a/modules/trusted-firmware-m/Kconfig.tfm b/modules/trusted-firmware-m/Kconfig.tfm
index 55e08ee45e4a9..0b7c6c5f22607 100644
--- a/modules/trusted-firmware-m/Kconfig.tfm
+++ b/modules/trusted-firmware-m/Kconfig.tfm
@@ -20,6 +20,7 @@ config TFM_BOARD
 	default "stm/b_u585i_iot02a" if BOARD_B_U585I_IOT02A
 	default "stm/nucleo_l552ze_q" if BOARD_NUCLEO_L552ZE_Q
 	default "stm/stm32l562e_dk" if BOARD_STM32L562E_DK
+	default "stm/stm32wba65i_dk" if BOARD_NUCLEO_WBA65RI || BOARD_STM32WBA65I_DK1
 	default "arm/musca_b1" if BOARD_V2M_MUSCA_B1
 	default "arm/musca_s1" if BOARD_V2M_MUSCA_S1
 	default "adi/max32657" if BOARD_MAX32657EVKIT_MAX32657_NS

From 1205f1d422880652404c3252377fcb3de0622c0e Mon Sep 17 00:00:00 2001
From: Etienne Carriere <etienne.carriere@st.com>
Date: Fri, 18 Apr 2025 08:56:21 +0200
Subject: [PATCH 03/10] modules: trusted-firmware-m: Add
 STM32_FLASH_LAYOUT_BEGIN_OFFSET

Add TF-M directive STM32_FLASH_LAYOUT_BEGIN_OFFSET needed to specify
the gap needed by external boot stage resources at flash beginning.
The offset tells STM32 TF-M firmware the base offset in the flash
where the several TF-M and non-secure image areas shall be located.

The CMake directive was introduced mainline TF-M commit [1] and merged
in Zephyr TF-M repository [2].

Link: https://github.com/TrustedFirmware-M/trusted-firmware-m/commit/fc035b874e0ab86e2a13a328da3dce0cf18eb566 [1]
Link: https://github.com/zephyrproject-rtos/trusted-firmware-m/commit/954dc805411be8fedac4ed7ddfefe966ffb35576 [2]
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
---
 modules/trusted-firmware-m/CMakeLists.txt |  6 ++++++
 modules/trusted-firmware-m/Kconfig.tfm    | 10 ++++++++++
 2 files changed, 16 insertions(+)

diff --git a/modules/trusted-firmware-m/CMakeLists.txt b/modules/trusted-firmware-m/CMakeLists.txt
index 5e066130b2627..59337875e9c67 100644
--- a/modules/trusted-firmware-m/CMakeLists.txt
+++ b/modules/trusted-firmware-m/CMakeLists.txt
@@ -281,6 +281,12 @@ if (CONFIG_BUILD_WITH_TFM)
     list(APPEND TFM_CMAKE_ARGS -DETHOS_DRIVER_PATH=${CONFIG_TFM_ETHOS_DRIVER_PATH_LOCAL})
   endif()
 
+  if(CONFIG_TFM_STM32_FLASH_LAYOUT_BEGIN_OFFSET)
+    list(APPEND TFM_CMAKE_ARGS
+      -DSTM32_FLASH_LAYOUT_BEGIN_OFFSET=${CONFIG_TFM_STM32_FLASH_LAYOUT_BEGIN_OFFSET}
+    )
+  endif()
+
   file(MAKE_DIRECTORY ${TFM_BINARY_DIR})
   add_custom_target(tfm_cmake
     DEPENDS ${TFM_BINARY_DIR}/CMakeCache.txt
diff --git a/modules/trusted-firmware-m/Kconfig.tfm b/modules/trusted-firmware-m/Kconfig.tfm
index 0b7c6c5f22607..afb736b1eb42c 100644
--- a/modules/trusted-firmware-m/Kconfig.tfm
+++ b/modules/trusted-firmware-m/Kconfig.tfm
@@ -516,4 +516,14 @@ config TFM_EXCEPTION_INFO_DUMP
 	  On fatal errors in the secure firmware, capture info about the exception.
 	  Print the info if the SPM log level is sufficient.
 
+config TFM_STM32_FLASH_LAYOUT_BEGIN_OFFSET
+	int "Offset gap at beginning of flash layout"
+	depends on SOC_FAMILY_STM32
+	default 0
+	help
+	  Set an offset at the beginning of the STM32 platform flash
+	  layout above which TF-M resources location start. The platform uses
+	  this gap for platform specific reason, as for example when a
+	  bootloader that is external to TF-M is used.
+
 endif # BUILD_WITH_TFM

From a04c05de567fe3f6ce15dbb00251d01234186fec Mon Sep 17 00:00:00 2001
From: Etienne Carriere <etienne.carriere@st.com>
Date: Fri, 26 Sep 2025 14:37:02 +0200
Subject: [PATCH 04/10] soc: st: stm32wba: TF-M does not support BL2 for WBA65x

Enable TFM_BL2_NOT_SUPPORTED configuration for STM32WBA65x SoC since
TF-M does not implement the BL2 boot stage for this SoC series.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
---
 soc/st/stm32/stm32wbax/Kconfig.defconfig.stm32wba65xx | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/soc/st/stm32/stm32wbax/Kconfig.defconfig.stm32wba65xx b/soc/st/stm32/stm32wbax/Kconfig.defconfig.stm32wba65xx
index bd811b035ef8b..2a7138597d1bd 100644
--- a/soc/st/stm32/stm32wbax/Kconfig.defconfig.stm32wba65xx
+++ b/soc/st/stm32/stm32wbax/Kconfig.defconfig.stm32wba65xx
@@ -8,4 +8,8 @@ if SOC_STM32WBA65XX
 config NUM_IRQS
 	default 82
 
+# BL2 implementation not available yet
+config TFM_BL2_NOT_SUPPORTED
+	default y
+
 endif # SOC_STM32WBA65XX

From b83ecceb4cab5d01fe024609f2bff1d5b172b4c6 Mon Sep 17 00:00:00 2001
From: Etienne Carriere <etienne.carriere@st.com>
Date: Fri, 9 May 2025 12:22:04 +0200
Subject: [PATCH 05/10] boards: st: stm32wba65i_dk1: Add 'ns' variant for TF-M
 support

Add variant ns to stm32wba65i_dk1 board to embed TF-M in the SoC
secure world. The flash layout is synced with the layout defined
in Zephyr TF-M integration of platform STM32WBA65I.

Successfully tested against a few samples and test samples:
- samples/tfm_integration/psa_crypto
- samples/tfm_integration/psa_protected_storage
- samples/tfm_integration/tfm_ipc
- samples/tfm_integration/tfm_regression_test
- samples/tfm_integration/tfm_secure_partition
- tests/subsys/secure_storage/psa/crypto
- tests/subsys/secure_storage/psa/its
  (with CONFIG_TFM_ITS_MAX_ASSET_SIZE_OVERRIDE=y
  and CONFIG_TFM_ITS_MAX_ASSET_SIZE=256)

Support for PSA Arch Tests (samples/tfm_integration/tfm_psa_test) is
not yet merged but is in under review [1].

Link: https://github.com/ARM-software/psa-arch-tests/pull/406 [1]
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
---
 boards/st/stm32wba65i_dk1/board.cmake         | 24 ++++++++-
 boards/st/stm32wba65i_dk1/board.yml           |  2 +
 boards/st/stm32wba65i_dk1/doc/index.rst       | 45 ++++++++++++++++
 .../stm32wba65i_dk1_stm32wba65xx_ns.dts       | 52 +++++++++++++++++++
 .../stm32wba65i_dk1_stm32wba65xx_ns.yaml      | 10 ++++
 .../stm32wba65i_dk1_stm32wba65xx_ns_defconfig | 31 +++++++++++
 6 files changed, 163 insertions(+), 1 deletion(-)
 create mode 100644 boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns.dts
 create mode 100644 boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns.yaml
 create mode 100644 boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns_defconfig

diff --git a/boards/st/stm32wba65i_dk1/board.cmake b/boards/st/stm32wba65i_dk1/board.cmake
index 45abc466464fe..755a55bae8dcf 100644
--- a/boards/st/stm32wba65i_dk1/board.cmake
+++ b/boards/st/stm32wba65i_dk1/board.cmake
@@ -1,7 +1,29 @@
 # Copyright (c) 2025 STMicroelectronics
 # SPDX-License-Identifier: Apache-2.0
 
-board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
+if(CONFIG_BUILD_WITH_TFM)
+  set(FLASH_BASE_ADDRESS_S 0x0C000000)
+
+  # Flash merged TF-M + Zephyr binary
+  set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex)
+
+  if(CONFIG_HAS_FLASH_LOAD_OFFSET)
+    MATH(EXPR TFM_HEX_BASE_ADDRESS_NS "${FLASH_BASE_ADDRESS_S}+${CONFIG_FLASH_LOAD_OFFSET}")
+  else()
+    set(TFM_HEX_BASE_ADDRESS_NS ${TFM_FLASH_BASE_ADDRESS_S})
+  endif()
+
+  # System entry point is TF-M vector, located 1kByte after tfm_fmw_partition in DTS
+  dt_nodelabel(tfm_partition_path NODELABEL slot0_secure_partition REQUIRED)
+  dt_reg_addr(tfm_partition_offset PATH ${tfm_partition_path} REQUIRED)
+  math(EXPR tfm_fwm_boot_address "${tfm_partition_offset}+${FLASH_BASE_ADDRESS_S}+0x400")
+
+  board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw"
+    "--erase" "--start-address=${tfm_fwm_boot_address}"
+  )
+else()
+  board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
+endif()
 
 include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
 include(${ZEPHYR_BASE}/boards/common/openocd-stm32.board.cmake)
diff --git a/boards/st/stm32wba65i_dk1/board.yml b/boards/st/stm32wba65i_dk1/board.yml
index 521ca2c3169e2..cb9044a106327 100644
--- a/boards/st/stm32wba65i_dk1/board.yml
+++ b/boards/st/stm32wba65i_dk1/board.yml
@@ -4,3 +4,5 @@ board:
   vendor: st
   socs:
     - name: stm32wba65xx
+      variants:
+        - name: ns
diff --git a/boards/st/stm32wba65i_dk1/doc/index.rst b/boards/st/stm32wba65i_dk1/doc/index.rst
index fab127b663186..3e8463798d210 100644
--- a/boards/st/stm32wba65i_dk1/doc/index.rst
+++ b/boards/st/stm32wba65i_dk1/doc/index.rst
@@ -151,6 +151,48 @@ Supported Features
 
 .. zephyr:board-supported-hw::
 
+Zephyr board options
+====================
+
+Zephyr supports building both Secure and Non-Secure firmware for
+STM32WBA65I-DK1 board where TF-M is the embedded Secure firmware
+and Zephyr the Non-Secure firmware.
+
+The BOARD options are summarized below:
+
++---------------------------------+------------------------------------------+
+| BOARD                           | Description                              |
++=================================+==========================================+
+| stm32wba65i_dk1                 | For building TrustZone Disabled firmware |
++---------------------------------+------------------------------------------+
+| stm32wba65i_dk1/stm32wba65xx/ns | For building Non-Secure firmware         |
++---------------------------------+------------------------------------------+
+
+Here are the instructions to build Zephyr with a non-secure configuration,
+using :zephyr:code-sample:`tfm_ipc` sample:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/tfm_integration/tfm_ipc
+   :board: stm32wba65i_dk1/stm32wba65xx/ns
+   :goals: build
+
+Once done, before flashing, you need to first run a generated script that
+will set platform Option Bytes config and erase internal flash (among others,
+Option Bit TZEN will be set).
+
+.. code-block:: bash
+
+   $ ./build/tfm/api_ns/regression.sh
+   $ west flash
+
+Please note that, after having programmed the board for a TrustZone enabled system
+(e.g. with ``./build/tfm/api_ns/regression.sh``), the SoC TZEN Option Byte is enabled
+and you will need to operate specific sequence to disable this TZEN Option Byte
+configuration to get your board back in normal state for booting with a TrustZone
+disabled system (e.g. without TF-M support).
+You can use STM32CubeProgrammer_ to disable the SoC TZEN Option Byte config. Refer
+to `How to disable STM32WBA65 TZEN Option Byte`_.
+
 Connections and IOs
 ===================
 
@@ -230,3 +272,6 @@ You can debug an application in the usual way using OpenOCD. Here is an example
 
 .. _STM32CubeProgrammer:
    https://www.st.com/en/development-tools/stm32cubeprog.html
+
+.. _How to disable STM32WBA65 TZEN Option Byte:
+   https://wiki.st.com/stm32mcu/wiki/Connectivity:STM32WBA_BLE_%26_TrustZone#How_to_disable_the_TrustZone
diff --git a/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns.dts b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns.dts
new file mode 100644
index 0000000000000..6545194a0eca8
--- /dev/null
+++ b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns.dts
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2025 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include "stm32wba65i_dk1.dts"
+
+/ {
+	chosen {
+		zephyr,code-partition = &slot0_ns_partition;
+	};
+
+	/* SRAM1 (node label sram0) last 64kByte are owned by TF-M */
+	sram0: memory@20000000 {
+		reg = <0x20000000 DT_SIZE_K(448 - 64)>;
+	};
+
+	/* SRAM2 (node label sram1) is owned by TF-M */
+	/delete-node/ memory@20070000;
+};
+
+&flash0 {
+	/delete-node/ partitions;
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			label = "bootstage";
+			reg = <0 DT_SIZE_K(48)>;
+		};
+
+		slot0_secure_partition: partition@c000 {
+			label = "image-secure";
+			reg = <0xc000 DT_SIZE_K(256)>;
+		};
+
+		slot0_ns_partition: partition@4c000 {
+			label = "image-non-secure";
+			reg = <0x4c000 DT_SIZE_K(512)>;
+		};
+
+		storage_partition: partition@cc000 {
+			label = "storage";
+			reg = <0xcc000 (DT_SIZE_M(2) - DT_SIZE_K(48 + 256 + 512))>;
+		};
+	};
+};
diff --git a/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns.yaml b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns.yaml
new file mode 100644
index 0000000000000..1261a46cff17f
--- /dev/null
+++ b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns.yaml
@@ -0,0 +1,10 @@
+identifier: stm32wba65i_dk1/stm32wba65xx/ns
+name: ST STM32WBA65I Discovery kit with TF-M and non-secure firmware
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+ram: 384
+flash: 512
+vendor: st
diff --git a/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns_defconfig b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns_defconfig
new file mode 100644
index 0000000000000..95855969dc9bb
--- /dev/null
+++ b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns_defconfig
@@ -0,0 +1,31 @@
+# SPDX-License-Identifier: Apache-2.0
+# Copyright (c) 2025 STMicroelectronics
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable HW stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable the internal SMPS regulator
+CONFIG_POWER_SUPPLY_DIRECT_SMPS=y
+
+# Enable ADC for joystick
+CONFIG_ADC=y
+
+# Header offset since TF-M has no BL2 hence Zephyr is not signed
+CONFIG_ROM_START_OFFSET=0x400
+
+# Enable TZ non-secure configuration
+CONFIG_TRUSTED_EXECUTION_NONSECURE=y
+CONFIG_RUNTIME_NMI=y

From 4c1e1bec3d95905029dd259f75f54c3b529c9e69 Mon Sep 17 00:00:00 2001
From: Etienne Carriere <etienne.carriere@st.com>
Date: Tue, 19 Aug 2025 17:35:39 +0200
Subject: [PATCH 06/10] boards: st: nucleo_wba65ri: rename documentation file

Rename nucleo_wba65ri board documentation file for consistency
within Zephyr file tree.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
---
 boards/st/nucleo_wba65ri/doc/{nucleo_wba65ri.rst => index.rst} | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 rename boards/st/nucleo_wba65ri/doc/{nucleo_wba65ri.rst => index.rst} (100%)

diff --git a/boards/st/nucleo_wba65ri/doc/nucleo_wba65ri.rst b/boards/st/nucleo_wba65ri/doc/index.rst
similarity index 100%
rename from boards/st/nucleo_wba65ri/doc/nucleo_wba65ri.rst
rename to boards/st/nucleo_wba65ri/doc/index.rst

From 42d529455ec614e2b5441eb26edac0cbe3dff7d3 Mon Sep 17 00:00:00 2001
From: Etienne Carriere <etienne.carriere@st.com>
Date: Tue, 19 Aug 2025 17:42:23 +0200
Subject: [PATCH 07/10] boards: st: nucleo_wba65ri: fix special characters in
 board doc

Replace (R) and (TM) special charaters with |reg| and |trade|
aliases in nucleo_wba65ri board documentation file. By the way
also fix some characters case, add info and move Cortex-M description
in the overview section to prevent information duplication.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
---
 boards/st/nucleo_wba65ri/doc/index.rst | 49 +++++++++++++-------------
 1 file changed, 24 insertions(+), 25 deletions(-)

diff --git a/boards/st/nucleo_wba65ri/doc/index.rst b/boards/st/nucleo_wba65ri/doc/index.rst
index 6a24e7a250b8b..59d265f67738a 100644
--- a/boards/st/nucleo_wba65ri/doc/index.rst
+++ b/boards/st/nucleo_wba65ri/doc/index.rst
@@ -3,23 +3,24 @@
 Overview
 ********
 
-NUCLEO-WBA65RI is a Bluetooth® Low Energy, 802.15.4 and Zigbee® wireless
-and ultra-low-power board embedding a powerful and ultra-low-power radio
-compliant with the Bluetooth® Low Energy SIG specification v5.4
-with IEEE 802.15.4-2015 and Zigbee® specifications.
+NUCLEO-WBA65RI is a Bluetooth |reg| Low Energy, 802.15.4 and Zigbee |reg|
+wireless and ultra-low-power board embedding a powerful and ultra-low-power
+radio compliant with the Bluetooth |reg| Low Energy SIG specification v5.4
+with IEEE 802.15.4-2015 and Zigbee |reg| specifications.
 
-The ARDUINO® Uno V3 connectivity support and the ST morpho headers allow the
-easy expansion of the functionality of the STM32 Nucleo open development
+The ARDUINO |reg| Uno V3 connectivity support and the ST morpho headers allow
+the easy expansion of the functionality of the STM32 Nucleo open development
 platform with a wide choice of specialized shields.
 
-- Ultra-low-power wireless STM32WBA65RI microcontroller based on the Arm®
-  Cortex®‑M33 core, featuring 2 Mbyte of flash memory and 512 Kbytes of SRAM in
-  a VFQFPN68 package
+- Ultra-low-power wireless STM32WBA65RI microcontroller based on the Arm |reg|
+  Cortex |reg| ‑M33 core with TrustZone |reg|, MPU, DSP, and FPU, that operates
+  at a frequency of up to 100 MHz, featuring 2 Mbyte of flash memory and 512
+  Kbytes of SRAM in a VFQFPN68 package
 
 - MCU RF board (MB2130):
 
-  - 2.4 GHz RF transceiver supporting Bluetooth® specification v5.4
-  - Arm® Cortex® M33 CPU with TrustZone®, MPU, DSP, and FPU
+  - 2.4 GHz RF transceiver supporting Bluetooth |reg| specification v5.4
+  - Arm |reg| Cortex |reg| M33 CPU with TrustZone |reg|, MPU, DSP, and FPU
   - Integrated PCB antenna
 
 - Three user LEDs
@@ -28,7 +29,7 @@ platform with a wide choice of specialized shields.
 - Board connectors:
 
   - 2 USB Type-C
-  - ARDUINO® Uno V3 expansion connector
+  - ARDUINO |reg| Uno V3 expansion connector
   - ST morpho headers for full access to all STM32 I/Os
 
 - Flexible power-supply options: ST-LINK USB VBUS or external sources
@@ -39,19 +40,18 @@ Hardware
 ********
 
 The STM32WBA65xx multiprotocol wireless and ultralow power devices embed a
-powerful and ultralow power radio compliant with the Bluetooth® SIG Low Energy
-specification 5.4. They contain a high-performance Arm Cortex-M33 32-bit RISC
-core. They operate at a frequency of up to 100 MHz.
+powerful and ultralow power radio compliant with the Bluetooth |reg| SIG Low
+Energy specification 5.4.
 
 - Includes ST state-of-the-art patented technology
 
 - Ultra low power radio:
 
   - 2.4 GHz radio
-  - RF transceiver supporting Bluetooth® Low Energy 5.4 specification
-    IEEE 802.15.4-2015 PHY and MAC, supporting Thread, Matter and Zigbee®
+  - RF transceiver supporting Bluetooth |reg| Low Energy 5.4 specification
+    IEEE 802.15.4-2015 PHY and MAC, supporting Thread, Matter and Zigbee |reg|
   - Proprietary protocols
-  - RX sensitivity: -96 dBm (Bluetooth® Low Energy at 1 Mbps)
+  - RX sensitivity: -96 dBm (Bluetooth |reg| Low Energy at 1 Mbps)
     and -100 dBm (IEEE 802.15.4 at 250 kbps)
   - Programmable output power, up to +10 dBm with 1 dB steps
   - Support for external PA
@@ -71,8 +71,7 @@ core. They operate at a frequency of up to 100 MHz.
   - TBD µA/MHz Run mode at 3.3 V
   - Radio: Rx TBD mA / Tx at 0 dBm TBD mA
 
-- Core: Arm® 32-bit Cortex®-M33 CPU with TrustZone®, MPU, DSP, and FPU
-- ART Accelerator™: 8-Kbyte instruction cache allowing 0-wait-state execution
+- ART Accelerator |trade|: 8-Kbyte instruction cache allowing 0-wait-state execution
   from flash memory (frequency up to 100 MHz, 150 DMIPS)
 - Power management: embedded regulator LDO and SMPS step-down converter
 - Supporting switch on-the-fly and voltage scaling
@@ -80,7 +79,7 @@ core. They operate at a frequency of up to 100 MHz.
 - Benchmarks:
 
   - 1.5 DMIPS/MHz (Drystone 2.1)
-  - 410 CoreMark® (4.10 CoreMark/MHz)
+  - 410 CoreMark |reg| (4.10 CoreMark/MHz)
 
 - Clock sources:
 
@@ -104,7 +103,7 @@ core. They operate at a frequency of up to 100 MHz.
 
   - Four UARTs (ISO 7816, IrDA, modem)
   - Three SPIs
-  - Four I2C Fm+ (1 Mbit/s), SMBus/PMBus®
+  - Four I2C Fm+ (1 Mbit/s), SMBus/PMBus |reg|
 
 - System peripherals:
 
@@ -121,7 +120,7 @@ core. They operate at a frequency of up to 100 MHz.
 
 - Security and cryptography:
 
-  - Arm® TrustZone® and securable I/Os, memories, and peripherals
+  - Arm |reg| TrustZone |reg| and securable I/Os, memories, and peripherals
   - Flexible life cycle scheme with RDP and password protected debug
   - Root of trust thanks to unique boot entry and secure hide protection area (HDP)
   - SFI (secure firmware installation) thanks to embedded RSS (root secure services)
@@ -139,7 +138,7 @@ core. They operate at a frequency of up to 100 MHz.
 
 - Development support:
 
-  - Serial wire debug (SWD), JTAG
+  - Serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
 
 - ECOPACK2 compliant package
 
@@ -213,7 +212,7 @@ Flashing
 The board is configured to be flashed using west `STM32CubeProgrammer`_ runner,
 so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required.
 
-Alternatively, openocd can also be used to flash the board using
+Alternatively, OpenOCD can also be used to flash the board using
 the ``--runner`` (or ``-r``) option:
 
 .. code-block:: console

From 5ea55e6f99ae7e88e3bdcb76b3036709670eabab Mon Sep 17 00:00:00 2001
From: Etienne Carriere <etienne.carriere@st.com>
Date: Tue, 19 Aug 2025 18:04:44 +0200
Subject: [PATCH 08/10] boards: st: nucleo_wba65ri: add low power numbers in
 board doc

Add missing low power consumption numbers in nucleo_wba65ri board
documentation. These numbers are dumped from the SoC datashhet.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
---
 boards/st/nucleo_wba65ri/doc/index.rst | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/boards/st/nucleo_wba65ri/doc/index.rst b/boards/st/nucleo_wba65ri/doc/index.rst
index 59d265f67738a..f712fbfbb9a4a 100644
--- a/boards/st/nucleo_wba65ri/doc/index.rst
+++ b/boards/st/nucleo_wba65ri/doc/index.rst
@@ -64,12 +64,11 @@ Energy specification 5.4.
   - 1.71 to 3.6 V power supply
   - - 40 °C to 85 °C temperature range
   - Autonomous peripherals with DMA, functional down to Stop 1 mode
-  - TBD nA Standby mode (16 wake-up pins)
-  - TBD nA Standby mode with RTC
-  - TBD µA Standby mode with 64 KB SRAM
-  - TBD µA Stop 2 mode with 64 KB SRAM
-  - TBD µA/MHz Run mode at 3.3 V
-  - Radio: Rx TBD mA / Tx at 0 dBm TBD mA
+  - 120 nA Standby mode (16 wake-up pins)
+  - 1.68 |micro| A Standby mode with 64 KB SRAM with RTC
+  - 5.58 |micro| A Stop 2 mode with 64 KB SRAM with RTC
+  - 28.75 |micro| A/MHz Run mode at 3.3 V
+  - Radio: Rx 4.26 mA / Tx at 0 dBm 5.94 mA
 
 - ART Accelerator |trade|: 8-Kbyte instruction cache allowing 0-wait-state execution
   from flash memory (frequency up to 100 MHz, 150 DMIPS)

From 62e367199723c828155c8e8cc015dbfd8edd4c1c Mon Sep 17 00:00:00 2001
From: Etienne Carriere <etienne.carriere@st.com>
Date: Fri, 9 May 2025 12:39:05 +0200
Subject: [PATCH 09/10] boards: st: nucleo_wba65ri: Add 'ns' variant for TF-M
 support

Add variant 'ns' to nucleo_wba65ri board to embed TF-M in the SoC
secure world.

The flash layout is synced with the layout defined in Zephyr TF-M
integration of platform STM32WBA65I.

- samples/tfm_integration/psa_crypto
- samples/tfm_integration/psa_protected_storage
- samples/tfm_integration/tfm_ipc
- samples/tfm_integration/tfm_regression_test
- samples/tfm_integration/tfm_secure_partition
- tests/subsys/secure_storage/psa/crypto
- tests/subsys/secure_storage/psa/its
  (with CONFIG_TFM_ITS_MAX_ASSET_SIZE_OVERRIDE=y
  and CONFIG_TFM_ITS_MAX_ASSET_SIZE=256)

Support for PSA Arch Tests (samples/tfm_integration/tfm_psa_test) is
not yet merged but is in under review [1].

Link: https://github.com/ARM-software/psa-arch-tests/pull/406 [1]
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
---
 boards/st/nucleo_wba65ri/board.cmake          | 25 ++++++++-
 boards/st/nucleo_wba65ri/board.yml            |  2 +
 boards/st/nucleo_wba65ri/doc/index.rst        | 45 ++++++++++++++++
 .../nucleo_wba65ri_stm32wba65xx_ns.dts        | 53 +++++++++++++++++++
 .../nucleo_wba65ri_stm32wba65xx_ns.yaml       | 10 ++++
 .../nucleo_wba65ri_stm32wba65xx_ns_defconfig  | 28 ++++++++++
 6 files changed, 162 insertions(+), 1 deletion(-)
 create mode 100644 boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.dts
 create mode 100644 boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.yaml
 create mode 100644 boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns_defconfig

diff --git a/boards/st/nucleo_wba65ri/board.cmake b/boards/st/nucleo_wba65ri/board.cmake
index 828d1f367ab24..755a55bae8dcf 100644
--- a/boards/st/nucleo_wba65ri/board.cmake
+++ b/boards/st/nucleo_wba65ri/board.cmake
@@ -1,6 +1,29 @@
+# Copyright (c) 2025 STMicroelectronics
 # SPDX-License-Identifier: Apache-2.0
 
-board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
+if(CONFIG_BUILD_WITH_TFM)
+  set(FLASH_BASE_ADDRESS_S 0x0C000000)
+
+  # Flash merged TF-M + Zephyr binary
+  set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex)
+
+  if(CONFIG_HAS_FLASH_LOAD_OFFSET)
+    MATH(EXPR TFM_HEX_BASE_ADDRESS_NS "${FLASH_BASE_ADDRESS_S}+${CONFIG_FLASH_LOAD_OFFSET}")
+  else()
+    set(TFM_HEX_BASE_ADDRESS_NS ${TFM_FLASH_BASE_ADDRESS_S})
+  endif()
+
+  # System entry point is TF-M vector, located 1kByte after tfm_fmw_partition in DTS
+  dt_nodelabel(tfm_partition_path NODELABEL slot0_secure_partition REQUIRED)
+  dt_reg_addr(tfm_partition_offset PATH ${tfm_partition_path} REQUIRED)
+  math(EXPR tfm_fwm_boot_address "${tfm_partition_offset}+${FLASH_BASE_ADDRESS_S}+0x400")
+
+  board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw"
+    "--erase" "--start-address=${tfm_fwm_boot_address}"
+  )
+else()
+  board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
+endif()
 
 include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
 include(${ZEPHYR_BASE}/boards/common/openocd-stm32.board.cmake)
diff --git a/boards/st/nucleo_wba65ri/board.yml b/boards/st/nucleo_wba65ri/board.yml
index 01a51d7715d1e..7d69dba2e215b 100644
--- a/boards/st/nucleo_wba65ri/board.yml
+++ b/boards/st/nucleo_wba65ri/board.yml
@@ -4,3 +4,5 @@ board:
   vendor: st
   socs:
     - name: stm32wba65xx
+      variants:
+        - name: ns
diff --git a/boards/st/nucleo_wba65ri/doc/index.rst b/boards/st/nucleo_wba65ri/doc/index.rst
index f712fbfbb9a4a..85675f19a3922 100644
--- a/boards/st/nucleo_wba65ri/doc/index.rst
+++ b/boards/st/nucleo_wba65ri/doc/index.rst
@@ -163,6 +163,48 @@ To fetch Binary Blobs:
 
    west blobs fetch hal_stm32
 
+Zephyr board options
+====================
+
+Zephyr supports building both Secure and Non-Secure firmware for
+Nucleo WBA65RI board where TF-M is the embedded Secure firmware
+and Zephyr the Non-Secure firmware.
+
+The BOARD options are summarized below:
+
++---------------------------------+------------------------------------------+
+| BOARD                           | Description                              |
++=================================+==========================================+
+| stm32wba65i_dk1                 | For building TrustZone Disabled firmware |
++---------------------------------+------------------------------------------+
+| stm32wba65i_dk1/stm32wba65xx/ns | For building Non-Secure firmware         |
++---------------------------------+------------------------------------------+
+
+Here are the instructions to build Zephyr with a non-secure configuration,
+using :zephyr:code-sample:`tfm_ipc` sample:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/tfm_integration/tfm_ipc
+   :board: nucleo_wba65ri/stm32wba65xx/ns
+   :goals: build
+
+Once done, before flashing, you need to first run a generated script that
+will set platform Option Bytes config and erase internal flash (among others,
+Option Bit TZEN will be set).
+
+.. code-block:: bash
+
+   $ ./build/tfm/api_ns/regression.sh
+   $ west flash
+
+Please note that, after having programmed the board for a TrustZone enabled system
+(e.g. with ``./build/tfm/api_ns/regression.sh``), the SoC TZEN Option Byte is enabled
+and you will need to operate specific sequence to disable this TZEN Option Byte
+configuration to get your board back in normal state for booting with a TrustZone
+disabled system (e.g. without TF-M support).
+You can use STM32CubeProgrammer_ to disable the SoC TZEN Option Byte config. Refer
+to `How to disable STM32WBA65 TZEN Option Byte`_.
+
 Connections and IOs
 ===================
 
@@ -250,3 +292,6 @@ You can debug an application in the usual way using OpenOCD. Here is an example
 
 .. _STM32CubeProgrammer:
    https://www.st.com/en/development-tools/stm32cubeprog.html
+
+.. _How to disable STM32WBA65 TZEN Option Byte:
+   https://wiki.st.com/stm32mcu/wiki/Connectivity:STM32WBA_BLE_%26_TrustZone#How_to_disable_the_TrustZone
diff --git a/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.dts b/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.dts
new file mode 100644
index 0000000000000..c37209ca7c1a8
--- /dev/null
+++ b/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.dts
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2025 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include "nucleo_wba65ri.dts"
+
+/ {
+	chosen {
+		zephyr,code-partition = &slot0_ns_partition;
+	};
+
+	/* SRAM1 (node label sram0) last 64kByte are owned by TF-M */
+	memory@20000000 {
+		reg = <0x20000000 DT_SIZE_K(448 - 64)>;
+	};
+
+	/* SRAM2 (node label sram1) is owned by TF-M */
+	/delete-node/ memory@20070000;
+};
+
+
+&flash0 {
+	/delete-node/ partitions;
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			label = "bootstage";
+			reg = <0 DT_SIZE_K(48)>;
+		};
+
+		slot0_secure_partition: partition@c000 {
+			label = "image-secure";
+			reg = <0xc000 DT_SIZE_K(256)>;
+		};
+
+		slot0_ns_partition: partition@4c000 {
+			label = "image-non-secure";
+			reg = <0x4c000 DT_SIZE_K(512)>;
+		};
+
+		storage_partition: partition@cc000 {
+			label = "storage";
+			reg = <0xcc000 (DT_SIZE_M(2) - DT_SIZE_K(48 + 256 + 512))>;
+		};
+	};
+};
diff --git a/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.yaml b/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.yaml
new file mode 100644
index 0000000000000..09625fa81fc07
--- /dev/null
+++ b/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.yaml
@@ -0,0 +1,10 @@
+identifier: nucleo_wba65ri/stm32wba65xx/ns
+name: ST Nucleo WBA65RI with TF-M and non-secure firmware
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+ram: 384
+flash: 512
+vendor: st
diff --git a/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns_defconfig b/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns_defconfig
new file mode 100644
index 0000000000000..94e51f719e961
--- /dev/null
+++ b/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns_defconfig
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: Apache-2.0
+# Copyright (c) 2025 STMicroelectronics
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable HW stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable the internal SMPS regulator
+CONFIG_POWER_SUPPLY_DIRECT_SMPS=y
+
+# Header offset since TF-M has no BL2 hence Zephyr is not signed
+CONFIG_ROM_START_OFFSET=0x400
+
+# Enable TZ non-secure configuration
+CONFIG_TRUSTED_EXECUTION_NONSECURE=y
+CONFIG_RUNTIME_NMI=y

From 3dc0e5dceb59e26bcf0ddbf4a086ca507d519378 Mon Sep 17 00:00:00 2001
From: Etienne Carriere <etienne.carriere@st.com>
Date: Thu, 21 Aug 2025 15:29:21 +0200
Subject: [PATCH 10/10] samples: boards: st: power_mgmt: wkup_pins: add WBA65
 boards

Add WBA65RI Nucleo board to ST wkup_pins board sample.
By the way, sort the board names in sample.yaml.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
---
 .../wkup_pins/boards/nucleo_wba65ri.overlay       | 15 +++++++++++++++
 .../boards/st/power_mgmt/wkup_pins/sample.yaml    |  7 ++++---
 2 files changed, 19 insertions(+), 3 deletions(-)
 create mode 100644 samples/boards/st/power_mgmt/wkup_pins/boards/nucleo_wba65ri.overlay

diff --git a/samples/boards/st/power_mgmt/wkup_pins/boards/nucleo_wba65ri.overlay b/samples/boards/st/power_mgmt/wkup_pins/boards/nucleo_wba65ri.overlay
new file mode 100644
index 0000000000000..66b94ab492161
--- /dev/null
+++ b/samples/boards/st/power_mgmt/wkup_pins/boards/nucleo_wba65ri.overlay
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2025 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	aliases {
+		wkup-src = &user_button_1;
+	};
+};
+
+&pwr {
+	status = "okay";
+};
diff --git a/samples/boards/st/power_mgmt/wkup_pins/sample.yaml b/samples/boards/st/power_mgmt/wkup_pins/sample.yaml
index ffa78d34faeb6..80db1f2d39d6d 100644
--- a/samples/boards/st/power_mgmt/wkup_pins/sample.yaml
+++ b/samples/boards/st/power_mgmt/wkup_pins/sample.yaml
@@ -7,14 +7,15 @@ tests:
       "gpio-keys") and dt_compat_enabled("st,stm32-pwr")
     platform_allow:
       - nucleo_c092rc
+      - nucleo_f103rb
       - nucleo_g031k8
+      - nucleo_l152re
       - nucleo_l4r5zi
       - nucleo_u575zi_q
       - nucleo_u5a5zj_q
+      - nucleo_wba55cg
+      - nucleo_wba65ri
       - nucleo_wl55jc
-      - nucleo_f103rb
       - stm32l1_disco
-      - nucleo_l152re
-      - nucleo_wba55cg
     integration_platforms:
       - nucleo_l4r5zi