diff --git a/boards/renesas/fpb_rx140/Kconfig.fpb_rx140 b/boards/renesas/fpb_rx140/Kconfig.fpb_rx140 new file mode 100644 index 0000000000000..fd2e04a591823 --- /dev/null +++ b/boards/renesas/fpb_rx140/Kconfig.fpb_rx140 @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_FPB_RX140 + select SOC_R5F51406 diff --git a/boards/renesas/fpb_rx140/board.cmake b/boards/renesas/fpb_rx140/board.cmake new file mode 100644 index 0000000000000..2c4355c7fad8a --- /dev/null +++ b/boards/renesas/fpb_rx140/board.cmake @@ -0,0 +1,9 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +# options after "--tool-opt=" are directly passed to the tool. So instead of "--iface=JTAG" you could also write "--tool-opt=-if JTAG" +board_runner_args(jlink "--device=R5F51406" "--iface=FINE" "--speed=1000" "--tool-opt=-jtagconf -1,-1 -autoconnect 1") +board_runner_args(rfp "--device=RX100" "--tool=e2l" "--interface=fine" "--erase") + +include(${ZEPHYR_BASE}/boards/common/rfp.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/renesas/fpb_rx140/board.yml b/boards/renesas/fpb_rx140/board.yml new file mode 100644 index 0000000000000..a9c13a6de925a --- /dev/null +++ b/boards/renesas/fpb_rx140/board.yml @@ -0,0 +1,6 @@ +board: + name: fpb_rx140 + full_name: Fast Prototyping Board for RX140 + vendor: renesas + socs: + - name: r5f51406 diff --git a/boards/renesas/fpb_rx140/doc/fpb_rx140.webp b/boards/renesas/fpb_rx140/doc/fpb_rx140.webp new file mode 100644 index 0000000000000..ce5bd178803b6 Binary files /dev/null and b/boards/renesas/fpb_rx140/doc/fpb_rx140.webp differ diff --git a/boards/renesas/fpb_rx140/doc/index.rst b/boards/renesas/fpb_rx140/doc/index.rst new file mode 100644 index 0000000000000..b6ed1898ede72 --- /dev/null +++ b/boards/renesas/fpb_rx140/doc/index.rst @@ -0,0 +1,148 @@ +.. zephyr:board:: fpb_rx140 + +Overview +******** + +The Fast Prototyping Board for RX140 MCU Group comes equipped with an RX140 MCU +(R5F51406BGFN). The board is inexpensive for RX140 evaluation and prototype development of +various applications. It has an emulator circuit so you can write/debug programs just by +connecting it to a PC with a USB cable. In addition, it has high expandability with Arduino Uno +and two Pmod™ connectors as standard, and through-hole access to all pins of the +microcontroller. + +**MCU Native Pin Access** + +- R5F51406ADFN MCU + + - Max 48MHz, 32-bit RXv2 core (RXv2) + - 256 KB Flash, 64 KB RAM + - 80-pin, LFQFP package + +- Native pin access through 2 x 40-pin male headers (not fitted) +- RX MCU current measurement point for precision current consumption measurement +- RX MCU on-chip oscillators as main clock +- Providing 32.768 kHz crystal oscillator as sub clock + +**System Control and Ecosystem Access** + +- Two 5 V input sources + + - USB + - External power supply (using 2-pin header [not fitted]) + +- On-board debugger / programmer (E2 emulator On Board (referred as E2OB, FINE Interface)) + +- User LEDs and switches + + - Two User LEDs (green) + - Power LED (green) indicating availability of regulated power + - Debug LED (yellow) indicating the debug connection + - One User switch + - One Reset switch + +- Two popular ecosystem expansions + + - Two Digilent PmodTM + - Arduino® (Uno R3) connector + +Hardware +******** +Detailed hardware features can be found at: + +- RX140 MCU: `RX140 Group User's Manual Hardware`_ +- FPB-RX140: `FPB_RX140 - User's Manual`_ + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +Programming and Debugging +************************* + +.. zephyr:board-supported-runners:: + +Applications for the ``fpb_rx140`` board can be built, flashed, and debugged using standard +Zephyr workflows. Refer to :ref:`build_an_application` and :ref:`application_run` for more details. + +**Note:** Currently, the RX140 is built and programmed using the Renesas GCC RX toolchain. +Please follow the steps below to program it onto the board: + + - Download and install GCC for RX toolchain: + + https://llvm-gcc-renesas.com/rx-download-toolchains/ + + - Set env variable: + + .. code-block:: console + + export ZEPHYR_TOOLCHAIN_VARIANT=cross-compile + export CROSS_COMPILE=/bin/rx-elf- + + - Build the Blinky Sample for FPB-RX140 + + .. code-block:: console + + cd ~/zephyrproject/zephyr + west build -p always -b fpb_rx140 samples/basic/blinky + +Flashing +======== + +The program can be flashed to RSK-RX140 using the **E2OB** by connecting the board to the host PC +and open Jumper J4. +Here’s an example for building and flashing the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: rsk_rx140 + :goals: build flash + +Debugging +========= + +You can use `Renesas Debug extension`_ on Visual Studio Code for a visual debug interface. +The configuration for launch.json is as below. + +.. code-block:: json + + { + "version": "0.2.0", + "configurations": [ + { + "type": "renesas-hardware", + "request": "launch", + "name": "RX140 Renesas Debugging E2lite", + "target": { + "deviceFamily": "RX", + "device": "R5F51406", + "debuggerType": "E2LITE" + "serverParameters": [ + "-uUseFine=", "1", + "-w=", "0", + ], + } + } + ] + } + +References +********** + +- `FPB_RX140 Website`_ +- `RX140 MCU group Website`_ + +.. _FPB_RX140 Website: + https://www.renesas.com/en/design-resources/boards-kits/fpb-rx140 + +.. _RX140 MCU group Website: + https://www.renesas.com/en/products/rx140 + +.. _FPB_RX140 - User's Manual: + https://www.renesas.com/en/document/mat/fpb-rx140-v1-users-manual + +.. _RX140 Group User's Manual Hardware: + https://www.renesas.com/en/document/mah/rx140-group-users-manual-hardware-rev120 + +.. _Renesas Debug extension: + https://marketplace.visualstudio.com/items?itemName=RenesasElectronicsCorporation.renesas-debug diff --git a/boards/renesas/fpb_rx140/fpb_rx140-pinctrl.dtsi b/boards/renesas/fpb_rx140/fpb_rx140-pinctrl.dtsi new file mode 100644 index 0000000000000..29cb56c0aa17c --- /dev/null +++ b/boards/renesas/fpb_rx140/fpb_rx140-pinctrl.dtsi @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&pinctrl { + sci5_default: sci5_default { + group1 { + psels = , /* TX */ + ; /* RX */ + }; + }; +}; diff --git a/boards/renesas/fpb_rx140/fpb_rx140.dts b/boards/renesas/fpb_rx140/fpb_rx140.dts new file mode 100644 index 0000000000000..25d04adc8755a --- /dev/null +++ b/boards/renesas/fpb_rx140/fpb_rx140.dts @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include +#include "fpb_rx140-pinctrl.dtsi" + +/ { + model = "Renesas FPB+RX140 KIT"; + compatible = "renesas,fpb_rx140"; + + chosen { + zephyr,sram = &sram0; + zephyr,flash = &code_flash; + zephyr,flash-controller = &flash; + zephyr,console = &uart5; + zephyr,shell-uart = &uart5; + }; + + leds { + compatible = "gpio-leds"; + + led1: led1 { + gpios = <&ioport2 0 GPIO_ACTIVE_LOW>; + label = "LED1"; + }; + + led2: led2 { + gpios = <&ioport3 2 GPIO_ACTIVE_LOW>; + label = "LED2"; + }; + }; + + aliases { + led0 = &led1; + led1 = &led2; + }; +}; + +&subclk { + status = "okay"; +}; + +&pclkblock { + clocks = <&hoco>; +}; + +&cmt { + clock-frequency = <3000000>; + status = "okay"; +}; + +&ioport2 { + status = "okay"; +}; + +&ioport3 { + status = "okay"; +}; + +&sci5 { + pinctrl-0 = <&sci5_default>; + pinctrl-names = "default"; + status = "okay"; + + uart5: uart { + current-speed = <115200>; + status = "okay"; + }; +}; diff --git a/boards/renesas/fpb_rx140/fpb_rx140.yaml b/boards/renesas/fpb_rx140/fpb_rx140.yaml new file mode 100644 index 0000000000000..4bcf743b872b0 --- /dev/null +++ b/boards/renesas/fpb_rx140/fpb_rx140.yaml @@ -0,0 +1,15 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +identifier: fpb_rx140 +name: Fast Prototyping Board for RX140 +type: mcu +arch: rx +toolchain: + - cross-compile +supported: + - gpio + - serial + - timer +ram: 64 +flash: 256 diff --git a/boards/renesas/fpb_rx140/fpb_rx140_defconfig b/boards/renesas/fpb_rx140/fpb_rx140_defconfig new file mode 100644 index 0000000000000..c23cdd58f2a0c --- /dev/null +++ b/boards/renesas/fpb_rx140/fpb_rx140_defconfig @@ -0,0 +1,13 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +# Enable GPIO +CONFIG_GPIO=y + +# Enable UART driver +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/boards/renesas/rsk_rx140/Kconfig.rsk_rx140 b/boards/renesas/rsk_rx140/Kconfig.rsk_rx140 new file mode 100644 index 0000000000000..e31cacfc84a7c --- /dev/null +++ b/boards/renesas/rsk_rx140/Kconfig.rsk_rx140 @@ -0,0 +1,5 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_RSK_RX140 + select SOC_R5F51406 diff --git a/boards/renesas/rsk_rx140/board.cmake b/boards/renesas/rsk_rx140/board.cmake new file mode 100644 index 0000000000000..2c4355c7fad8a --- /dev/null +++ b/boards/renesas/rsk_rx140/board.cmake @@ -0,0 +1,9 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +# options after "--tool-opt=" are directly passed to the tool. So instead of "--iface=JTAG" you could also write "--tool-opt=-if JTAG" +board_runner_args(jlink "--device=R5F51406" "--iface=FINE" "--speed=1000" "--tool-opt=-jtagconf -1,-1 -autoconnect 1") +board_runner_args(rfp "--device=RX100" "--tool=e2l" "--interface=fine" "--erase") + +include(${ZEPHYR_BASE}/boards/common/rfp.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/renesas/rsk_rx140/board.yml b/boards/renesas/rsk_rx140/board.yml new file mode 100644 index 0000000000000..8d8cb2a90eb5a --- /dev/null +++ b/boards/renesas/rsk_rx140/board.yml @@ -0,0 +1,6 @@ +board: + name: rsk_rx140 + full_name: Renesas Starter Kit for RX140 + vendor: renesas + socs: + - name: r5f51406 diff --git a/boards/renesas/rsk_rx140/doc/index.rst b/boards/renesas/rsk_rx140/doc/index.rst new file mode 100644 index 0000000000000..1ce4926b02f08 --- /dev/null +++ b/boards/renesas/rsk_rx140/doc/index.rst @@ -0,0 +1,151 @@ +.. zephyr:board:: rsk_rx140 + +Overview +******** + +The Renesas Starter Kit for RX140 is an evaluation and starter kit for developers who are new +to the RX140 MCU family (Program Flash 256KB, RAM 64KB, Pin Count 80-pin). +The kit includes an LCD display module and an on-chip debugging emulator + +**MCU Native Pin Access** + +The RSK-RX140 includes: + +- 48-MHz, 32-bit RX140 MCU (R5F51406BDFN, 80-pin LFQFP package) +- Direct MCU pin access through standard headers for easy peripheral integration +- On-board 8 MHz crystal, 32.768 kHz sub-clock, and internal oscillators +- Multiple low power consumption modes + +**System Control and Debugging** + +- USB Mini-B connector for serial communication (via on-board RL78/G1C USB-to-Serial MCU) +- Power source options: + + - USB-powered + - External DC supply (5V input jack) + - Debugger supply (E2 Lite) + +- Debugging support: + + - Via E2 Lite debugger (14-pin connector) + +- User LEDs and buttons: + + - Four User LEDs (green, orange, red x2) + - Power LED (green) + - One Reset button, three User buttons + - One potentiometer (connected to ADC input) + +- Ecosystem expansions: + + - Two Digilent Pmod connectors (LCD and Spare) + - On-board 2Kbit I2C EEPROM + +**Special Feature Access** + +- Capacitive touch sensing (slider x1, buttons x2) +- CAN and LIN transceivers +- IEC60730 compliance support +- Security functions (built-in Trusted Secure IP) + +Hardware +******** +Detailed hardware features can be found at: + +- RX140 MCU: `RX140 Group User's Manual Hardware`_ +- RSK-RX140: `RSK_RX140 - User's Manual`_ + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +Programming and Debugging +************************* + +.. zephyr:board-supported-runners:: + +Applications for the ``rsk_rx140`` board can be built, flashed, and debugged using standard +Zephyr workflows. Refer to :ref:`build_an_application` and :ref:`application_run` for more details. + +**Note:** Currently, the RX140 is built and programmed using the Renesas GCC RX toolchain. +Please follow the steps below to program it onto the board: + + - Download and install GCC for RX toolchain: + + https://llvm-gcc-renesas.com/rx-download-toolchains/ + + - Set env variable: + + .. code-block:: console + + export ZEPHYR_TOOLCHAIN_VARIANT=cross-compile + export CROSS_COMPILE=/bin/rx-elf- + + - Build the Blinky Sample for RSK-RX140 + + .. code-block:: console + + cd ~/zephyrproject/zephyr + west build -p always -b rsk_rx140 samples/basic/blinky + +Flashing +======== + +The program can be flashed to RSK-RX140 using the **E2 Lite debugger** by +connecting the board's 14-pin debug connector to the host PC. +Here’s an example for building and flashing the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: rsk_rx140 + :goals: build flash + +Debugging +========= + +You can use `Renesas Debug extension`_ on Visual Studio Code for a visual debug interface. +The configuration for launch.json is as below. + +.. code-block:: json + + { + "version": "0.2.0", + "configurations": [ + { + "type": "renesas-hardware", + "request": "launch", + "name": "RX140 Renesas Debugging E2lite", + "target": { + "deviceFamily": "RX", + "device": "R5F51406", + "debuggerType": "E2LITE" + "serverParameters": [ + "-uUseFine=", "1", + "-w=", "0", + ], + } + } + ] + } + +References +********** + +- `RSK_RX140 Website`_ +- `RX140 MCU group Website`_ + +.. _RSK_RX140 Website: + https://www.renesas.com/en/design-resources/boards-kits/rsk-rx140 + +.. _RX140 MCU group Website: + https://www.renesas.com/en/products/rx140 + +.. _RSK_RX140 - User's Manual: + https://www.renesas.com/en/document/mat/renesas-starter-kit-rx140-users-manual + +.. _RX140 Group User's Manual Hardware: + https://www.renesas.com/en/document/mah/rx140-group-users-manual-hardware-rev120 + +.. _Renesas Debug extension: + https://marketplace.visualstudio.com/items?itemName=RenesasElectronicsCorporation.renesas-debug diff --git a/boards/renesas/rsk_rx140/doc/rsk_rx140.webp b/boards/renesas/rsk_rx140/doc/rsk_rx140.webp new file mode 100644 index 0000000000000..38ec20beffd36 Binary files /dev/null and b/boards/renesas/rsk_rx140/doc/rsk_rx140.webp differ diff --git a/boards/renesas/rsk_rx140/rsk_rx140-pinctrl.dtsi b/boards/renesas/rsk_rx140/rsk_rx140-pinctrl.dtsi new file mode 100644 index 0000000000000..fc0c6f117c7fe --- /dev/null +++ b/boards/renesas/rsk_rx140/rsk_rx140-pinctrl.dtsi @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&pinctrl { + sci1_default: sci1_default { + group1 { + psels = , /* TX */ + ; /* RX */ + }; + }; +}; diff --git a/boards/renesas/rsk_rx140/rsk_rx140.dts b/boards/renesas/rsk_rx140/rsk_rx140.dts new file mode 100644 index 0000000000000..034b0fc9a7be9 --- /dev/null +++ b/boards/renesas/rsk_rx140/rsk_rx140.dts @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include +#include "rsk_rx140-pinctrl.dtsi" + +/ { + model = "Renesas RSK+RX140 KIT"; + compatible = "renesas,rsk_rx140"; + + chosen { + zephyr,sram = &sram0; + zephyr,flash = &code_flash; + zephyr,flash-controller = &flash; + zephyr,console = &uart1; + zephyr,shell-uart = &uart1; + }; + + leds { + compatible = "gpio-leds"; + + led1: led1 { + gpios = <&ioport0 4 GPIO_ACTIVE_LOW>; + label = "LED1"; + }; + + led3: led3 { + gpios = <&ioport0 7 GPIO_ACTIVE_LOW>; + label = "LED3"; + }; + }; + + aliases { + led0 = &led1; + led1 = &led3; + }; +}; + +&xtal { + clock-frequency = ; + mosel = <0>; + #clock-cells = <0>; + status = "okay"; +}; + +&subclk { + status = "okay"; +}; + +&pll { + status = "okay"; +}; + +&cmt { + clock-frequency = <3000000>; + status = "okay"; +}; + +&ioport0 { + status = "okay"; +}; + +&ioport3 { + status = "okay"; +}; + +&sci1 { + pinctrl-0 = <&sci1_default>; + pinctrl-names = "default"; + status = "okay"; + + uart1: uart { + current-speed = <115200>; + status = "okay"; + }; +}; diff --git a/boards/renesas/rsk_rx140/rsk_rx140.yaml b/boards/renesas/rsk_rx140/rsk_rx140.yaml new file mode 100644 index 0000000000000..648943f71f921 --- /dev/null +++ b/boards/renesas/rsk_rx140/rsk_rx140.yaml @@ -0,0 +1,15 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +identifier: rsk_rx140 +name: Renesas Starter Kit for RX140 +type: mcu +arch: rx +toolchain: + - cross-compile +supported: + - gpio + - serial + - timer +ram: 64 +flash: 256 diff --git a/boards/renesas/rsk_rx140/rsk_rx140_defconfig b/boards/renesas/rsk_rx140/rsk_rx140_defconfig new file mode 100644 index 0000000000000..c23cdd58f2a0c --- /dev/null +++ b/boards/renesas/rsk_rx140/rsk_rx140_defconfig @@ -0,0 +1,13 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +# Enable GPIO +CONFIG_GPIO=y + +# Enable UART driver +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/drivers/pinctrl/renesas/rx/pinctrl_renesas_rx.c b/drivers/pinctrl/renesas/rx/pinctrl_renesas_rx.c index 9a738215dc90d..d46f1848d275b 100644 --- a/drivers/pinctrl/renesas/rx/pinctrl_renesas_rx.c +++ b/drivers/pinctrl/renesas/rx/pinctrl_renesas_rx.c @@ -16,7 +16,7 @@ extern const uint8_t g_gpio_open_drain_n_support[]; extern const uint8_t g_gpio_pull_up_support[]; -#ifndef CONFIG_SOC_SERIES_RX261 +#if !defined(CONFIG_SOC_SERIES_RX261) && !defined(CONFIG_SOC_SERIES_RX140) extern const uint8_t g_gpio_dscr_support[]; #endif @@ -47,7 +47,7 @@ static int pinctrl_configure_pullup(const pinctrl_soc_pin_t *pin, uint32_t value return ret; } -#ifndef CONFIG_SOC_SERIES_RX261 +#if !defined(CONFIG_SOC_SERIES_RX261) && !defined(CONFIG_SOC_SERIES_RX140) static int pinctrl_configure_dscr(const pinctrl_soc_pin_t *pin, uint32_t value) { gpio_port_pin_t port_pin; @@ -137,7 +137,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp if (ret != 0) { return -EINVAL; } -#ifndef CONFIG_SOC_SERIES_RX261 +#if !defined(CONFIG_SOC_SERIES_RX261) && !defined(CONFIG_SOC_SERIES_RX140) /* Set drive-strength */ ret = pinctrl_configure_dscr(pin, pin->cfg.drive_strength); diff --git a/drivers/serial/uart_renesas_rx_sci.c b/drivers/serial/uart_renesas_rx_sci.c index 3075e2bae4b5c..071494d8cc89d 100644 --- a/drivers/serial/uart_renesas_rx_sci.c +++ b/drivers/serial/uart_renesas_rx_sci.c @@ -18,6 +18,8 @@ #if CONFIG_SOC_SERIES_RX130 #include "r_sci_rx130_private.h" +#elif CONFIG_SOC_SERIES_RX140 +#include "r_sci_rx140_private.h" #elif CONFIG_SOC_SERIES_RX261 #include "r_sci_rx261_private.h" #elif CONFIG_SOC_SERIES_RX26T diff --git a/dts/rx/renesas/r5f51406.dtsi b/dts/rx/renesas/r5f51406.dtsi new file mode 100644 index 0000000000000..60ed0da753dd3 --- /dev/null +++ b/dts/rx/renesas/r5f51406.dtsi @@ -0,0 +1,185 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +/ { + clocks: clocks { + #address-cells = <1>; + #size-cells = <1>; + + xtal: clock-main-osc { + compatible = "renesas,rx-cgc-root-clock"; + clock-frequency = ; + mosel = <0>; + stabilization-time = <4>; + #clock-cells = <0>; + status = "disabled"; + }; + + hoco: clock-hoco { + compatible = "renesas,rx-cgc-root-clock"; + clock-frequency = ; + #clock-cells = <0>; + status = "okay"; + }; + + loco: clock-loco { + compatible = "renesas,rx-cgc-root-clock"; + clock-frequency = ; + #clock-cells = <0>; + status = "okay"; + }; + + subclk: clock-subclk { + compatible = "renesas,rx-cgc-root-clock"; + clock-frequency = <32768>; + drive-capacity = <0>; + #clock-cells = <0>; + status = "disabled"; + }; + + iwdtlsclk: clock-iwdt-low-speed { + compatible = "renesas,rx-cgc-root-clock"; + clock-frequency = <15000>; + #clock-cells = <0>; + status = "disabled"; + }; + + pll: pll { + compatible = "renesas,rx-cgc-pll"; + #clock-cells = <0>; + div = <1>; + clocks = <&xtal>; + mul = ; + status = "disabled"; + }; + + pclkblock: pclkblock@80010 { + compatible = "renesas,rx-cgc-pclk-block"; + reg = <0x00080010 4>, + <0x00080014 4>, + <0x00080018 4>, + <0x0008001C 4>; + reg-names = "MSTPA", "MSTPB", "MSTPC", "MSTPD"; + #clock-cells = <0>; + clocks = <&pll>; + status = "okay"; + + iclk: iclk { + compatible = "renesas,rx-cgc-pclk"; + div = <1>; + #clock-cells = <2>; + status = "okay"; + }; + + fclk: fclk { + compatible = "renesas,rx-cgc-pclk"; + div = <1>; + #clock-cells = <2>; + status = "okay"; + }; + + pclkb: pclkb { + compatible = "renesas,rx-cgc-pclk"; + div = <2>; + #clock-cells = <2>; + status = "okay"; + }; + + pclkd: pclkd { + compatible = "renesas,rx-cgc-pclk"; + div = <1>; + #clock-cells = <2>; + status = "okay"; + }; + }; + + clkout: clkout { + compatible = "renesas,rx-cgc-pclk"; + clocks = <&pll>; + div = <8>; + #clock-cells = <2>; + status = "disabled"; + }; + + rtcsclk: rtcsclk { + compatible = "renesas,rx-cgc-pclk"; + clocks = <&subclk>; + #clock-cells = <2>; + status = "disabled"; + }; + + caclclk: caclclk { + compatible = "renesas,rx-cgc-pclk"; + clocks = <&loco>; + #clock-cells = <2>; + status = "disabled"; + }; + + cacmclk: cacmclk { + compatible = "renesas,rx-cgc-pclk"; + clocks = <&xtal>; + #clock-cells = <2>; + status = "disabled"; + }; + + cachclk: cachclk { + compatible = "renesas,rx-cgc-pclk"; + clocks = <&hoco>; + #clock-cells = <2>; + status = "disabled"; + }; + + cacsclk: cacsclk { + compatible = "renesas,rx-cgc-pclk"; + clocks = <&subclk>; + #clock-cells = <2>; + status = "disabled"; + }; + + iwdtclk: iwdtclk { + compatible = "renesas,rx-cgc-pclk"; + clocks = <&iwdtlsclk>; + #clock-cells = <2>; + status = "disabled"; + }; + }; + + soc { + sram0: memory@0 { + device_type = "memory"; + compatible = "mmio-sram"; + reg = <0x0 DT_SIZE_K(48)>; + }; + + flash: flash-controller@7fc090 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "renesas,rx-flash"; + reg = <0x7fc090 0x3f24>; + interrupts = <23 1>; + interrupt-names = "frdyi"; + + code_flash: flash@fffc0000 { + compatible = "renesas,rx-nv-flash"; + reg = <0xfffc0000 DT_SIZE_K(256)>; + write-block-size = <8>; + erase-block-size = <2048>; + }; + + data_flash: flash@100000 { + compatible = "renesas,rx-nv-flash"; + bgo-enable; + reg = <0x00100000 DT_SIZE_K(8)>; + write-block-size = <1>; + erase-block-size = <256>; + }; + }; + }; +}; diff --git a/dts/rx/renesas/rx140-common.dtsi b/dts/rx/renesas/rx140-common.dtsi new file mode 100644 index 0000000000000..a64a3d65d371c --- /dev/null +++ b/dts/rx/renesas/rx140-common.dtsi @@ -0,0 +1,521 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * common device tree elements of all (currently supported) RX MCUs + */ + +#include +#include +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + compatible = "renesas,rxv2"; + device_type = "cpu"; + reg = <0>; + status = "okay"; + }; + }; + + icu: interrupt-controller@87000 { + #interrupt-cells = <2>; + #address-cells = <1>; + #size-cells = <1>; + compatible = "renesas,rx-icu"; + interrupt-controller; + reg = <0x0087000 0xff>, + <0x0087200 0x1f>, + <0x0087300 0xff>, + <0x00872f0 0x02>, + <0x0087500 0x0f>, + <0x0087510 0x01>, + <0x0087514 0x01>; + reg-names = "IR", "IER", "IPR", "FIR","IRQCR","IRQFLTE","IRQFLTC0"; + + swint1: swint1@872e0 { + compatible = "renesas,rx-swint"; + reg = <0x000872e0 0x01>; + interrupts = <27 14>; + interrupt-parent = <&icu>; + status = "okay"; + }; + }; + + dtc: rx-dtc@82400 { + compatible = "renesas,rx-dtc"; + reg = <0x00082400 0x01>; + clocks = <&iclk MSTPA 28>; + status = "okay"; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + interrupt-parent = <&icu>; + + pinctrl: pin-controller@8c11f { + compatible = "renesas,rx-pinctrl"; + reg = <0x0008C11F 0x3c0>; + status = "okay"; + }; + + pinmux0: pinmux@8c143 { + compatible = "renesas,rx-pinmux"; + #pinmux-cells = <2>; + reg = <0x00008c143 0x8>; /* P00PFS */ + status = "okay"; + }; + + pinmux1: pinmux@8c14a { + compatible = "renesas,rx-pinmux"; + #pinmux-cells = <2>; + reg = <0x00008c14a 0x8>; /* P1nPFS */ + status = "okay"; + }; + + pinmux2: pinmux@8c150 { + compatible = "renesas,rx-pinmux"; + #pinmux-cells = <2>; + reg = <0x00008c150 0x8>; /* P2nPFS */ + status = "okay"; + }; + + pinmux3: pinmux@8c158 { + compatible = "renesas,rx-pinmux"; + #pinmux-cells = <2>; + reg = <0x00008c158 0x8>; /* P3nPFS */ + status = "okay"; + }; + + pinmux4: pinmux@8c160 { + compatible = "renesas,rx-pinmux"; + #pinmux-cells = <2>; + reg = <0x00008c160 0x8>; /* P4nPFS */ + status = "okay"; + }; + + pinmux5: pinmux@8c16c { + compatible = "renesas,rx-pinmux"; + #pinmux-cells = <2>; + reg = <0x00008c16c 0x8>; /* P5nPFS */ + status = "okay"; + }; + + pinmuxa: pinmux@8c190 { + compatible = "renesas,rx-pinmux"; + #pinmux-cells = <2>; + reg = <0x00008c190 0x8>; /* PAnPFS */ + status = "okay"; + }; + + pinmuxb: pinmux@8c198 { + compatible = "renesas,rx-pinmux"; + #pinmux-cells = <2>; + reg = <0x00008c198 0x8>; /* PBnPFS */ + status = "okay"; + }; + + pinmuxc: pinmux@8c1a2 { + compatible = "renesas,rx-pinmux"; + #pinmux-cells = <2>; + reg = <0x00008c1a2 0x8>; /* PCnPFS */ + status = "okay"; + }; + + pinmuxd: pinmux@8c1a8 { + compatible = "renesas,rx-pinmux"; + #pinmux-cells = <2>; + reg = <0x00008c1a8 0x8>; /* PDnPFS */ + status = "okay"; + }; + + pinmuxe: pinmux@8c1b0 { + compatible = "renesas,rx-pinmux"; + #pinmux-cells = <2>; + reg = <0x00008c1b0 0x8>; /* PEnPFS */ + status = "okay"; + }; + + pinmuxh: pinmux@8c1c8 { + compatible = "renesas,rx-pinmux"; + #pinmux-cells = <2>; + reg = <0x00008c1c8 0x8>; /* PHnPFS */ + status = "okay"; + }; + + pinmuxj: pinmux@8c1d1 { + compatible = "renesas,rx-pinmux"; + #pinmux-cells = <2>; + reg = <0x00008c1d1 0x8>; /* PJnPFS */ + status = "okay"; + }; + + ioport0: gpio@8c000 { + compatible = "renesas,rx-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + port = <0>; + reg = <0x0008c000 0x01>, + <0x0008c020 0x01>, + <0x0008c040 0x01>, + <0x0008c060 0x01>, + <0x0008c0c0 0x01>; + reg-names = "PDR", "PODR", "PIDR", "PMR", "PCR"; + pinmux = <&pinmux0>; + status = "disabled"; + }; + + ioport1: gpio@8c001 { + compatible = "renesas,rx-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + port = <1>; + reg = <0x0008c001 0x01>, + <0x0008c082 0x01>, + <0x0008c021 0x01>, + <0x0008c041 0x01>, + <0x0008c061 0x01>, + <0x0008c083 0x01>, + <0x0008c0c1 0x01>; + reg-names = "PDR", "PODR", "PIDR", "PMR", "ODR0", "ODR1", "PCR"; + pinmux = <&pinmux1>; + status = "disabled"; + }; + + ioport2: gpio@8c002 { + compatible = "renesas,rx-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + port = <2>; + reg = <0x0008c002 0x01>, + <0x0008c022 0x01>, + <0x0008c042 0x01>, + <0x0008c062 0x01>, + <0x0008c084 0x01>, + <0x0008c085 0x01>, + <0x0008c0c2 0x01>; + reg-names = "PDR", "PODR", "PIDR", "PMR", "ODR0", "ODR1", "PCR"; + pinmux = <&pinmux2>; + status = "disabled"; + }; + + ioport3: gpio@8c003 { + compatible = "renesas,rx-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + port = <3>; + reg = <0x0008c003 0x01>, + <0x0008c023 0x01>, + <0x0008c043 0x01>, + <0x0008c063 0x01>, + <0x0008c086 0x01>, + <0x0008c087 0x01>, + <0x0008c0c3 0x01>; + reg-names = "PDR", "PODR", "PIDR", "PMR", "ODR0", "ODR1", "PCR"; + pinmux = <&pinmux3>; + status = "disabled"; + }; + + ioport4: gpio@8c004 { + compatible = "renesas,rx-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + port = <4>; + reg = <0x0008c004 0x01>, + <0x0008c024 0x01>, + <0x0008c044 0x01>, + <0x0008c064 0x01>, + <0x0008c0c4 0x01>; + reg-names = "PDR", "PODR", "PIDR", "PMR", "PCR"; + pinmux = <&pinmux4>; + status = "disabled"; + }; + + ioport5: gpio@8c005 { + compatible = "renesas,rx-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + port = <5>; + reg = <0x0008c005 0x01>, + <0x0008c025 0x01>, + <0x0008c045 0x01>, + <0x0008c065 0x01>, + <0x0008c0c5 0x01>; + reg-names = "PDR", "PODR", "PIDR", "PMR", "PCR"; + pinmux = <&pinmux5>; + status = "disabled"; + }; + + ioporta: gpio@8c00a { + compatible = "renesas,rx-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + port = <10>; + reg = <0x0008c00a 0x01>, + <0x0008c02a 0x01>, + <0x0008c04a 0x01>, + <0x0008c06a 0x01>, + <0x0008c094 0x01>, + <0x0008c095 0x01>, + <0x0008c0ca 0x01>; + reg-names = "PDR", "PODR", "PIDR", "PMR", "ODR0", "ODR1", "PCR"; + pinmux = <&pinmuxa>; + status = "disabled"; + }; + + ioportb: gpio@8c00b { + compatible = "renesas,rx-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + port = <11>; + reg = <0x0008c00b 0x01>, + <0x0008c02b 0x01>, + <0x0008c04b 0x01>, + <0x0008c06b 0x01>, + <0x0008c096 0x01>, + <0x0008c097 0x01>, + <0x0008c0cb 0x01>; + reg-names = "PDR", "PODR", "PIDR", "PMR", "ODR0", "ODR1", "PCR"; + pinmux = <&pinmuxb>; + status = "disabled"; + }; + + ioportc: gpio@8c00c { + compatible = "renesas,rx-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + port = <12>; + reg = <0x0008c00c 0x01>, + <0x0008c02c 0x01>, + <0x0008c04c 0x01>, + <0x0008c06c 0x01>, + <0x0008c098 0x01>, + <0x0008c099 0x01>, + <0x0008c0cc 0x01>; + reg-names = "PDR", "PODR", "PIDR", "PMR", "ODR0", "ODR1", "PCR"; + pinmux = <&pinmuxc>; + status = "disabled"; + }; + + ioportd: gpio@8c00d { + compatible = "renesas,rx-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + port = <13>; + reg = <0x0008c00d 0x01>, + <0x0008c02d 0x01>, + <0x0008c04d 0x01>, + <0x0008c06d 0x01>, + <0x0008c09a 0x01>, + <0x0008c09b 0x01>, + <0x0008c0cd 0x01>; + reg-names = "PDR", "PODR", "PIDR", "PMR", "ODR0", "ODR1", "PCR"; + pinmux = <&pinmuxd>; + status = "disabled"; + }; + + ioporte: gpio@8c00e { + compatible = "renesas,rx-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + port = <14>; + reg = <0x0008c00e 0x01>, + <0x0008c02e 0x01>, + <0x0008c04e 0x01>, + <0x0008c06e 0x01>, + <0x0008c09c 0x01>, + <0x0008c09d 0x01>, + <0x0008c0ce 0x01>; + reg-names = "PDR", "PODR", "PIDR", "PMR", "ODR0", "ODR1", "PCR"; + pinmux = <&pinmuxe>; + status = "disabled"; + }; + + ioporth: gpio@8c011 { + compatible = "renesas,rx-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + port = <17>; + reg = <0x0008c011 0x01>, + <0x0008c031 0x01>, + <0x0008c051 0x01>, + <0x0008c071 0x01>, + <0x0008c0d1 0x01>; + reg-names = "PDR", "PODR", "PIDR", "PMR", "PCR"; + pinmux = <&pinmuxh>; + status = "disabled"; + }; + + ioportj: gpio@8c012 { + compatible = "renesas,rx-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + port = <19>; + reg = <0x0008c012 0x01>, + <0x0008c032 0x01>, + <0x0008c052 0x01>, + <0x0008c072 0x01>, + <0x0008c0d2 0x01>; + reg-names = "PDR", "PODR", "PIDR", "PMR", "PCR"; + pinmux = <&pinmuxj>; + status = "disabled"; + }; + + sci1: sci1@8a020 { + compatible = "renesas,rx-sci"; + interrupts = <218 1>, <219 1>, <220 1>, <221 1>; + interrupt-names = "eri", "rxi", "txi", "tei"; + reg = <0x8a020 0x20>; + clocks = <&pclkb MSTPB 30>; + status = "disabled"; + channel = <1>; + + uart { + compatible = "renesas,rx-uart-sci"; + status = "disabled"; + }; + }; + + sci5: sci5@8a0a0 { + compatible = "renesas,rx-sci"; + interrupts = <222 1>, <223 1>, <224 1>, <225 1>; + interrupt-names = "eri", "rxi", "txi", "tei"; + reg = <0x8A0a0 0x20>; + clocks = <&pclkb MSTPB 26>; + status = "disabled"; + channel = <5>; + + uart { + compatible = "renesas,rx-uart-sci"; + status = "disabled"; + }; + }; + + sci6: sci6@8a0c0 { + compatible = "renesas,rx-sci"; + interrupts = <226 1>, <227 1>, <228 1>, <229 1>; + interrupt-names = "eri", "rxi", "txi", "tei"; + reg = <0x8a0c0 0x20>; + clocks = <&pclkb MSTPB 25>; + status = "disabled"; + channel = <6>; + + uart { + compatible = "renesas,rx-uart-sci"; + status = "disabled"; + }; + }; + + sci8: sci8@8a100 { + compatible = "renesas,rx-sci"; + interrupts = <230 1>, <231 1>, <232 1>, <233 1>; + interrupt-names = "eri", "rxi", "txi", "tei"; + reg = <0x8a100 0x20>; + clocks = <&pclkb MSTPC 27>; + status = "disabled"; + channel = <8>; + + uart { + compatible = "renesas,rx-uart-sci"; + status = "disabled"; + }; + }; + + sci9: sci9@8a120 { + compatible = "renesas,rx-sci"; + interrupts = <234 1>, <235 1>, <236 1>, <237 1>; + interrupt-names = "eri", "rxi", "txi", "tei"; + reg = <0x8a120 0x20>; + clocks = <&pclkb MSTPB 4>; + status = "disabled"; + channel = <8>; + + uart { + compatible = "renesas,rx-uart-sci"; + status = "disabled"; + }; + }; + + sci12: sci12@8b300 { + compatible = "renesas,rx-sci"; + interrupts = <238 1>, <239 1>, <240 1>, <241 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + reg = <0x8b300 0x20>; + clocks = <&pclkb MSTPB 4>; + status = "disabled"; + channel = <8>; + + uart { + compatible = "renesas,rx-uart-sci"; + status = "disabled"; + }; + }; + + cmt: timer@88000 { + compatible = "renesas,rx-timer-cmt-start-control"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x00088000 0x02>; + clocks = <&pclkb MSTPA 15>; + reg-names = "CMSTR0"; + status = "okay"; + + cmt0: timer@88002 { + compatible = "renesas,rx-timer-cmt"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x00088002 0x02>, + <0x00088004 0x02>, + <0x00088006 0x02>; + reg-names = "CMCR", "CMCNT", "CMCOR"; + interrupts = <28 1>; + interrupt-names = "cmi"; + status = "okay"; + }; + + cmt1: timer@88008 { + compatible = "renesas,rx-timer-cmt"; + reg = <0x00088008 0x02>, + <0x0008800A 0x02>, + <0x0008800C 0x02>; + reg-names = "CMCR", "CMCNT", "CMCOR"; + interrupts = <29 1>; + interrupt-names = "cmi"; + status = "disabled"; + }; + }; + + ofsm: ofsm@ffffff80 { + compatible = "zephyr,memory-region"; + reg = <0xFFFFFF80 0x0F>; + zephyr,memory-region = "OFSM"; + status = "okay"; + }; + }; +}; diff --git a/soc/renesas/rx/rx140/CMakeLists.txt b/soc/renesas/rx/rx140/CMakeLists.txt new file mode 100644 index 0000000000000..278090303888b --- /dev/null +++ b/soc/renesas/rx/rx140/CMakeLists.txt @@ -0,0 +1,12 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +zephyr_include_directories(.) + +zephyr_sources( + soc.c +) + +zephyr_linker_sources(SECTIONS ofsm.ld) + +set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/rx/linker.ld CACHE INTERNAL "") diff --git a/soc/renesas/rx/rx140/Kconfig b/soc/renesas/rx/rx140/Kconfig new file mode 100644 index 0000000000000..5759400e1bf9c --- /dev/null +++ b/soc/renesas/rx/rx140/Kconfig @@ -0,0 +1,11 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_RX140 + select RX + select CPU_RXV2 + select XIP + select CLOCK_CONTROL_RENESAS_RX_CGC if CLOCK_CONTROL + select HAS_RENESAS_RX_RDP + select CLOCK_CONTROL + select SOC_EARLY_INIT_HOOK diff --git a/soc/renesas/rx/rx140/Kconfig.defconfig b/soc/renesas/rx/rx140/Kconfig.defconfig new file mode 100644 index 0000000000000..1f487bae61ed1 --- /dev/null +++ b/soc/renesas/rx/rx140/Kconfig.defconfig @@ -0,0 +1,23 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_RX140 + +DT_CMT_PATH := $(dt_nodelabel_path,cmt) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_CMT_PATH),clock-frequency) + +# SYS_CLOCK_TICKS_PER_SEC is set to 100 if PCLKB is 48MHz or less. +# (PCLKB = SYS_CLOCK_HW_CYCLES_PER_SEC * 8) +config SYS_CLOCK_TICKS_PER_SEC + default 100 if SYS_CLOCK_HW_CYCLES_PER_SEC <= 6000000 + default 1000 + +config INITIALIZATION_STACK_SIZE + default 512 + +config BUILD_OUTPUT_HEX + default y + +endif # SOC_SERIES_RX140 diff --git a/soc/renesas/rx/rx140/Kconfig.soc b/soc/renesas/rx/rx140/Kconfig.soc new file mode 100644 index 0000000000000..3e1d1cd9a9c28 --- /dev/null +++ b/soc/renesas/rx/rx140/Kconfig.soc @@ -0,0 +1,20 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_RX140 + bool + select SOC_FAMILY_RENESAS_RX + help + Renesas RX140 series + +config SOC_R5F51406 + bool + select SOC_SERIES_RX140 + help + R5F51406 + +config SOC_SERIES + default "rx140" if SOC_SERIES_RX140 + +config SOC + default "r5f51406" if SOC_R5F51406 diff --git a/soc/renesas/rx/rx140/ofsm.ld b/soc/renesas/rx/rx140/ofsm.ld new file mode 100644 index 0000000000000..09ac7009e71f6 --- /dev/null +++ b/soc/renesas/rx/rx140/ofsm.ld @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +SECTION_DATA_PROLOGUE(.dtc_vector_table,(NOLOAD),) +{ + /* If DTC is used, put the DTC vector table at the start of SRAM. + This avoids memory holes due to 1K alignment required by it. */ + *(.dtc_vector_table) +} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION) + +SECTION_PROLOGUE(.ofsm,,) +{ + __OFSM_START = .; + KEEP(*(.ofs_mde)) + . = __OFSM_START + 0x8; + KEEP(*(.ofs1)) + . = __OFSM_START + 0xC; + KEEP(*(.ofs0)) + __OFSM_END = .; +} GROUP_LINK_IN(OFSM) = 0xFF diff --git a/soc/renesas/rx/rx140/soc.c b/soc/renesas/rx/rx140/soc.c new file mode 100644 index 0000000000000..cd238840d13a2 --- /dev/null +++ b/soc/renesas/rx/rx140/soc.c @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @brief System/hardware module for RX SOC family + */ + +#include +#include +#include +#include +#include + +#include "platform.h" +#include "r_bsp_cpu.h" + +void soc_early_init_hook(void) +{ +#ifdef CONFIG_HAS_RENESAS_RX_RDP + bsp_ram_initialize(); + bsp_interrupt_open(); + bsp_register_protect_open(); +#if CONFIG_RENESAS_NONE_USED_PORT_INIT == 1 + /* + * This is the function that initializes the unused port. + * Please see datails on this in the "Handling of Unused Pins" section of PORT chapter + * of RX MCU of User's manual. + * And please MUST set "BSP_PACKAGE_PINS" definition to your device of pin type in + * r_bsp_config.h Otherwise, the port may output without intention. + */ + bsp_non_existent_port_init(); + +#endif /* CONFIG_RENESAS_NONE_USED_PORT_INIT */ +#else + renesas_rx_register_protect_open(); +#endif /* CONFIG_HAS_RENESAS_RX_RDP */ +} diff --git a/soc/renesas/rx/rx140/soc.h b/soc/renesas/rx/rx140/soc.h new file mode 100644 index 0000000000000..b6bfd9344d9ea --- /dev/null +++ b/soc/renesas/rx/rx140/soc.h @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @brief SOC header file for Renesas RX SOC series + */ + +#ifndef _SOC_H_ +#define _SOC_H_ + +#include "reg_protection.h" +#include + +#endif /* _SOC_H_ */ diff --git a/soc/renesas/rx/soc.yml b/soc/renesas/rx/soc.yml index 3d65c6a3d03c8..6e116afb3227e 100644 --- a/soc/renesas/rx/soc.yml +++ b/soc/renesas/rx/soc.yml @@ -4,6 +4,9 @@ family: - name: rx130 socs: - name: r5f51308axfp + - name: rx140 + socs: + - name: r5f51406 - name: rx62n socs: - name: r5f562n8 diff --git a/west.yml b/west.yml index e56baad71cc6e..bd44f66ed8cd4 100644 --- a/west.yml +++ b/west.yml @@ -226,7 +226,7 @@ manifest: - hal - name: hal_renesas path: modules/hal/renesas - revision: f0b78440ba8f0b4a07cdd657031ac9ec1cc4c126 + revision: pull/141/head groups: - hal - name: hal_rpi_pico