diff --git a/boards/renesas/mcb_rx26t/mcb_rx26t_defconfig b/boards/renesas/mcb_rx26t/mcb_rx26t_defconfig index 47ef28e9e96dd..c23cdd58f2a0c 100644 --- a/boards/renesas/mcb_rx26t/mcb_rx26t_defconfig +++ b/boards/renesas/mcb_rx26t/mcb_rx26t_defconfig @@ -6,7 +6,7 @@ CONFIG_GPIO=y # Enable UART driver CONFIG_SERIAL=y -CONFIG_UART_INTERRUPT_DRIVEN=n +CONFIG_UART_INTERRUPT_DRIVEN=y # Enable console CONFIG_CONSOLE=y diff --git a/drivers/interrupt_controller/CMakeLists.txt b/drivers/interrupt_controller/CMakeLists.txt index 44a0b7573a81e..d41784c6276f0 100644 --- a/drivers/interrupt_controller/CMakeLists.txt +++ b/drivers/interrupt_controller/CMakeLists.txt @@ -44,6 +44,7 @@ zephyr_library_sources_ifdef(CONFIG_NXP_SIUL2_EIRQ intc_nxp_siul2_eirq. zephyr_library_sources_ifdef(CONFIG_NXP_S32_WKPU intc_wkpu_nxp_s32.c) zephyr_library_sources_ifdef(CONFIG_XMC4XXX_INTC intc_xmc4xxx.c) zephyr_library_sources_ifdef(CONFIG_NXP_PINT intc_nxp_pint.c) +zephyr_library_sources_ifdef(CONFIG_RENESAS_RX_GRP_INTC intc_renesas_rx_grp_int.c) zephyr_library_sources_ifdef(CONFIG_RENESAS_RX_ICU intc_renesas_rx_icu.c) zephyr_library_sources_ifdef(CONFIG_RENESAS_RZ_EXT_IRQ intc_renesas_rz_ext_irq.c) zephyr_library_sources_ifdef(CONFIG_NXP_IRQSTEER intc_nxp_irqsteer.c) diff --git a/drivers/interrupt_controller/Kconfig.renesas_rx b/drivers/interrupt_controller/Kconfig.renesas_rx index cd7921f5f2461..63ded1782c597 100644 --- a/drivers/interrupt_controller/Kconfig.renesas_rx +++ b/drivers/interrupt_controller/Kconfig.renesas_rx @@ -7,3 +7,10 @@ config RENESAS_RX_ICU depends on DT_HAS_RENESAS_RX_ICU_ENABLED help Renesas RX series interrupt controller unit + +config RENESAS_RX_GRP_INTC + bool "Renesas RX series group interrupt" + default y + depends on DT_HAS_RENESAS_RX_GRP_INTC_ENABLED + help + Renesas RX series group interrupt feature diff --git a/drivers/interrupt_controller/intc_renesas_rx_grp_int.c b/drivers/interrupt_controller/intc_renesas_rx_grp_int.c new file mode 100644 index 0000000000000..729ba0b8df298 --- /dev/null +++ b/drivers/interrupt_controller/intc_renesas_rx_grp_int.c @@ -0,0 +1,149 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * SPDX-License-Identifier: Apache-2.0 + */ + +#define DT_DRV_COMPAT renesas_rx_grp_intc + +#include +#include +#include +#include +#include + +extern void group_bl0_handler_isr(void); +extern void group_bl1_handler_isr(void); +extern void group_bl2_handler_isr(void); +extern void group_al0_handler_isr(void); +extern void group_al1_handler_isr(void); + +#define VECT_GROUP_BL0 DT_IRQN(DT_NODELABEL(group_irq_bl0)) +#define VECT_GROUP_BL1 DT_IRQN(DT_NODELABEL(group_irq_bl1)) +#define VECT_GROUP_BL2 DT_IRQN(DT_NODELABEL(group_irq_bl2)) +#define VECT_GROUP_AL0 DT_IRQN(DT_NODELABEL(group_irq_al0)) +#define VECT_GROUP_AL1 DT_IRQN(DT_NODELABEL(group_irq_al1)) + +/** + * @brief configuration data for a group interrupt device + */ +struct rx_grp_int_cfg { + /* address of the Group Interrupt Request Enable Register (GENxxx) */ + volatile uint32_t *gen; + /* vector number of the interrupt */ + const uint8_t vect; + /* priority of the interrupt */ + const uint8_t prio; +}; + +static struct k_spinlock lock; + +int rx_grp_intc_set_callback(const struct device *dev, bsp_int_src_t vector, bsp_int_cb_t callback, + void *context) +{ + ARG_UNUSED(dev); + bsp_int_err_t err; + + err = R_BSP_InterruptWrite_EX(vector, callback, context); + + if (err != BSP_INT_SUCCESS) { + err = -EINVAL; + } + + return err; +} + +int rx_grp_intc_set_grp_int(const struct device *dev, bsp_int_src_t vector, bool set) +{ + const struct rx_grp_int_cfg *cfg = dev->config; + volatile bsp_int_ctrl_t group_priority; + bsp_int_err_t err; + + group_priority.ipl = cfg->prio; + + k_spinlock_key_t key = k_spin_lock(&lock); + + if (set) { + /* ENABLE GROUP INTERRUPTS */ + err = R_BSP_InterruptControl(vector, BSP_INT_CMD_GROUP_INTERRUPT_ENABLE, + (void *)&group_priority); + } else { + /* DISABLE GROUP INTERRUPTS */ + err = R_BSP_InterruptControl(vector, BSP_INT_CMD_GROUP_INTERRUPT_DISABLE, NULL); + } + + k_spin_unlock(&lock, key); + + if (err != BSP_INT_SUCCESS) { + return -EINVAL; + } + + return err; +} + +int rx_grp_intc_set_gen(const struct device *dev, int is_number, bool set) +{ + const struct rx_grp_int_cfg *cfg = dev->config; + + if (is_number < 0 || is_number > 31) { + return -EINVAL; + } + + k_spinlock_key_t key = k_spin_lock(&lock); + + if (set) { + /* ENABLE GROUP INTERRUPTS */ + *cfg->gen |= (1U << is_number); + } else { + /* DISABLE GROUP INTERRUPTS */ + *cfg->gen &= ~(1U << is_number); + } + + k_spin_unlock(&lock, key); + + return 0; +} + +static int rx_grp_intc_init(const struct device *dev) +{ + const struct rx_grp_int_cfg *cfg = dev->config; + + switch (cfg->vect) { + case VECT_GROUP_BL0: + IRQ_CONNECT(VECT_GROUP_BL0, cfg->prio, group_bl0_handler_isr, NULL, 0); + break; + case VECT_GROUP_BL1: + IRQ_CONNECT(VECT_GROUP_BL1, cfg->prio, group_bl1_handler_isr, NULL, 0); + break; + case VECT_GROUP_BL2: + IRQ_CONNECT(VECT_GROUP_BL2, cfg->prio, group_bl2_handler_isr, NULL, 0); + break; + case VECT_GROUP_AL0: + IRQ_CONNECT(VECT_GROUP_AL0, cfg->prio, group_al0_handler_isr, NULL, 0); + break; + case VECT_GROUP_AL1: + IRQ_CONNECT(VECT_GROUP_AL1, cfg->prio, group_al1_handler_isr, NULL, 0); + break; + default: + /* ERROR */ + return -EINVAL; + } + + irq_enable(cfg->vect); + + return 0; +} + +#define GRP_INT_RX_INIT(index) \ + static struct rx_grp_int_cfg rx_grp_int_##index##_cfg = { \ + .gen = (uint32_t *)DT_INST_REG_ADDR_BY_NAME(index, GEN), \ + .vect = DT_INST_IRQN(index), \ + .prio = DT_INST_IRQ(index, priority)}; \ + static int rx_grp_int_##index##_init(const struct device *dev) \ + { \ + return rx_grp_intc_init(dev); \ + } \ + DEVICE_DT_INST_DEFINE(index, rx_grp_int_##index##_init, NULL, NULL, \ + &rx_grp_int_##index##_cfg, PRE_KERNEL_1, \ + CONFIG_KERNEL_INIT_PRIORITY_DEVICE, NULL); + +DT_INST_FOREACH_STATUS_OKAY(GRP_INT_RX_INIT); diff --git a/drivers/serial/uart_renesas_rx_sci.c b/drivers/serial/uart_renesas_rx_sci.c index 3075e2bae4b5c..ec428b7d358fd 100644 --- a/drivers/serial/uart_renesas_rx_sci.c +++ b/drivers/serial/uart_renesas_rx_sci.c @@ -13,6 +13,10 @@ #include #include +#if defined(CONFIG_RENESAS_RX_GRP_INTC) +#include +#endif + #include "r_sci_rx_if.h" #include "iodefine_sci.h" @@ -33,6 +37,13 @@ LOG_MODULE_REGISTER(rx_uart_sci, CONFIG_UART_LOG_LEVEL); #define DEV_CFG(dev) ((const struct uart_rx_sci_config *const)(dev)->config) #define DEV_BASE(dev) (DEV_CFG(dev)->regs) +#if defined(CONFIG_RENESAS_RX_GRP_INTC) +#define _SCI_INT_TEI_SRC(chan) BSP_INT_SRC_BL0_SCI##chan##_TEI##chan +#define SCI_INT_TEI_SRC(chan) _SCI_INT_TEI_SRC(chan) +#define _SCI_INT_ERI_SRC(chan) BSP_INT_SRC_BL0_SCI##chan##_ERI##chan +#define SCI_INT_ERI_SRC(chan) _SCI_INT_ERI_SRC(chan) +#endif + #if defined(CONFIG_UART_INTERRUPT_DRIVEN) static void uart_rx_sci_txi_isr(const struct device *dev); #endif @@ -64,13 +75,117 @@ struct uart_rx_sci_data { #if defined(CONFIG_UART_INTERRUPT_DRIVEN) uint8_t rxi_irq; uint8_t txi_irq; +#if defined(CONFIG_RENESAS_RX_GRP_INTC) + bsp_int_src_t tei_src; + bsp_int_src_t eri_src; + /* Group interrupt controller for the transmit end interrupt (TEI) */ + const struct device *tei_ctrl; + /* Group interrupt number for the transmit end interrupt (TEI) */ + uint8_t tei_num; + /* Group interrupt controller for the error interrupt (ERI) */ + const struct device *eri_ctrl; + /* Group interrupt number for the error interrupt (ERI) */ + uint8_t eri_num; +#else uint8_t tei_irq; uint8_t eri_irq; +#endif uart_irq_callback_user_data_t user_cb; void *user_cb_data; #endif }; +#if defined(CONFIG_UART_INTERRUPT_DRIVEN) || defined(CONFIG_UART_ASYNC_API) +#ifdef CONFIG_RENESAS_RX_GRP_INTC + +void uart_rx_sci_tei_isr(bsp_int_cb_args_t *p_args) +{ + struct device *sci_dev = (struct device *)(p_args->p_context); + volatile struct st_sci *sci = (struct st_sci *)DEV_BASE(sci_dev); + + /* Disable SCI.SCR.TEIE */ + sci->SCR.BIT.TEIE = 0; + +#if defined(CONFIG_UART_INTERRUPT_DRIVEN) + struct uart_rx_sci_data *data = sci_dev->data; + + if (data->user_cb != NULL) { + + data->user_cb(sci_dev, data->user_cb_data); + } +#endif +} + +void uart_rx_sci_eri_isr(bsp_int_cb_args_t *p_args) +{ + struct device *sci_dev = (struct device *)(p_args->p_context); + +#if defined(CONFIG_UART_INTERRUPT_DRIVEN) + struct uart_rx_sci_data *data = sci_dev->data; + + if (data->user_cb != NULL) { + + data->user_cb(sci_dev, data->user_cb_data); + } +#endif +} + +static inline int uart_rx_sci_tei_grp_enable(const struct device *dev) +{ + struct uart_rx_sci_data *data = dev->data; + int err; + + err = rx_grp_intc_set_callback(data->tei_ctrl, (bsp_int_src_t)data->tei_src, + (bsp_int_cb_t)uart_rx_sci_tei_isr, (void *)dev); + if (err != 0) { + LOG_ERR("Failed to set callback for group interrupt TEI: %d", err); + return err; + } + + err = rx_grp_intc_set_gen(data->tei_ctrl, data->tei_num, true); + if (err != 0) { + LOG_ERR("Failed to allow interrupt request for TEI: %d", err); + return err; + } + + err = rx_grp_intc_set_grp_int(data->tei_ctrl, (bsp_int_src_t)data->tei_src, true); + if (err != 0) { + LOG_ERR("Failed to enable group interrupt for TEI: %d", err); + return err; + } + + return 0; +} + +static inline int uart_rx_sci_eri_grp_enable(const struct device *dev) +{ + struct uart_rx_sci_data *data = dev->data; + int err; + + err = rx_grp_intc_set_callback(data->eri_ctrl, (bsp_int_src_t)data->eri_src, + (bsp_int_cb_t)uart_rx_sci_eri_isr, (void *)dev); + if (err != 0) { + LOG_ERR("Failed to set callback for group interrupt ERI: %d", err); + return err; + } + + err = rx_grp_intc_set_gen(data->eri_ctrl, data->eri_num, true); + if (err != 0) { + LOG_ERR("Failed to allow interrupt request for ERI: %d", err); + return err; + } + + err = rx_grp_intc_set_grp_int(data->eri_ctrl, (bsp_int_src_t)data->eri_src, true); + if (err != 0) { + LOG_ERR("Failed to enable group interrupt for ERI: %d", err); + return err; + } + + return 0; +} +#endif +#endif + static int uart_rx_sci_poll_in(const struct device *dev, unsigned char *c) { volatile struct st_sci *sci = (struct st_sci *)DEV_BASE(dev); @@ -234,12 +349,24 @@ static int uart_rx_fifo_fill(const struct device *dev, const uint8_t *tx_data, i { volatile struct st_sci *sci = (struct st_sci *)DEV_BASE(dev); uint8_t num_tx = 0U; +#if defined(CONFIG_RENESAS_RX_GRP_INTC) + struct uart_rx_sci_data *data = dev->data; + /* Disable ICU.GEN and SCI.SCR.TEIE*/ + rx_grp_intc_set_gen(data->tei_ctrl, data->tei_num, false); + sci->SCR.BIT.TEIE = 0; +#endif if (size > 0 && sci->SSR.BIT.TDRE) { /* Send a character (8bit , parity none) */ sci->TDR = tx_data[num_tx++]; } +#if defined(CONFIG_RENESAS_RX_GRP_INTC) + /* Enable ICU.GEN and SCI.SCR.TEIE*/ + sci->SCR.BIT.TEIE = 1; + rx_grp_intc_set_gen(data->tei_ctrl, data->tei_num, true); +#endif + return num_tx; } @@ -258,11 +385,21 @@ static int uart_rx_fifo_read(const struct device *dev, uint8_t *rx_data, const i static void uart_rx_irq_tx_enable(const struct device *dev) { - struct uart_rx_sci_data *data = dev->data; volatile struct st_sci *sci = (struct st_sci *)DEV_BASE(dev); - sci->SCR.BYTE |= (BIT(R_SCI_SCR_TIE_Pos) | BIT(R_SCI_SCR_TEIE_Pos)); + +#ifdef CONFIG_RENESAS_RX_GRP_INTC + /* Allows the interrupt request for the tei interrupt */ + int err = uart_rx_sci_tei_grp_enable(dev); + + if (err != 0) { + LOG_ERR("Failed to enable group interrupt TEI: %d", err); + return; + } +#else + struct uart_rx_sci_data *data = dev->data; irq_enable(data->tei_irq); +#endif /* CONFIG_RENESAS_RX_GRP_INTC */ if (sci->SSR.BIT.TDRE) { /* the callback function is usually called from an interrupt, * preventing other interrupts to be triggered during execution @@ -278,11 +415,23 @@ static void uart_rx_irq_tx_enable(const struct device *dev) static void uart_rx_irq_tx_disable(const struct device *dev) { - struct uart_rx_sci_data *data = dev->data; volatile struct st_sci *sci = (struct st_sci *)DEV_BASE(dev); sci->SCR.BYTE &= ~(BIT(R_SCI_SCR_TIE_Pos) | BIT(R_SCI_SCR_TEIE_Pos)); +#ifdef CONFIG_RENESAS_RX_GRP_INTC + struct uart_rx_sci_data *data = dev->data; + int err = 0; + + /* Disable the interrupt request for the tei interrupt */ + err = rx_grp_intc_set_gen(data->tei_ctrl, data->tei_num, false); + if (err != 0) { + LOG_ERR("Failed to disable group interrupt TEI: %d", err); + return; + } +#else + struct uart_rx_sci_data *data = dev->data; irq_disable(data->tei_irq); +#endif /* CONFIG_RENESAS_RX_GRP_INTC */ } static int uart_rx_irq_tx_ready(const struct device *dev) @@ -305,6 +454,16 @@ static void uart_rx_irq_rx_enable(const struct device *dev) volatile struct st_sci *sci = (struct st_sci *)DEV_BASE(dev); sci->SCR.BIT.RIE = 1U; + +#ifdef CONFIG_RENESAS_RX_GRP_INTC + /* Allows the interrupt request for the tei interrupt */ + int err = uart_rx_sci_eri_grp_enable(dev); + + if (err != 0) { + LOG_ERR("Failed to enable group interrupt ERI: %d", err); + return; + } +#endif /* CONFIG_RENESAS_RX_GRP_INTC */ } static void uart_rx_irq_rx_disable(const struct device *dev) @@ -323,16 +482,39 @@ static int uart_rx_irq_rx_ready(const struct device *dev) static void uart_rx_irq_err_enable(const struct device *dev) { - struct uart_rx_sci_data *data = dev->data; +#ifndef CONFIG_RENESAS_RX_GRP_INTC + struct uart_rx_sci_data *data = dev->data; irq_enable(data->eri_irq); +#else + /* Allows the interrupt request for the eri interrupt */ + int err = uart_rx_sci_eri_grp_enable(dev); + + if (err != 0) { + LOG_ERR("Failed to enable group interrupt ERI: %d", err); + return; + } +#endif /* CONFIG_RENESAS_RX_GRP_INTC */ } static void uart_rx_irq_err_disable(const struct device *dev) { - struct uart_rx_sci_data *data = dev->data; +#ifndef CONFIG_RENESAS_RX_GRP_INTC + struct uart_rx_sci_data *data = dev->data; irq_disable(data->eri_irq); + +#else + /* Disable the interrupt request for the eri interrupt */ + struct uart_rx_sci_data *data = dev->data; + int err = 0; + + err = rx_grp_intc_set_gen(data->eri_ctrl, data->eri_num, false); + if (err != 0) { + LOG_ERR("Failed to disable interrupt request for ERI: %d", err); + return; + } +#endif /* CONFIG_RENESAS_RX_GRP_INTC */ } static int uart_rx_irq_is_pending(const struct device *dev) @@ -446,7 +628,7 @@ static void uart_rx_sci_txi_isr(const struct device *dev) } #endif -#ifndef CONFIG_SOC_SERIES_RX26T +#ifndef CONFIG_RENESAS_RX_GRP_INTC static void uart_rx_sci_tei_isr(const struct device *dev) { struct uart_rx_sci_data *data = dev->data; @@ -466,18 +648,8 @@ static void uart_rx_sci_eri_isr(const struct device *dev) } #endif -#if defined(CONFIG_SOC_SERIES_RX26T) -#define UART_RX_SCI_CONFIG_INIT(index) -#else -#define UART_RX_SCI_CONFIG_INIT(index) \ - .rxi_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq), \ - .txi_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq), \ - .tei_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), tei, irq), \ - .eri_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), eri, irq), -#endif - #if CONFIG_UART_INTERRUPT_DRIVEN || CONFIG_UART_ASYNC_API -#ifndef CONFIG_SOC_SERIES_RX26T +#ifndef CONFIG_RENESAS_RX_GRP_INTC #define UART_RX_SCI_IRQ_INIT(index) \ do { \ IRQ_CONNECT(DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq), \ @@ -495,11 +667,39 @@ static void uart_rx_sci_eri_isr(const struct device *dev) irq_enable(DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq)); \ irq_enable(DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq)); \ irq_enable(DT_IRQ_BY_NAME(DT_INST_PARENT(index), tei, irq)); \ - irq_enable(DT_IRQ_BY_NAME(DT_INST_PARENT(index), eri, irq)); \ } while (0) + +#define UART_RX_SCI_CONFIG_INIT(index) \ + .rxi_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq), \ + .txi_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq), \ + .tei_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), tei, irq), \ + .eri_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), eri, irq), +#else +#define UART_RX_SCI_IRQ_INIT(index) \ + do { \ + IRQ_CONNECT(DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq), \ + DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, priority), \ + uart_rx_sci_rxi_isr, DEVICE_DT_INST_GET(index), 0); \ + IRQ_CONNECT(DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq), \ + DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, priority), \ + uart_rx_sci_txi_isr, DEVICE_DT_INST_GET(index), 0); \ + irq_enable(DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq)); \ + irq_enable(DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq)); \ + } while (0) + +#define UART_RX_SCI_CONFIG_INIT(index) \ + .rxi_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq), \ + .txi_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq), \ + .tei_src = SCI_INT_TEI_SRC(DT_PROP(DT_INST_PARENT(index), channel)), \ + .eri_src = SCI_INT_ERI_SRC(DT_PROP(DT_INST_PARENT(index), channel)), \ + .tei_ctrl = DEVICE_DT_GET(DT_PHANDLE(DT_INST_PARENT(index), tei_ctrl)), \ + .tei_num = DT_PROP(DT_INST_PARENT(index), tei_number), \ + .eri_ctrl = DEVICE_DT_GET(DT_PHANDLE(DT_INST_PARENT(index), eri_ctrl)), \ + .eri_num = DT_PROP(DT_INST_PARENT(index), eri_number), #endif #else #define UART_RX_SCI_IRQ_INIT(index) +#define UART_RX_SCI_CONFIG_INIT(index) #endif #define UART_RX_INIT(index) \ diff --git a/dts/bindings/interrupt-controller/renesas,rx-grp-intc.yaml b/dts/bindings/interrupt-controller/renesas,rx-grp-intc.yaml new file mode 100644 index 0000000000000..0c264200e8083 --- /dev/null +++ b/dts/bindings/interrupt-controller/renesas,rx-grp-intc.yaml @@ -0,0 +1,22 @@ +# Copyright (c) 2021 KT-Elektronik Klaucke und Partner GmbH +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +description: Renesas group interrupt +compatible: "renesas,rx-grp-intc" + +include: [interrupt-controller.yaml, base.yaml] + +properties: + reg: + required: true + + reg-names: + required: true + + "#interrupt-cells": + const: 2 + +interrupt-cells: + - irq + - priority diff --git a/dts/bindings/misc/renesas,rx-sci.yaml b/dts/bindings/misc/renesas,rx-sci.yaml index 687cfae2c6f8b..e61290794ba46 100644 --- a/dts/bindings/misc/renesas,rx-sci.yaml +++ b/dts/bindings/misc/renesas,rx-sci.yaml @@ -14,3 +14,25 @@ properties: channel: type: int required: true + + tei-ctrl: + type: phandle + description: | + Group interrupt controller for the transmit end interrupt (TEI). This only applies + in cases the RX MCU supports group interrupt feature + + tei-number: + type: int + description: | + Number of the TEI in the interrupt group of tei-ctrl + + eri-ctrl: + type: phandle + description: | + Group interrupt controller for the error interrupt (ERI). This only applies + in cases the RX MCU supports group interrupt feature + + eri-number: + type: int + description: | + Number of the ERI in the interrupt group of eri-ctrl diff --git a/dts/rx/renesas/rx26t-common.dtsi b/dts/rx/renesas/rx26t-common.dtsi index e95d7346bffb3..2a1e127644a82 100644 --- a/dts/rx/renesas/rx26t-common.dtsi +++ b/dts/rx/renesas/rx26t-common.dtsi @@ -38,9 +38,12 @@ <0x0087300 0xff>, <0x00872f0 0x02>, <0x0087500 0x0f>, - <0x0087510 0x01>, - <0x0087514 0x01>; - reg-names = "IR", "IER", "IPR", "FIR", "IRQCR", "IRQFLTE", "IRQFLTC0"; + <0x0087520 0x01>, + <0x0087521 0x01>, + <0x0087528 0x01>, + <0x008752a 0x01>; + reg-names = "IR", "IER", "IPR", "FIR", "IRQCR", "IRQFLTE", + "IRQFLTE1", "IRQFLTC0", "IRQFLTC1"; swint1: swint1@872e0 { compatible = "renesas,rx-swint"; @@ -464,6 +467,10 @@ interrupt-names = "rxi", "txi"; reg = <0x8A020 0x20>; clocks = <&pclkb MSTPB 30>; + tei-ctrl = <&group_irq_bl0>; + tei-number = <2>; + eri-ctrl = <&group_irq_bl0>; + eri-number = <3>; status = "disabled"; channel = <1>; @@ -479,6 +486,10 @@ interrupt-names = "rxi", "txi"; reg = <0x8A0A0 0x20>; clocks = <&pclkb MSTPB 26>; + tei-ctrl = <&group_irq_bl0>; + tei-number = <10>; + eri-ctrl = <&group_irq_bl0>; + eri-number = <11>; status = "disabled"; channel = <5>; @@ -494,6 +505,10 @@ interrupt-names = "rxi", "txi"; reg = <0x8A0C0 0x20>; clocks = <&pclkb MSTPB 25>; + tei-ctrl = <&group_irq_bl0>; + tei-number = <12>; + eri-ctrl = <&group_irq_bl0>; + eri-number = <13>; status = "disabled"; channel = <6>; @@ -509,6 +524,10 @@ interrupt-names = "rxi", "txi"; reg = <0x8B300 0x20>; clocks = <&pclkb MSTPB 4>; + tei-ctrl = <&group_irq_bl0>; + tei-number = <16>; + eri-ctrl = <&group_irq_bl0>; + eri-number = <17>; status = "disabled"; channel = <12>; @@ -558,5 +577,77 @@ zephyr,memory-region = "OFSM"; status = "okay"; }; + + group_irq_be0: grp_intc@87600 { + compatible = "renesas,rx-grp-intc"; + interrupt-controller; + label = "be0"; + reg = <0x00087600 0x04>, + <0x00087640 0x04>; + reg-names = "GRP", "GEN"; + interrupts = <106 4>; + status = "disabled"; + #interrupt-cells = <2>; + }; + + group_irq_bl0: grp_intc@87630 { + compatible = "renesas,rx-grp-intc"; + interrupt-controller; + label = "bl0"; + reg = <0x00087630 0x04>, + <0x00087670 0x04>; + reg-names = "GRP", "GEN"; + interrupts = <110 4>; + status = "okay"; + #interrupt-cells = <2>; + }; + + group_irq_bl1: grp_intc@87634 { + compatible = "renesas,rx-grp-intc"; + interrupt-controller; + label = "bl1"; + reg = <0x00087634 0x04>, + <0x00087674 0x04>; + reg-names = "GRP", "GEN"; + interrupts = <111 4>; + status = "disabled"; + #interrupt-cells = <2>; + }; + + group_irq_bl2: grp_intc@87638 { + compatible = "renesas,rx-grp-intc"; + interrupt-controller; + label = "bl2"; + reg = <0x00087638 0x04>, + <0x00087678 0x04>; + reg-names = "GRP", "GEN"; + interrupts = <107 4>; + status = "disabled"; + #interrupt-cells = <2>; + }; + + group_irq_al0: grp_intc@87830 { + compatible = "renesas,rx-grp-intc"; + interrupt-controller; + label = "al0"; + reg = <0x00087830 0x04>, + <0x00087870 0x04>; + reg-names = "GRP", "GEN"; + interrupts = <112 4>; + status = "disabled"; + #interrupt-cells = <2>; + }; + + group_irq_al1: grp_intc@87834 { + compatible = "renesas,rx-grp-intc"; + interrupt-controller; + label = "al1"; + reg = <0x00087834 0x04>, + <0x00087874 0x04>; + reg-names = "GRP", "GEN"; + interrupts = <113 4>; + status = "disabled"; + #interrupt-cells = <2>; + }; }; }; diff --git a/include/zephyr/drivers/interrupt_controller/intc_renesas_rx_grp_int.h b/include/zephyr/drivers/interrupt_controller/intc_renesas_rx_grp_int.h new file mode 100644 index 0000000000000..b4d35c195ae25 --- /dev/null +++ b/include/zephyr/drivers/interrupt_controller/intc_renesas_rx_grp_int.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_RENESAS_RX_GRP_INT_H_ +#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_RENESAS_RX_GRP_INT_H_ + +#include "platform.h" + +int rx_grp_intc_set_callback(const struct device *dev, bsp_int_src_t vector, bsp_int_cb_t callback, + void *context); +int rx_grp_intc_set_grp_int(const struct device *dev, bsp_int_src_t vector, bool set); +int rx_grp_intc_set_gen(const struct device *dev, int is_number, bool set); + +#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_RENESAS_RX_GRP_INT_H_ */ diff --git a/west.yml b/west.yml index 7aedb6ef19634..f485e1437257c 100644 --- a/west.yml +++ b/west.yml @@ -226,7 +226,7 @@ manifest: - hal - name: hal_renesas path: modules/hal/renesas - revision: 740a944351300664ea17fb7913f0036a5263f008 + revision: pull/142/head groups: - hal - name: hal_rpi_pico