diff --git a/boards/pcbcupid/glyph_c6/Kconfig b/boards/pcbcupid/glyph_c6/Kconfig new file mode 100644 index 0000000000000..a8ba0530af476 --- /dev/null +++ b/boards/pcbcupid/glyph_c6/Kconfig @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 if BOARD_GLYPH_C6_ESP32C6_HPCORE + default 256 if BOARD_GLYPH_C6_ESP32C6_LPCORE diff --git a/boards/pcbcupid/glyph_c6/Kconfig.glyph_c6 b/boards/pcbcupid/glyph_c6/Kconfig.glyph_c6 new file mode 100644 index 0000000000000..fae3c84d3b53e --- /dev/null +++ b/boards/pcbcupid/glyph_c6/Kconfig.glyph_c6 @@ -0,0 +1,10 @@ +# glyph c6 board configuration + +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# Copyright (c) 2025 Muhammed Asif +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_GLYPH_C6 + select SOC_ESP32_C6_WROOM_1U_N4 + select SOC_ESP32C6_HPCORE if BOARD_GLYPH_C6_ESP32C6_HPCORE + select SOC_ESP32C6_LPCORE if BOARD_GLYPH_C6_ESP32C6_LPCORE diff --git a/boards/pcbcupid/glyph_c6/Kconfig.sysbuild b/boards/pcbcupid/glyph_c6/Kconfig.sysbuild new file mode 100644 index 0000000000000..3a2d17ac5cfd0 --- /dev/null +++ b/boards/pcbcupid/glyph_c6/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/pcbcupid/glyph_c6/board.cmake b/boards/pcbcupid/glyph_c6/board.cmake new file mode 100644 index 0000000000000..2f04d1fe8861e --- /dev/null +++ b/boards/pcbcupid/glyph_c6/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/pcbcupid/glyph_c6/board.yml b/boards/pcbcupid/glyph_c6/board.yml new file mode 100644 index 0000000000000..25c11091fb658 --- /dev/null +++ b/boards/pcbcupid/glyph_c6/board.yml @@ -0,0 +1,6 @@ +board: + name: glyph_c6 + full_name: Glyph-C6 + vendor: pcbcupid + socs: + - name: esp32c6 diff --git a/boards/pcbcupid/glyph_c6/doc/img/glyph_c6.webp b/boards/pcbcupid/glyph_c6/doc/img/glyph_c6.webp new file mode 100644 index 0000000000000..25bce09500391 Binary files /dev/null and b/boards/pcbcupid/glyph_c6/doc/img/glyph_c6.webp differ diff --git a/boards/pcbcupid/glyph_c6/doc/index.rst b/boards/pcbcupid/glyph_c6/doc/index.rst new file mode 100644 index 0000000000000..3fe1085f97a56 --- /dev/null +++ b/boards/pcbcupid/glyph_c6/doc/index.rst @@ -0,0 +1,156 @@ +.. zephyr:board:: glyph_c6 + +Overview +******** + +Glyph-C6 is powered by ESP32-C6 SoC. +It consists of a high-performance (HP) 32-bit RISC-V processor, which can be clocked up to 160 MHz, +and a low-power (LP) 32-bit RISC-V processor, which can be clocked up to 20 MHz. +It has a 512KB SRAM, and works with 4MB external SPI flash. +For more information, check `Glyph-C6`_. + +Hardware +******** + +ESP32-C6 is Espressif's first Wi-Fi 6 SoC integrating 2.4 GHz Wi-Fi 6, Bluetooth 5.3 (LE) and the +802.15.4 protocol. ESP32-C6 achieves an industry-leading RF performance, with reliable security +features and multiple memory resources for IoT products. +It consists of a high-performance (HP) 32-bit RISC-V processor, which can be clocked up to 160 MHz, +and a low-power (LP) 32-bit RISC-V processor, which can be clocked up to 20 MHz. +It has a 320KB ROM, a 512KB SRAM, and works with external flash. + +Most of the I/O pins are broken out to the pin headers on both sides for easy interfacing. +Developers can either connect peripherals with jumper wires or mount glyph c6 on +a breadboard. + +ESP32-C6 includes the following features: + +- 32-bit core RISC-V microcontroller with a clock speed of up to 160 MHz +- 400 KB of internal RAM +- WiFi 802.11 ax 2.4GHz +- Fully compatible with IEEE 802.11b/g/n protocol +- Bluetooth LE: Bluetooth 5.3 certified +- Internal co-existence mechanism between Wi-Fi and Bluetooth to share the same antenna +- IEEE 802.15.4 (Zigbee and Thread) + +Digital interfaces: + +- 30x GPIOs (QFN40), or 22x GPIOs (QFN32) +- 2x UART +- 1x Low-power (LP) UART +- 1x General purpose SPI +- 1x I2C +- 1x Low-power (LP) I2C +- 1x I2S +- 1x Pulse counter +- 1x USB Serial/JTAG controller +- 1x TWAI® controller, compatible with ISO 11898-1 (CAN Specification 2.0) +- 1x SDIO 2.0 slave controller +- LED PWM controller, up to 6 channels +- 1x Motor control PWM (MCPWM) +- 1x Remote control peripehral +- 1x Parallel IO interface (PARLIO) +- General DMA controller (GDMA), with 3 transmit channels and 3 receive channels +- Event task matrix (ETM) + +Analog interfaces: + +- 1x 12-bit SAR ADCs, up to 7 channels +- 1x temperature sensor + +Timers: + +- 1x 52-bit system timer +- 1x 54-bit general-purpose timers +- 3x Watchdog timers +- 1x Analog watchdog timer + +Low Power: + +- Four power modes designed for typical scenarios: Active, Modem-sleep, Light-sleep, Deep-sleep + +Security: + +- Secure boot +- Flash encryption +- 4-Kbit OTP, up to 1792 bits for users +- Cryptographic hardware acceleration: (AES-128/256, ECC, HMAC, RSA, SHA, Digital signature, Hash) +- Random number generator (RNG) + +Memory and Storage: + +- While the Glyph ESP32-C6 has 512KB onboard SRAM, it also relies on an external flash chip for program storage. + On this board, there is 4 MB of flash memory, which is shared between the code, file storage and OTA + +For more information, check the datasheet at `ESP32-C6 Datasheet`_ or the technical reference +manual at `ESP32-C6 Technical Reference Manual`_. + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +System Requirements +******************* + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Programming and Debugging +************************* + +.. zephyr:board-supported-runners:: + +.. include:: ../../../espressif/common/building-flashing.rst + :start-after: espressif-building-flashing + +.. include:: ../../../espressif/common/board-variants.rst + :start-after: espressif-board-variants + +Debugging +========= + +.. include:: ../../../espressif/common/openocd-debugging.rst + :start-after: espressif-openocd-debugging + +Low-Power CPU (LP CORE) +*********************** + +The ESP32-C6 SoC has two RISC-V cores: the High-Performance Core (HP CORE) and the Low-Power Core (LP CORE). +The LP Core features ultra low power consumption, an interrupt controller, a debug module and a system bus +interface for memory and peripheral access. + +The LP Core is in sleep mode by default. It has two application scenarios: + +- Power insensitive scenario: When the High-Performance CPU (HP Core) is active, the LP Core can assist the HP CPU with some speed and efficiency-insensitive controls and computations. +- Power sensitive scenario: When the HP CPU is in the power-down state to save power, the LP Core can be woken up to handle some external wake-up events. + +For more information, check the datasheet at `ESP32-C6 Datasheet`_ or the technical reference +manual at `ESP32-C6 Technical Reference Manual`_. + +The LP Core support is fully integrated with :ref:`sysbuild`. The user can enable the LP Core by adding +the following configuration to the project: + +.. code:: cfg + + CONFIG_ULP_COPROC_ENABLED=y + +See :zephyr:code-sample-category:`lp-core` folder as code reference. + +References +********** + +.. target-notes:: + +.. _`Glyph-C6`: https://learn.pcbcupid.com/boards/glyph-c6/overview +.. _`ESP32-C6 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-c6_datasheet_en.pdf +.. _`ESP32-C6 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32-c6_technical_reference_manual_en.pdf +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/pcbcupid/glyph_c6/glyph_c6-pinctrl.dtsi b/boards/pcbcupid/glyph_c6/glyph_c6-pinctrl.dtsi new file mode 100644 index 0000000000000..9f5d5efe7922c --- /dev/null +++ b/boards/pcbcupid/glyph_c6/glyph_c6-pinctrl.dtsi @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. + * Copyright (c) 2025 Muhammed Asif + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + + group2 { + pinmux = ; + bias-pull-up; + }; + }; +}; diff --git a/boards/pcbcupid/glyph_c6/glyph_c6_hpcore.dts b/boards/pcbcupid/glyph_c6/glyph_c6_hpcore.dts new file mode 100644 index 0000000000000..d3a7846ba95ec --- /dev/null +++ b/boards/pcbcupid/glyph_c6/glyph_c6_hpcore.dts @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. + * Copyright (c) 2025 Muhammed Asif + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "glyph_c6-pinctrl.dtsi" +#include +#include + +/ { + model = "PCB Cupid Glyph ESP32C6 HPCORE"; + compatible = "pcbcupid,glyph-c6"; + + chosen { + zephyr,sram = &sramhp; + zephyr,console = &usb_serial; + zephyr,shell-uart = &usb_serial; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + aliases { + led0 = &red_led; + sw0 = &button0; + }; + + leds: leds { + compatible = "gpio-leds"; + + red_led: led_0 { + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + label = "User LED0"; + }; + }; + + buttons { + compatible = "gpio-keys"; + + button0: button_0 { + gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Boot"; + zephyr,code = ; + }; + }; +}; + +&usb_serial { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; diff --git a/boards/pcbcupid/glyph_c6/glyph_c6_hpcore.yaml b/boards/pcbcupid/glyph_c6/glyph_c6_hpcore.yaml new file mode 100644 index 0000000000000..89cc0059faee6 --- /dev/null +++ b/boards/pcbcupid/glyph_c6/glyph_c6_hpcore.yaml @@ -0,0 +1,10 @@ +identifier: glyph_c6/esp32c6/hpcore +name: Glyph ESP32C6 HP Core +vendor: pcbcupid +type: mcu +arch: riscv +toolchain: + - zephyr +supported: + - gpio + - uart diff --git a/boards/pcbcupid/glyph_c6/glyph_c6_hpcore_defconfig b/boards/pcbcupid/glyph_c6/glyph_c6_hpcore_defconfig new file mode 100644 index 0000000000000..187793c76e8cc --- /dev/null +++ b/boards/pcbcupid/glyph_c6/glyph_c6_hpcore_defconfig @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y diff --git a/boards/pcbcupid/glyph_c6/glyph_c6_lpcore.dts b/boards/pcbcupid/glyph_c6/glyph_c6_lpcore.dts new file mode 100644 index 0000000000000..536c270d2de2a --- /dev/null +++ b/boards/pcbcupid/glyph_c6/glyph_c6_lpcore.dts @@ -0,0 +1,20 @@ +/* + * Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd. + * Copyright (c) 2025 Muhammed Asif + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include + +/ { + model = "PCB Cupid Glyph ESP32C6 LPCORE"; + compatible = "pcbcupid,glyph-c6"; + + chosen { + zephyr,sram = &sramlp; + zephyr,code-partition = &slot0_lpcore_partition; + }; +}; diff --git a/boards/pcbcupid/glyph_c6/glyph_c6_lpcore.yaml b/boards/pcbcupid/glyph_c6/glyph_c6_lpcore.yaml new file mode 100644 index 0000000000000..be801e630c4dc --- /dev/null +++ b/boards/pcbcupid/glyph_c6/glyph_c6_lpcore.yaml @@ -0,0 +1,17 @@ +identifier: glyph_c6/esp32c6/lpcore +name: Glyph ESP32C6 LP Core +type: mcu +arch: riscv +toolchain: + - zephyr +supported: + - cpu +testing: + only_tags: + - introduction + ignore_tags: + - kernel + - posix + - chre + - cpp +vendor: pcbcupid diff --git a/boards/pcbcupid/glyph_c6/glyph_c6_lpcore_defconfig b/boards/pcbcupid/glyph_c6/glyph_c6_lpcore_defconfig new file mode 100644 index 0000000000000..04974098f6ce6 --- /dev/null +++ b/boards/pcbcupid/glyph_c6/glyph_c6_lpcore_defconfig @@ -0,0 +1,20 @@ +# Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +# Memory protection +CONFIG_THREAD_STACK_INFO=n +CONFIG_THREAD_CUSTOM_DATA=n + +# Boot +CONFIG_BOOT_BANNER=n + +# Console +CONFIG_SERIAL=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_PRINTK=n +CONFIG_CBPRINTF_NANO=y + +# Build +CONFIG_SIZE_OPTIMIZATIONS=y +CONFIG_BUSYWAIT_CPU_LOOPS_PER_USEC=4 diff --git a/boards/pcbcupid/glyph_c6/support/openocd.cfg b/boards/pcbcupid/glyph_c6/support/openocd.cfg new file mode 100644 index 0000000000000..d86a5517a4ca9 --- /dev/null +++ b/boards/pcbcupid/glyph_c6/support/openocd.cfg @@ -0,0 +1,4 @@ +# ESP32C6 has built-in JTAG interface over USB port in pins GPIO13/GPIO12 (D-/D+). +set ESP_RTOS none + +source [find board/esp32c6-builtin.cfg] diff --git a/boards/pcbcupid/index.rst b/boards/pcbcupid/index.rst new file mode 100644 index 0000000000000..ea6d93a43acb3 --- /dev/null +++ b/boards/pcbcupid/index.rst @@ -0,0 +1,10 @@ +.. _boards-pcbcupid: + +PCB Cupid +######### + +.. toctree:: + :maxdepth: 1 + :glob: + + **/* diff --git a/dts/bindings/vendor-prefixes.txt b/dts/bindings/vendor-prefixes.txt index 21fe4c83139d9..562d5e99020e2 100644 --- a/dts/bindings/vendor-prefixes.txt +++ b/dts/bindings/vendor-prefixes.txt @@ -516,6 +516,7 @@ panasonic Panasonic Corporation parade Parade Technologies Inc. parallax Parallax Inc. particle Particle.io +pcbcupid PCB Cupid pda Precision Design Associates, Inc. peacefair Ningbo Peacefair Electronic Technology Co., Ltd peregrine Peregrine Consultoria e Servicos