diff --git a/boards/nxp/mimxrt595_evk/mimxrt595_evk_mimxrt595s_cm33.dts b/boards/nxp/mimxrt595_evk/mimxrt595_evk_mimxrt595s_cm33.dts index 463e6729ade62..f92a4f529b758 100644 --- a/boards/nxp/mimxrt595_evk/mimxrt595_evk_mimxrt595s_cm33.dts +++ b/boards/nxp/mimxrt595_evk/mimxrt595_evk_mimxrt595s_cm33.dts @@ -400,7 +400,7 @@ zephyr_udc0: &usbhs { /* MX25UM51245G is 64MB, 512MBit flash part */ size = ; reg = <0>; - spi-max-frequency = ; + spi-max-frequency = ; status = "okay"; jedec-id = [c2 81 3a]; erase-block-size = ; diff --git a/boards/nxp/mimxrt685_evk/mimxrt685_evk_mimxrt685s_cm33.dts b/boards/nxp/mimxrt685_evk/mimxrt685_evk_mimxrt685s_cm33.dts index 267691eaea7bb..c6399ba494a00 100644 --- a/boards/nxp/mimxrt685_evk/mimxrt685_evk_mimxrt685s_cm33.dts +++ b/boards/nxp/mimxrt685_evk/mimxrt685_evk_mimxrt685s_cm33.dts @@ -265,7 +265,7 @@ i2s1: &flexcomm3 { /* MX25UM51245G is 64MB, 512MBit flash part */ size = ; reg = <2>; - spi-max-frequency = ; + spi-max-frequency = ; status = "okay"; jedec-id = [c2 81 3a]; erase-block-size = ; diff --git a/boards/nxp/vmu_rt1170/vmu_rt1170.dtsi b/boards/nxp/vmu_rt1170/vmu_rt1170.dtsi index 900f46e955868..a18e6003c996b 100644 --- a/boards/nxp/vmu_rt1170/vmu_rt1170.dtsi +++ b/boards/nxp/vmu_rt1170/vmu_rt1170.dtsi @@ -205,7 +205,7 @@ /* MX25UM51245G is 64MB, 512MBit flash part */ size = ; reg = <0>; - spi-max-frequency = ; + spi-max-frequency = ; status = "okay"; jedec-id = [c2 81 3a]; erase-block-size = ; diff --git a/drivers/flash/flash_mcux_flexspi_mx25um51345g.c b/drivers/flash/flash_mcux_flexspi_mx25um51345g.c index d017c8778b596..fc712f12489a9 100644 --- a/drivers/flash/flash_mcux_flexspi_mx25um51345g.c +++ b/drivers/flash/flash_mcux_flexspi_mx25um51345g.c @@ -105,6 +105,7 @@ static const uint32_t flash_flexspi_nor_lut[][4] = { FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_SDR, kFLEXSPI_8PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0x0), }, + [WRITE_ENABLE_OPI] = { FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_8PAD, 0x06, kFLEXSPI_Command_SDR, kFLEXSPI_8PAD, 0xF9), @@ -142,7 +143,9 @@ static const uint32_t flash_flexspi_nor_lut[][4] = { FLEXSPI_LUT_SEQ(kFLEXSPI_Command_DDR, kFLEXSPI_8PAD, 0x05, kFLEXSPI_Command_DDR, kFLEXSPI_8PAD, 0xFA), FLEXSPI_LUT_SEQ(kFLEXSPI_Command_RADDR_DDR, kFLEXSPI_8PAD, 0x20, - kFLEXSPI_Command_READ_DDR, kFLEXSPI_8PAD, 0x4), + kFLEXSPI_Command_DUMMY_DDR, kFLEXSPI_8PAD, 0x28), + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_DDR, kFLEXSPI_8PAD, 0x4, + kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0x0), }, [WRITE_ENABLE_OPI] = { @@ -159,14 +162,14 @@ static const uint32_t flash_flexspi_nor_lut[][4] = { [ERASE_CHIP] = { FLEXSPI_LUT_SEQ(kFLEXSPI_Command_DDR, kFLEXSPI_8PAD, 0x60, - kFLEXSPI_Command_SDR, kFLEXSPI_8PAD, 0x9F), + kFLEXSPI_Command_DDR, kFLEXSPI_8PAD, 0x9F), }, [READ] = { FLEXSPI_LUT_SEQ(kFLEXSPI_Command_DDR, kFLEXSPI_8PAD, 0xEE, kFLEXSPI_Command_DDR, kFLEXSPI_8PAD, 0x11), FLEXSPI_LUT_SEQ(kFLEXSPI_Command_RADDR_DDR, kFLEXSPI_8PAD, 0x20, - kFLEXSPI_Command_DUMMY_DDR, kFLEXSPI_8PAD, 0x08), + kFLEXSPI_Command_DUMMY_DDR, kFLEXSPI_8PAD, 0x28), FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_DDR, kFLEXSPI_8PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0x0), }, @@ -597,7 +600,8 @@ static DEVICE_API(flash, flash_flexspi_nor_api) = { #define FLASH_FLEXSPI_DEVICE_CONFIG(n) \ { \ - .flexspiRootClk = MHZ(120), \ + .flexspiRootClk = \ + DT_INST_PROP_OR(n, spi_max_frequency, MHZ(200)),\ .flashSize = DT_INST_PROP(n, size) / 8 / KB(1), \ .CSIntervalUnit = \ CS_INTERVAL_UNIT( \