diff --git a/drivers/i2s/i2s_stm32_sai.c b/drivers/i2s/i2s_stm32_sai.c
index 9a5ee27d10d3b..917a0971fa489 100644
--- a/drivers/i2s/i2s_stm32_sai.c
+++ b/drivers/i2s/i2s_stm32_sai.c
@@ -283,7 +283,7 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
 	}
 
 	hdma->Instance = STM32_DMA_GET_INSTANCE(stream->reg, stream->dma_channel);
-#if defined(CONFIG_SOC_SERIES_STM32F4X)
+#if defined(CONFIG_SOC_SERIES_STM32F4X) || defined(CONFIG_SOC_SERIES_STM32F7X)
 	hdma->Init.Channel = dma_cfg.dma_slot * DMA_CHANNEL_1;
 #else
 	hdma->Init.Request = dma_cfg.dma_slot;
@@ -292,7 +292,7 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
 
 #if defined(CONFIG_SOC_SERIES_STM32H7X) || defined(CONFIG_SOC_SERIES_STM32L4X) ||                  \
 	defined(CONFIG_SOC_SERIES_STM32G4X) || defined(CONFIG_SOC_SERIES_STM32L5X) ||              \
-	defined(CONFIG_SOC_SERIES_STM32F4X)
+	defined(CONFIG_SOC_SERIES_STM32F4X) || defined(CONFIG_SOC_SERIES_STM32F7X)
 
 	hdma->Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
 	hdma->Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
@@ -310,7 +310,8 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
 	hdma->Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
 #endif
 
-#if defined(CONFIG_SOC_SERIES_STM32H7X) || defined(CONFIG_SOC_SERIES_STM32F4X)
+#if defined(CONFIG_SOC_SERIES_STM32H7X) || defined(CONFIG_SOC_SERIES_STM32F4X) ||                  \
+	defined(CONFIG_SOC_SERIES_STM32F7X)
 	hdma->Init.FIFOMode = DMA_FIFOMODE_DISABLE;
 #endif
 
@@ -319,7 +320,7 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
 
 #if !defined(CONFIG_SOC_SERIES_STM32H7X) && !defined(CONFIG_SOC_SERIES_STM32L4X) &&                \
 	!defined(CONFIG_SOC_SERIES_STM32G4X) && !defined(CONFIG_SOC_SERIES_STM32L5X) &&            \
-	!defined(CONFIG_SOC_SERIES_STM32F4X)
+	!defined(CONFIG_SOC_SERIES_STM32F4X) && !defined(CONFIG_SOC_SERIES_STM32F7X)
 		hdma->Init.SrcInc = DMA_SINC_INCREMENTED;
 		hdma->Init.DestInc = DMA_DINC_FIXED;
 #endif
@@ -330,7 +331,7 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
 
 #if !defined(CONFIG_SOC_SERIES_STM32H7X) && !defined(CONFIG_SOC_SERIES_STM32L4X) &&                \
 	!defined(CONFIG_SOC_SERIES_STM32G4X) && !defined(CONFIG_SOC_SERIES_STM32L5X) &&            \
-	!defined(CONFIG_SOC_SERIES_STM32F4X)
+	!defined(CONFIG_SOC_SERIES_STM32F4X) && !defined(CONFIG_SOC_SERIES_STM32F7X)
 		hdma->Init.SrcInc = DMA_SINC_FIXED;
 		hdma->Init.DestInc = DMA_DINC_INCREMENTED;
 #endif
@@ -351,7 +352,7 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
 	}
 #elif !defined(CONFIG_SOC_SERIES_STM32H7X) && !defined(CONFIG_SOC_SERIES_STM32L4X) &&              \
 	!defined(CONFIG_SOC_SERIES_STM32G4X) && !defined(CONFIG_SOC_SERIES_STM32L5X) &&            \
-	!defined(CONFIG_SOC_SERIES_STM32F4X)
+	!defined(CONFIG_SOC_SERIES_STM32F4X) && !defined(CONFIG_SOC_SERIES_STM32F7X)
 	if (HAL_DMA_ConfigChannelAttributes(&dev_data->hdma, DMA_CHANNEL_NPRIV) != HAL_OK) {
 		LOG_ERR("HAL_DMA_ConfigChannelAttributes: <Failed>");
 		return -EIO;
@@ -466,8 +467,9 @@ static int i2s_stm32_sai_configure(const struct device *dev, enum i2s_dir dir,
 		return -EINVAL;
 	}
 
-	/* Control of MCLK output from SAI configuration is not possible on STM32L4xx MCUs */
-#if !defined(CONFIG_SOC_SERIES_STM32L4X) && !defined(CONFIG_SOC_SERIES_STM32F4X)
+	/* Control of MCLK output from SAI configuration is not possible on STM32L4/F4/F7xx MCUs */
+#if !defined(CONFIG_SOC_SERIES_STM32L4X) && !defined(CONFIG_SOC_SERIES_STM32F4X) &&                \
+	!defined(CONFIG_SOC_SERIES_STM32F7X)
 	if (cfg->mclk_enable && stream->master) {
 		hsai->Init.MckOutput = SAI_MCK_OUTPUT_ENABLE;
 	} else {
@@ -481,7 +483,9 @@ static int i2s_stm32_sai_configure(const struct device *dev, enum i2s_dir dir,
 		hsai->Init.NoDivider = SAI_MASTERDIVIDER_ENABLE;
 
 		/* MckOverSampling is not supported by all STM32L4xx MCUs */
-#if !defined(CONFIG_SOC_SERIES_STM32L4X) && !defined(CONFIG_SOC_SERIES_STM32F4X)
+		/* MckOverSampling is not supported by STM32F4/F7xx MCUs */
+#if !defined(CONFIG_SOC_SERIES_STM32L4X) && !defined(CONFIG_SOC_SERIES_STM32F4X) &&                \
+	!defined(CONFIG_SOC_SERIES_STM32F7X)
 		if (cfg->mclk_div == (enum mclk_divider)MCLK_DIV_256) {
 			hsai->Init.MckOverSampling = SAI_MCK_OVERSAMPLING_DISABLE;
 		} else {
diff --git a/dts/arm/st/f7/stm32f7.dtsi b/dts/arm/st/f7/stm32f7.dtsi
index b203b93271127..52e99fe3e3cb5 100644
--- a/dts/arm/st/f7/stm32f7.dtsi
+++ b/dts/arm/st/f7/stm32f7.dtsi
@@ -2,6 +2,7 @@
  * Copyright (c) 2018 Yurii Hamann
  * Copyright (c) 2019 Centaur Analytics, Inc
  * Copyright (c) 2024 STMicroelectronics
+ * Copyright (c) 2025 Mario Paja
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -986,6 +987,28 @@
 		i2c = <&i2c3>;
 		status = "disabled";
 	};
+
+	sai1_a: sai1@40015804 {
+		compatible = "st,stm32-sai";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x40015804 0x20>;
+		clocks = <&rcc STM32_CLOCK(APB2, 22)>;
+		dmas = <&dma2 1 0 (STM32_DMA_MODE_NORMAL | STM32_DMA_PRIORITY_HIGH |
+				   STM32_DMA_16BITS) 0>;
+		status = "disabled";
+	};
+
+	sai1_b: sai1@40015824 {
+		compatible = "st,stm32-sai";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x40015824 0x20>;
+		clocks = <&rcc STM32_CLOCK(APB2, 22)>;
+		dmas = <&dma2 5 0 (STM32_DMA_MODE_NORMAL | STM32_DMA_PRIORITY_HIGH |
+				   STM32_DMA_16BITS) 0>;
+		status = "disabled";
+	};
 };
 
 &nvic {
diff --git a/samples/drivers/i2s/output/boards/nucleo_f767zi.conf b/samples/drivers/i2s/output/boards/nucleo_f767zi.conf
new file mode 100644
index 0000000000000..4f3f73a1e06a5
--- /dev/null
+++ b/samples/drivers/i2s/output/boards/nucleo_f767zi.conf
@@ -0,0 +1 @@
+CONFIG_HEAP_MEM_POOL_SIZE=4192
diff --git a/samples/drivers/i2s/output/boards/nucleo_f767zi.overlay b/samples/drivers/i2s/output/boards/nucleo_f767zi.overlay
new file mode 100644
index 0000000000000..26c88d95f3948
--- /dev/null
+++ b/samples/drivers/i2s/output/boards/nucleo_f767zi.overlay
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2025 Mario Paja
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	aliases {
+		i2s-tx = &sai1_b;
+	};
+};
+
+/* 44.27KHz (0.38% Error) */
+&pllsai{
+	div-m = <4>;
+	mul-n = <119>;
+	div-p = <2>;
+	div-q = <7>;
+	div-r = <2>;
+	div-divq = <3>;
+	div-divr = <2>;
+};
+
+&sai1_b {
+	pinctrl-0 = <&sai1_mclk_b_pf7 &sai1_sd_b_pe3 &sai1_fs_b_pf9 &sai1_sck_b_pf8>;
+	pinctrl-names = "default";
+	status = "okay";
+	mclk-enable;
+	mclk-divider = "div-256";
+	dma-names = "tx";
+};
+
+&dma2 {
+	status = "okay";
+};