From 055678e4f3e296b02754dcedeb3887803aadff2a Mon Sep 17 00:00:00 2001 From: Mathieu Choplain Date: Fri, 17 Oct 2025 13:18:37 +0200 Subject: [PATCH] drivers: usb: udc: stm32: fix FS mode on OTG_FS for STM32F4 series On most parts of the STM32F4 series, when the OTG_HS controller is used in FS mode, the ULIP **low-power** clock must also be disabled for proper operation. This was done properly in an old version of the driver but was lost as part of refactoring[1]. Re-introduce ULPI low-power clock disable when OTG_HS is used in FS mode. [1] See commit e31ddec7812b68c11bd4490884e3e98b55c57469 Signed-off-by: Mathieu Choplain --- drivers/usb/udc/udc_stm32.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/usb/udc/udc_stm32.c b/drivers/usb/udc/udc_stm32.c index 4d51730e29f26..bea6e6c5b32d8 100644 --- a/drivers/usb/udc/udc_stm32.c +++ b/drivers/usb/udc/udc_stm32.c @@ -1282,6 +1282,13 @@ static int priv_clock_enable(void) #else /* CONFIG_SOC_SERIES_STM32F2X || CONFIG_SOC_SERIES_STM32F4X */ if (UDC_STM32_NODE_PHY_ITFACE(DT_DRV_INST(0)) == PCD_PHY_ULPI) { LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_OTGHSULPI); + } else if (UDC_STM32_NODE_SPEED(DT_DRV_INST(0)) == PCD_SPEED_HIGH_IN_FULL) { + /* + * Some parts of the STM32F4 series require the OTGHSULPILPEN to be + * cleared if the OTG_HS is used in FS mode. Disable it on all parts + * since it has no nefarious effect if performed when not required. + */ + LL_AHB1_GRP1_DisableClockLowPower(LL_AHB1_GRP1_PERIPH_OTGHSULPI); } #endif /* CONFIG_SOC_SERIES_* */ #elif defined(CONFIG_SOC_SERIES_STM32H7X) && DT_HAS_COMPAT_STATUS_OKAY(st_stm32_otgfs)