diff --git a/boards/ti/lp_mspm0g5187/Kconfig.lp_mspm0g5187 b/boards/ti/lp_mspm0g5187/Kconfig.lp_mspm0g5187
new file mode 100644
index 0000000000000..dae872af95e37
--- /dev/null
+++ b/boards/ti/lp_mspm0g5187/Kconfig.lp_mspm0g5187
@@ -0,0 +1,5 @@
+# Copyright (c) 2025 Texas Instruments
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_LP_MSPM0G5187
+	select SOC_MSPM0G5187
\ No newline at end of file
diff --git a/boards/ti/lp_mspm0g5187/board.cmake b/boards/ti/lp_mspm0g5187/board.cmake
new file mode 100644
index 0000000000000..b770be4db3644
--- /dev/null
+++ b/boards/ti/lp_mspm0g5187/board.cmake
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=MSPM0G5187" "--speed=4000")
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
diff --git a/boards/ti/lp_mspm0g5187/board.yml b/boards/ti/lp_mspm0g5187/board.yml
new file mode 100644
index 0000000000000..6ad6c936bcd3a
--- /dev/null
+++ b/boards/ti/lp_mspm0g5187/board.yml
@@ -0,0 +1,6 @@
+board:
+  name: lp_mspm0g5187
+  full_name: MSPM0G5187 Launchpad
+  vendor: ti
+  socs:
+    - name: mspm0g5187
diff --git a/boards/ti/lp_mspm0g5187/doc/index.rst b/boards/ti/lp_mspm0g5187/doc/index.rst
new file mode 100644
index 0000000000000..9f3984a64a42e
--- /dev/null
+++ b/boards/ti/lp_mspm0g5187/doc/index.rst
@@ -0,0 +1,140 @@
+.. zephyr:board:: lp_mspm0g5187
+
+Overview
+********
+
+MSPM0G511x microcontrollers (MCUs) are part of the MSP highly integrated, ultra-low-power 32-bit MCU
+family based on the enhanced Arm® Cortex®-M0+ 32-bit core platform, operating at up to 80-MHz frequency.
+These MCUs offer a blend of cost optimization and design flexibility for applications requiring 32KB to 128KB
+of flash memory in small packages (down to 4 mm x 4 mm) or high pin count packages (up to 64 pins).
+These devices include USB 2.0-FS interface, digital audio interface, cybersecurity enablers, high performance
+integrated analog, and provide excellent low power performance across the operating temperature range.
+
+Hardware
+********
+
+The MSPM0G51xx devices provide up to 128KB embedded flash program memory with built-in error correction
+code (ECC) and up to 32KB SRAM with a hardware parity option. These MCUs also incorporate a
+memory protection unit, 12-channel DMA, and a variety of peripherals including
+
+* Analog.
+
+  * One 12-bit 4-Msps ADCs.
+
+  * Configurable internal shared voltage reference.
+
+  * One high speed comparator with built-in reference DAC.
+
+* Digital.
+
+  * Two 16-bit advanced control timers.
+
+  * Four general-purpose timers.
+
+    * Two 16-bit general-purpose timers.
+
+    * One 16-bit general-purpose timer with low-power operation in STANDBY mode.
+
+    * One 16-bit timer with deadband support and up to 8 PWM Channels.
+
+  * One basic software timer including 4 indenpendent configurable 16-bit counters.
+
+  * Two windowed-watchdog timers.
+
+  * One RTC with alarm and calendar modes.
+
+* Data Integrity and Encryption.
+
+  * One AES HW accelerator capable of CTR and CBC modes.
+
+  * One Cyclic Redundancy Check (CRC) accelerator.
+
+* Communication.
+
+  * Two configurable serial interfaces (UNICOMM) supporting UART or I2C.
+
+  * One configurable serial interface supporting UART or SPI.
+
+  * One dedicated SPI interface up to 32 Mbits/s.
+
+  * One digital audio interface (I2S) supporting controller and target mode.
+
+  * One USB2.0 interface with full-speed (12-Mbps) compliant device and host mode.
+
+Zephyr uses the ``lp_mspm0g5187`` board for building LP_MSPM0G5187
+
+Features
+********
+
+- Onboard XDS110 debug probe
+- EnergyTrace technology available for ultra-low-power debugging
+- 3 buttons, 1 LED and 1 RGB LED for user interaction
+- One microSD slot
+- One microphone
+- One I2S based audio ADC
+
+Details on the MSPM0G5187 LaunchPad can be found on the `TI LP_MSPM0G5187 Product Page`_.
+
+Supported Features
+==================
+
+.. zephyr:board-supported-hw::
+
+Building and Flashing
+*********************
+
+Building
+========
+
+Follow the :ref:`getting_started` instructions for Zephyr application development.
+
+For example, to build the blinky application for the MSPM0G5187 LaunchPad:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: lp_mspm0g5187
+   :goals: build
+
+The resulting ``zephyr.bin`` binary in the build directory can be flashed onto
+MSPM0G5187 LaunchPad using the steps mentioned below.
+
+Flashing
+========
+
+OpenOCD can be used to program the flash memory on the devices.
+
+.. code-block:: console
+
+   $ west flash --openocd <path to cloned dir>/src/openocd --openocd-search <path to cloned dir>/tcl
+
+Flashing can also be done using JLINK.
+
+.. code-block:: console
+
+   $ west flash --runner jlink
+
+Debugging
+=========
+
+You can debug an application in the usual way. Here is an example for the
+:zephyr:code-sample:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: lp_mspm0g5187
+   :goals: debug
+
+References
+**********
+
+- `TI MSPM0 MCU Page`_
+- `MSPM0G5187 TRM`_
+
+.. _TI MSPM0 MCU Page:
+   https://www.ti.com/microcontrollers-mcus-processors/arm-based-microcontrollers/arm-cortex-m0-mcus/overview.html
+
+.. _MSPM0G5187 TRM:
+   https://www.ti.com/lit/slau846
+
+.. _TI LP_MSPM0G5187 Product Page:
+   https://www.ti.com/tool/LP-MSPM0G5187
diff --git a/boards/ti/lp_mspm0g5187/doc/lp_mspm0g5187.webp b/boards/ti/lp_mspm0g5187/doc/lp_mspm0g5187.webp
new file mode 100644
index 0000000000000..53c2cb816405b
Binary files /dev/null and b/boards/ti/lp_mspm0g5187/doc/lp_mspm0g5187.webp differ
diff --git a/boards/ti/lp_mspm0g5187/lp_mspm0g5187.dts b/boards/ti/lp_mspm0g5187/lp_mspm0g5187.dts
new file mode 100644
index 0000000000000..ae5d207cd42ee
--- /dev/null
+++ b/boards/ti/lp_mspm0g5187/lp_mspm0g5187.dts
@@ -0,0 +1,133 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/dts-v1/;
+
+#include <ti/mspm0/g/mspm0g5187.dtsi>
+#include <ti/mspm0/g/mspm0g51xx-pinctrl.dtsi>
+#include <zephyr/dt-bindings/clock/mspm0_clock.h>
+#include <zephyr/dt-bindings/gpio/gpio.h>
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+
+/ {
+	model = "TI LP_MSPM0G5117";
+	compatible = "ti,mspm0g5117";
+
+	aliases {
+		led0 = &led0;
+		led1 = &led1;
+		sw0 = &btn0;
+		sw1 = &btn1;
+		uart0 = &unicomm0_uart;
+	};
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,console = &unicomm0_uart;
+		zephyr,shell-uart = &unicomm0_uart;
+		zephyr,code-partition = &slot0_partition;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		led0: led_0 {
+			gpios = <&gpiob 13 GPIO_ACTIVE_HIGH>;
+			label = "Blue LED";
+		};
+		led1: led_1 {
+			gpios = <&gpioa 17 GPIO_ACTIVE_HIGH>;
+			label = "Red LED";
+		};
+		led2: led_2 {
+			gpios = <&gpioa 24 GPIO_ACTIVE_HIGH>;
+			label = "Green LED";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+		btn0: btn_0 {
+			gpios = <&gpiob 21 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+			label = "Switch 3";
+			zephyr,code = <INPUT_KEY_0>;
+		};
+		btn1: btn_1 {
+			gpios = <&gpioa 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+			label = "Switch 2";
+			zephyr,code = <INPUT_KEY_1>;
+		};
+	};
+};
+
+&cpu0 {
+	clock-frequency = <DT_FREQ_M(80)>;
+};
+
+&ulpclk {
+	clock-frequency = <DT_FREQ_M(40)>;
+	clk-div = <2>;
+};
+
+&mclk {
+	clock-frequency = <DT_FREQ_M(80)>;
+	clocks = <&hsclk 0>;
+};
+
+&hsclk {
+	clocks = <&syspll2x 0>;
+	status = "okay";
+};
+
+&syspll2x {
+	status = "okay";
+};
+
+&flash0 {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x00000000 0x8000>;
+		};
+
+		slot0_partition: partition@8000 {
+			label = "image-0";
+			reg = <0x00008000 0x8000>;
+		};
+
+		slot1_partition: partition@10000 {
+			label = "image-1";
+			reg = <0x00010000 0x8000>;
+		};
+
+		storage_partition: partition@18000 {
+			label = "storage";
+			reg = <0x00018000 0x8000>;
+		};
+	};
+};
+
+&pinctrl {
+	status = "okay";
+};
+
+&gpioa {
+	status = "okay";
+};
+
+&gpiob {
+	status = "okay";
+};
+
+&unicomm0_uart {
+	compatible = "ti,mspm0-uart";
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uc0_tx_pa10 &uc0_rx_pa11>;
+	pinctrl-names = "default";
+};
diff --git a/boards/ti/lp_mspm0g5187/lp_mspm0g5187.yaml b/boards/ti/lp_mspm0g5187/lp_mspm0g5187.yaml
new file mode 100644
index 0000000000000..5397764bd47dd
--- /dev/null
+++ b/boards/ti/lp_mspm0g5187/lp_mspm0g5187.yaml
@@ -0,0 +1,14 @@
+identifier: lp_mspm0g5187
+name: TI MSPM0G5187 Launchpad
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+ram: 32
+flash: 128
+supported:
+  - uart
+  - gpio
+vendor: ti
\ No newline at end of file
diff --git a/boards/ti/lp_mspm0g5187/lp_mspm0g5187_defconfig b/boards/ti/lp_mspm0g5187/lp_mspm0g5187_defconfig
new file mode 100644
index 0000000000000..b916bd908277d
--- /dev/null
+++ b/boards/ti/lp_mspm0g5187/lp_mspm0g5187_defconfig
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: Apache-2.0
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+CONFIG_CLOCK_CONTROL=y
diff --git a/boards/ti/lp_mspm0g5187/support/openocd.cfg b/boards/ti/lp_mspm0g5187/support/openocd.cfg
new file mode 100644
index 0000000000000..119c66277f873
--- /dev/null
+++ b/boards/ti/lp_mspm0g5187/support/openocd.cfg
@@ -0,0 +1,4 @@
+source [find interface/xds110.cfg]
+adapter speed 10000
+
+source [find target/ti_mspm0.cfg]
\ No newline at end of file
diff --git a/drivers/gpio/gpio_mspm0.c b/drivers/gpio/gpio_mspm0.c
index 7ac165aaf73fe..6fe56007dadfc 100644
--- a/drivers/gpio/gpio_mspm0.c
+++ b/drivers/gpio/gpio_mspm0.c
@@ -39,6 +39,17 @@ struct gpio_mspm0_data {
 #if CONFIG_SOC_SERIES_MSPM0G
 #define NUM_GPIOA_PIN 32
 #define gpioa_pins    NUM_GPIOA_PIN
+#if CONFIG_SOC_MSPM0G5187
+static uint8_t gpioa_pincm_lut[NUM_GPIOA_PIN] = {
+	IOMUX_PINCM1,  IOMUX_PINCM2, IOMUX_PINCM3,  IOMUX_PINCM4,
+	IOMUX_PINCM5, IOMUX_PINCM6, IOMUX_PINCM7,  IOMUX_PINCM8,  IOMUX_PINCM9,
+	IOMUX_PINCM10, IOMUX_PINCM11, IOMUX_PINCM14, IOMUX_PINCM19, IOMUX_PINCM20,
+	IOMUX_PINCM21, IOMUX_PINCM22, IOMUX_PINCM34, IOMUX_PINCM35, IOMUX_PINCM36,
+	IOMUX_PINCM37, IOMUX_PINCM38, IOMUX_PINCM39, IOMUX_PINCM40, IOMUX_PINCM41,
+	IOMUX_PINCM42, IOMUX_PINCM46, IOMUX_PINCM47, IOMUX_PINCM53, IOMUX_PINCM54,
+	IOMUX_PINCM55, IOMUX_PINCM58, IOMUX_PINCM59
+};
+#else
 static uint8_t gpioa_pincm_lut[NUM_GPIOA_PIN] = {
 	IOMUX_PINCM1,  IOMUX_PINCM2,  IOMUX_PINCM7,  IOMUX_PINCM8,  IOMUX_PINCM9,  IOMUX_PINCM10,
 	IOMUX_PINCM11, IOMUX_PINCM14, IOMUX_PINCM19, IOMUX_PINCM20, IOMUX_PINCM21, IOMUX_PINCM22,
@@ -47,6 +58,7 @@ static uint8_t gpioa_pincm_lut[NUM_GPIOA_PIN] = {
 	IOMUX_PINCM54, IOMUX_PINCM55, IOMUX_PINCM59, IOMUX_PINCM60, IOMUX_PINCM3,  IOMUX_PINCM4,
 	IOMUX_PINCM5,  IOMUX_PINCM6,
 };
+#endif
 #elif CONFIG_SOC_SERIES_MSPM0L /* if CONFIG_SOC_SERIES_MSPM0L */
 #define GPIOA_NODE DT_NODELABEL(gpioa)
 #define NUM_GPIOA_PIN 31
@@ -69,6 +81,16 @@ static uint8_t gpioa_pincm_lut[NUM_GPIOA_PIN] = {
 #ifdef CONFIG_SOC_SERIES_MSPM0G
 #define NUM_GPIOB_PIN 28
 #define gpiob_pins    NUM_GPIOB_PIN
+#if CONFIG_SOC_MSPM0G5187
+static uint8_t gpiob_pincm_lut[NUM_GPIOB_PIN] = {
+	IOMUX_PINCM12, IOMUX_PINCM13, IOMUX_PINCM15, IOMUX_PINCM16, IOMUX_PINCM17,
+	IOMUX_PINCM18, IOMUX_PINCM23, IOMUX_PINCM24, IOMUX_PINCM25, IOMUX_PINCM26,
+	IOMUX_PINCM27, IOMUX_PINCM28, IOMUX_PINCM29, IOMUX_PINCM30, IOMUX_PINCM31,
+	IOMUX_PINCM32, IOMUX_PINCM33, IOMUX_PINCM43, IOMUX_PINCM44, IOMUX_PINCM45,
+	IOMUX_PINCM48, IOMUX_PINCM49, IOMUX_PINCM50, IOMUX_PINCM51, IOMUX_PINCM52,
+	IOMUX_PINCM56
+};
+#else
 static uint8_t gpiob_pincm_lut[NUM_GPIOB_PIN] = {
 	IOMUX_PINCM12, IOMUX_PINCM13, IOMUX_PINCM15, IOMUX_PINCM16, IOMUX_PINCM17, IOMUX_PINCM18,
 	IOMUX_PINCM23, IOMUX_PINCM24, IOMUX_PINCM25, IOMUX_PINCM26, IOMUX_PINCM27, IOMUX_PINCM28,
@@ -76,6 +98,7 @@ static uint8_t gpiob_pincm_lut[NUM_GPIOB_PIN] = {
 	IOMUX_PINCM44, IOMUX_PINCM45, IOMUX_PINCM48, IOMUX_PINCM49, IOMUX_PINCM50, IOMUX_PINCM51,
 	IOMUX_PINCM52, IOMUX_PINCM56, IOMUX_PINCM57, IOMUX_PINCM58,
 };
+#endif
 #elif CONFIG_SOC_SERIES_MSPM0L /* if CONFIG_SOC_SERIES_MSPM0L */
 #define GPIOB_NODE DT_NODELABEL(gpiob)
 #define NUM_GPIOB_PIN 32
diff --git a/drivers/serial/Kconfig.mspm0 b/drivers/serial/Kconfig.mspm0
index e02d3b5ee0b26..d0c3a3b6694e5 100644
--- a/drivers/serial/Kconfig.mspm0
+++ b/drivers/serial/Kconfig.mspm0
@@ -8,7 +8,8 @@ config UART_MSPM0
 	depends on DT_HAS_TI_MSPM0_UART_ENABLED
 	select SERIAL_HAS_DRIVER
 	select SERIAL_SUPPORT_INTERRUPT
-	select USE_MSPM0_DL_UART
+	select USE_MSPM0_DL_UNICOMM_UART if (HAS_MSP_UNICOMM)
+	select USE_MSPM0_DL_UART if !(HAS_MSP_UNICOMM)
 	select PINCTRL
 	help
 	  This option enables the TI MSPM0 UART driver.
diff --git a/drivers/serial/uart_mspm0.c b/drivers/serial/uart_mspm0.c
index a9751532dbbd8..2fb29b18ef5ad 100644
--- a/drivers/serial/uart_mspm0.c
+++ b/drivers/serial/uart_mspm0.c
@@ -17,10 +17,18 @@
 #include <zephyr/irq.h>
 
 /* Driverlib includes */
+#ifdef CONFIG_HAS_MSP_UNICOMM
+#include <ti/driverlib/dl_unicommuart.h>
+#else
 #include <ti/driverlib/dl_uart_main.h>
+#endif
 
 struct uart_mspm0_config {
+#ifdef CONFIG_HAS_MSP_UNICOMM
+	UNICOMM_Inst_Regs *regs;
+#else
 	UART_Regs *regs;
+#endif
 	uint32_t current_speed;
 	const struct mspm0_sys_clock *clock_subsys;
 	const struct pinctrl_dev_config *pinctrl;
@@ -313,8 +321,17 @@ static DEVICE_API(uart, uart_mspm0_driver_api) = {
 												\
 	MSP_UART_IRQ_DEFINE(index);								\
 												\
-	static const struct uart_mspm0_config uart_mspm0_cfg_##index = {			\
-		.regs = (UART_Regs *)DT_INST_REG_ADDR(index),					\
+	IF_ENABLED(CONFIG_HAS_MSP_UNICOMM,                                     \
+	(static UNICOMM_Inst_Regs uart_mspm0_uc_regs_##index = {               \
+		.inst =  (UNICOMM_Regs *)DT_INST_REG_ADDR(index),                  \
+		.uart = (UNICOMMUART_Regs *)UC_UART_BASE(DT_INST_REG_ADDR(index)), \
+		.fixedMode = DT_CHILD_NUM(DT_PARENT(DT_DRV_INST(index))) == 1,     \
+	};)                                                                    \
+	)											\
+												\
+	static const struct uart_mspm0_config uart_mspm0_cfg_##index = {	\
+		.regs = COND_CODE_1(CONFIG_HAS_MSP_UNICOMM,					\
+			(&uart_mspm0_uc_regs_##index), ((UART_Regs *)DT_INST_REG_ADDR(index))),	\
 		.current_speed = DT_INST_PROP(index, current_speed),				\
 		.pinctrl = PINCTRL_DT_INST_DEV_CONFIG_GET(index),				\
 		.clock_subsys = &mspm0_uart_sys_clock##index,					\
diff --git a/dts/arm/ti/mspm0/g/mspm0g5115.dtsi b/dts/arm/ti/mspm0/g/mspm0g5115.dtsi
new file mode 100644
index 0000000000000..a53aa011cd8ea
--- /dev/null
+++ b/dts/arm/ti/mspm0/g/mspm0g5115.dtsi
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+#include <mem.h>
+#include <ti/mspm0/g/mspm0g51xx.dtsi>
+
+/ {
+	soc {
+		sram0: memory@20000000 {
+			reg = <0x20000000 DT_SIZE_K(16)>;
+		};
+	};
+};
+
+&flash0 {
+	reg = <0x0 DT_SIZE_K(32)>;
+};
diff --git a/dts/arm/ti/mspm0/g/mspm0g5116.dtsi b/dts/arm/ti/mspm0/g/mspm0g5116.dtsi
new file mode 100644
index 0000000000000..0be092ca1a03f
--- /dev/null
+++ b/dts/arm/ti/mspm0/g/mspm0g5116.dtsi
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+#include <mem.h>
+#include <ti/mspm0/g/mspm0g51xx.dtsi>
+
+/ {
+	soc {
+		sram0: memory@20000000 {
+			reg = <0x20000000 DT_SIZE_K(32)>;
+		};
+	};
+};
+
+&flash0 {
+	reg = <0x0 DT_SIZE_K(64)>;
+};
diff --git a/dts/arm/ti/mspm0/g/mspm0g5117.dtsi b/dts/arm/ti/mspm0/g/mspm0g5117.dtsi
new file mode 100644
index 0000000000000..6dfafcfb9a980
--- /dev/null
+++ b/dts/arm/ti/mspm0/g/mspm0g5117.dtsi
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+#include <mem.h>
+#include <ti/mspm0/g/mspm0g51xx.dtsi>
+
+/ {
+	soc {
+		sram0: memory@20000000 {
+			reg = <0x20000000 DT_SIZE_K(32)>;
+		};
+	};
+};
+
+&flash0 {
+	reg = <0x0 DT_SIZE_K(128)>;
+};
diff --git a/dts/arm/ti/mspm0/g/mspm0g5187.dtsi b/dts/arm/ti/mspm0/g/mspm0g5187.dtsi
new file mode 100644
index 0000000000000..6dfafcfb9a980
--- /dev/null
+++ b/dts/arm/ti/mspm0/g/mspm0g5187.dtsi
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+#include <mem.h>
+#include <ti/mspm0/g/mspm0g51xx.dtsi>
+
+/ {
+	soc {
+		sram0: memory@20000000 {
+			reg = <0x20000000 DT_SIZE_K(32)>;
+		};
+	};
+};
+
+&flash0 {
+	reg = <0x0 DT_SIZE_K(128)>;
+};
diff --git a/dts/arm/ti/mspm0/g/mspm0g51xx.dtsi b/dts/arm/ti/mspm0/g/mspm0g51xx.dtsi
new file mode 100644
index 0000000000000..4d8f9ccc95ef6
--- /dev/null
+++ b/dts/arm/ti/mspm0/g/mspm0g51xx.dtsi
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+#include <ti/mspm0/g/mspm0g.dtsi>
+#include <zephyr/dt-bindings/i2c/i2c.h>
+
+/delete-node/ &uart0;
+/delete-node/ &uart1;
+/delete-node/ &uart2;
+/delete-node/ &uart3;
+/delete-node/ &tima1;
+/delete-node/ &timg12;
+
+/ {
+	soc {
+		unicomm0: unicomm0@40a80000 {
+			reg = <0x40a80000 0x00002000>;
+			interrupts = <9 0>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			unicomm0_uart: unicomm0_uart@40a80000 {
+				compatible = "ti,mspm0-uart";
+				interrupts = <9 0>;
+				reg = <0x40a80000 0x00002000>;
+				clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
+				status = "disabled";
+			};
+		};
+
+		unicomm1: unicomm1@40a82000 {
+			reg = <0x40a82000 0x00002000>;
+			interrupts = <10 0>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			unicomm1_uart: unicomm1_uart@40a82000 {
+				compatible = "ti,mspm0-uart";
+				interrupts = <10 0>;
+				reg = <0x40a82000 0x00002000>;
+				clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
+				status = "disabled";
+			};
+		};
+
+		unicomm3: unicomm3@40b82000 {
+			reg = <0x40b82000 0x00002000>;
+			interrupts = <14 0>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			unicomm3_uart: unicomm3_uart@40b82000 {
+				compatible = "ti,mspm0-uart";
+				interrupts = <14 0>;
+				reg = <0x40b82000 0x00002000>;
+				clocks = <&ckm MSPM0_CLOCK_MCLK>;
+				status = "disabled";
+			};
+		};
+	};
+};
diff --git a/modules/Kconfig.mspm0 b/modules/Kconfig.mspm0
index 7125ff4919672..c227d0468b339 100644
--- a/modules/Kconfig.mspm0
+++ b/modules/Kconfig.mspm0
@@ -12,5 +12,8 @@ config USE_MSPM0_DL_GPIO
 config USE_MSPM0_DL_UART
 	bool
 
+config USE_MSPM0_DL_UNICOMM_UART
+	bool
+
 config USE_MSPM0_DL_TIMER
 	bool
diff --git a/scripts/checkpatch/typedefsfile b/scripts/checkpatch/typedefsfile
index ad569c5e33042..561d17a838d32 100644
--- a/scripts/checkpatch/typedefsfile
+++ b/scripts/checkpatch/typedefsfile
@@ -8,3 +8,4 @@ io_rw_32
 Pwm
 FILE
 NRF_GPIO_Type
+UNICOMM_Inst_Regs
diff --git a/soc/ti/mspm0/Kconfig.soc b/soc/ti/mspm0/Kconfig.soc
index 9aaaf8daa0ce9..47c8672c0119b 100644
--- a/soc/ti/mspm0/Kconfig.soc
+++ b/soc/ti/mspm0/Kconfig.soc
@@ -10,4 +10,7 @@ config SOC_FAMILY_TI_MSPM0
 config SOC_FAMILY
 	default "ti_mspm0" if SOC_FAMILY_TI_MSPM0
 
+config HAS_MSP_UNICOMM
+	bool
+
 rsource "*/Kconfig.soc"
diff --git a/soc/ti/mspm0/mspm0g/Kconfig.soc b/soc/ti/mspm0/mspm0g/Kconfig.soc
index 6bf4f51cdaea9..0f966b0100410 100644
--- a/soc/ti/mspm0/mspm0g/Kconfig.soc
+++ b/soc/ti/mspm0/mspm0g/Kconfig.soc
@@ -64,6 +64,26 @@ config SOC_MSPM0G3519
 	bool
 	select SOC_SERIES_MSPM0G
 
+config SOC_MSPM0G5115
+	bool
+	select SOC_SERIES_MSPM0G
+	select HAS_MSP_UNICOMM
+
+config SOC_MSPM0G5116
+	bool
+	select SOC_SERIES_MSPM0G
+	select HAS_MSP_UNICOMM
+
+config SOC_MSPM0G5117
+	bool
+	select SOC_SERIES_MSPM0G
+	select HAS_MSP_UNICOMM
+
+config SOC_MSPM0G5187
+	bool
+	select SOC_SERIES_MSPM0G
+	select HAS_MSP_UNICOMM
+
 config SOC_SERIES
 	default "mspm0g" if SOC_SERIES_MSPM0G
 
@@ -82,3 +102,7 @@ config SOC
 	default "mspm0g3506" if SOC_MSPM0G3506
 	default "mspm0g3507" if SOC_MSPM0G3507
 	default "mspm0g3519" if SOC_MSPM0G3519
+	default "mspm0g5115" if SOC_MSPM0G5115
+	default "mspm0g5116" if SOC_MSPM0G5116
+	default "mspm0g5117" if SOC_MSPM0G5117
+	default "mspm0g5187" if SOC_MSPM0G5187
diff --git a/soc/ti/mspm0/soc.yml b/soc/ti/mspm0/soc.yml
index 732275c28ab9a..f85767b7a6e44 100644
--- a/soc/ti/mspm0/soc.yml
+++ b/soc/ti/mspm0/soc.yml
@@ -17,6 +17,10 @@ family:
     - name: mspm0g3506
     - name: mspm0g3507
     - name: mspm0g3519
+    - name: mspm0g5115
+    - name: mspm0g5116
+    - name: mspm0g5117
+    - name: mspm0g5187
   - name: mspm0l
     socs:
     - name: mspm0l1105
diff --git a/west.yml b/west.yml
index f62791e5b0cf8..16d83f95c1ec2 100644
--- a/west.yml
+++ b/west.yml
@@ -265,7 +265,7 @@ manifest:
       groups:
         - hal
     - name: hal_ti
-      revision: cc049020152585c4e968b83c084d230234b6d852
+      revision: pull/74/head
       path: modules/hal/ti
       groups:
         - hal