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Utils: Handle OPERAND_TYPE_REGISTER in ZydisCalcAbsoluteAddressEx (#520)
1 parent 16c6a36 commit af792c4

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+20
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src/Utils.c

Lines changed: 20 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -133,23 +133,36 @@ ZyanStatus ZydisCalcAbsoluteAddressEx(const ZydisDecodedInstruction* instruction
133133
return ZYAN_STATUS_INVALID_ARGUMENT;
134134
}
135135

136-
if ((operand->type != ZYDIS_OPERAND_TYPE_MEMORY) ||
136+
if ((operand->type != ZYDIS_OPERAND_TYPE_REGISTER) &&
137+
((operand->type != ZYDIS_OPERAND_TYPE_MEMORY) ||
137138
((operand->mem.base == ZYDIS_REGISTER_NONE) &&
138139
(operand->mem.index == ZYDIS_REGISTER_NONE)) ||
139140
(operand->mem.base == ZYDIS_REGISTER_EIP) ||
140-
(operand->mem.base == ZYDIS_REGISTER_RIP))
141+
(operand->mem.base == ZYDIS_REGISTER_RIP)))
141142
{
142143
return ZydisCalcAbsoluteAddress(instruction, operand, runtime_address, result_address);
143144
}
144145

145-
ZyanU64 value = operand->mem.disp.value;
146-
if (operand->mem.base)
146+
ZyanU64 value;
147+
if (operand->type == ZYDIS_OPERAND_TYPE_REGISTER)
147148
{
148-
value += register_context->values[operand->mem.base];
149+
value = register_context->values[operand->reg.value];
149150
}
150-
if (operand->mem.index)
151+
else if (operand->type == ZYDIS_OPERAND_TYPE_MEMORY)
151152
{
152-
value += register_context->values[operand->mem.index] * operand->mem.scale;
153+
value = operand->mem.disp.value;
154+
if (operand->mem.base)
155+
{
156+
value += register_context->values[operand->mem.base];
157+
}
158+
if (operand->mem.index)
159+
{
160+
value += register_context->values[operand->mem.index] * operand->mem.scale;
161+
}
162+
}
163+
else
164+
{
165+
return ZYAN_STATUS_INVALID_ARGUMENT;
153166
}
154167

155168
switch (instruction->address_width)

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