Fixed SIB.base handling when ASIZE == 32 (Fixes #592)

Author: mappzor

src/Decoder.c

@@ -1432,7 +1432,9 @@ static ZyanStatus ZydisDecodeOperandMemory(const ZydisDecoderContext* context,
                 operand->mem.index = ZYDIS_REGISTER_NONE;
                 operand->mem.scale = 0;
             }
-            if (operand->mem.base == ZYDIS_REGISTER_EBP)
+            if ((operand->mem.base == ZYDIS_REGISTER_EBP) ||
+                (operand->mem.base == ZYDIS_REGISTER_R13D) ||
+                (operand->mem.base == ZYDIS_REGISTER_R29D))
             {
                 if (instruction->raw.modrm.mod == 0)
                 {

tests/cases/default_049.in

@@ -0,0 +1 @@
+-64 67418A0C25D8E98800

tests/cases/default_049.out

@@ -0,0 +1,41 @@
+== [    BASIC ] ============================================================================================
+   MNEMONIC: mov [ENC: DEFAULT, MAP: DEFAULT, OPC: 0x8A]
+     LENGTH:  9
+        SSZ: 64
+       EOSZ:  8
+       EASZ: 32
+   CATEGORY: DATAXFER
+    ISA-SET: I86
+    ISA-EXT: BASE
+ EXCEPTIONS: NONE
+ ATTRIBUTES: HAS_MODRM HAS_SIB HAS_REX ACCEPTS_SEGMENT HAS_ADDRESSSIZE 
+  OPTIMIZED: 8A 0C 25 D8 E9 88 00 
+
+== [ OPERANDS ] ============================================================================================
+##       TYPE  VISIBILITY  ACTION      ENCODING   SIZE  NELEM  ELEMSZ  ELEMTYPE                        VALUE
+--  ---------  ----------  ------  ------------   ----  -----  ------  --------  ---------------------------
+ 0   REGISTER    EXPLICIT       W     MODRM_REG      8      1       8       INT                           cl
+ 1     MEMORY    EXPLICIT       R      MODRM_RM      8      1       8       INT  TYPE  =                 MEM
+                                                                                 SEG   =                  ds
+                                                                                 BASE  =                none
+                                                                                 INDEX =                none
+                                                                                 SCALE =                   0
+                                                                                 DISP  =  0x000000000088E9D8
+--  ---------  ----------  ------  ------------   ----  -----  ------  --------  ---------------------------
+
+== [      ATT ] ============================================================================================
+   ABSOLUTE: mov 0x0088E9D8, %cl
+   RELATIVE: mov 0x0088E9D8, %cl
+
+== [    INTEL ] ============================================================================================
+   ABSOLUTE: mov cl, byte ptr ds:[0x0088E9D8]
+   RELATIVE: mov cl, byte ptr ds:[0x0088E9D8]
+
+== [ SEGMENTS ] ============================================================================================
+67 41 8A 0C 25 D8 E9 88 00 
+:  :  :  :  :  :..DISP
+:  :  :  :  :..SIB
+:  :  :  :..MODRM
+:  :  :..OPCODE
+:  :..REX
+:..PREFIXES

tests/cases/default_050.in

@@ -0,0 +1 @@
+-64 67450FAC3CC50000E94110

tests/cases/default_050.out

@@ -0,0 +1,49 @@
+== [    BASIC ] ============================================================================================
+   MNEMONIC: shrd [ENC: DEFAULT, MAP: 0F, OPC: 0xAC]
+     LENGTH: 11
+        SSZ: 64
+       EOSZ: 32
+       EASZ: 32
+   CATEGORY: SHIFT
+    ISA-SET: I386
+    ISA-EXT: BASE
+ EXCEPTIONS: NONE
+ ATTRIBUTES: HAS_MODRM HAS_SIB HAS_REX CPUFLAG_ACCESS ACCEPTS_SEGMENT HAS_ADDRESSSIZE 
+  OPTIMIZED: 67 44 0F AC 3C C5 00 00 E9 41 10 
+
+== [ OPERANDS ] ============================================================================================
+##       TYPE  VISIBILITY  ACTION      ENCODING   SIZE  NELEM  ELEMSZ  ELEMTYPE                        VALUE
+--  ---------  ----------  ------  ------------   ----  -----  ------  --------  ---------------------------
+ 0     MEMORY    EXPLICIT     RCW      MODRM_RM     32      1      32      UINT  TYPE  =                 MEM
+                                                                                 SEG   =                  ds
+                                                                                 BASE  =                none
+                                                                                 INDEX =                 eax
+                                                                                 SCALE =                   8
+                                                                                 DISP  =  0x0000000041E90000
+ 1   REGISTER    EXPLICIT       R     MODRM_REG     32      1      32      UINT                         r15d
+ 2  IMMEDIATE    EXPLICIT       R         UIMM8      8      1       8      UINT  [U A  8] 0x0000000000000010
+ 3   REGISTER      HIDDEN       W          NONE     64     64       1       INT                       rflags
+--  ---------  ----------  ------  ------------   ----  -----  ------  --------  ---------------------------
+
+== [    FLAGS ] ============================================================================================
+    ACTIONS: [CF  : M  ] [PF  : M  ] [AF  : U  ] [ZF  : M  ] [SF  : M  ] [OF  : U  ] 
+       READ: 0x00000000
+    WRITTEN: 0x000008D5
+
+== [      ATT ] ============================================================================================
+   ABSOLUTE: shrd $0x10, %r15d, 0x41E90000(,%eax,8)
+   RELATIVE: shrd $0x10, %r15d, 0x41E90000(,%eax,8)
+
+== [    INTEL ] ============================================================================================
+   ABSOLUTE: shrd dword ptr ds:[eax*8+0x41E90000], r15d, 0x10
+   RELATIVE: shrd dword ptr ds:[eax*8+0x41E90000], r15d, 0x10
+
+== [ SEGMENTS ] ============================================================================================
+67 45 0F AC 3C C5 00 00 E9 41 10 
+:  :  :     :  :  :           :..IMM
+:  :  :     :  :  :..DISP
+:  :  :     :  :..SIB
+:  :  :     :..MODRM
+:  :  :..OPCODE
+:  :..REX
+:..PREFIXES

tests/regression.py

@@ -43,17 +43,17 @@ def get_exitcode_stdout_stderr(path, cmd):
 
     pre, ext = os.path.splitext(case)
     path = os.path.join(TEST_CASE_DIRECTORY, pre + ".out")
+    out = out.decode().replace('\r\n', '\n')
 
     if args.operation == "rebase":
         with open(path, mode="wb") as f:
-            f.write(out)
+            f.write(out.encode())
         continue
 
     try:
         with open(path, mode="rb") as f:
             expected = f.read().decode().replace('\r\n', '\n')
 
-        out = out.decode().replace('\r\n', '\n')
         if expected != out:
             print(f"FAILED: '{case}' [{payload}]")
             print('\n'.join(difflib.unified_diff(