Background
In build_inc.sh the CUDA compile flags include -mllvm --skip-double, which prevents all double-precision (float64) kernels from being compiled into the plugin.
Impact
As a result:
contiguous(float64) is not registered (missing double in PD_CUSTOM_KERNEL_REGISTER)
- Float64 operations on Iluvatar GPU produce NaN or crash with "kernel not registered"
- This blocks many PaddlePaddle workflows that rely on float64 (e.g. STFT, audio processing)
Question
- Is the
--skip-double flag due to a hardware limitation (no float64 ALUs on BI-V150S)?
- Or is it a compiler/driver issue that could be resolved in a future release?
- If float64 is supported in hardware but slow, would enabling it with a build flag be acceptable?
We'd like to understand the roadmap so we can plan float64 support in our downstream projects like PaddleOcean (a high-level PaddlePaddle framework).
Background
In
build_inc.shthe CUDA compile flags include-mllvm --skip-double, which prevents all double-precision (float64) kernels from being compiled into the plugin.Impact
As a result:
contiguous(float64)is not registered (missingdoubleinPD_CUSTOM_KERNEL_REGISTER)Question
--skip-doubleflag due to a hardware limitation (no float64 ALUs on BI-V150S)?We'd like to understand the roadmap so we can plan float64 support in our downstream projects like PaddleOcean (a high-level PaddlePaddle framework).