@@ -84,17 +84,26 @@ void TIM2_IRQHandler(void) { ns800_clock_timer_isr(&ns800_timers[TIM2_INDEX]); }
8484static void ns800_clock_timer_init (rt_clock_timer_t * timer , rt_uint32_t state )
8585{
8686 struct ns800_clock_timer * tim = (struct ns800_clock_timer * )timer -> parent .user_data ;
87+ TIM_TypeDef * htim = (TIM_TypeDef * )tim -> instance ;
8788
88- __IO uint32_t cfg =
89- TIM_PWMMODE_ONEPOINT |
90- TIM_CLOCKDIVISION_DIV1 |
91- TIM_AUTORELOADPRELOAD_ENABLE |
92- TIM_COUNTERMODE_UP |
93- TIM_ONEPULSEMODE_REPETITIVE ;
94-
95- TIM_configTimeBase ((TIM_TypeDef * )tim -> instance , 200 - 1 , 100 - 1 , cfg );
96- TIM_clearFlags ((TIM_TypeDef * )tim -> instance , TIM_FLAG_UPDATE );
97- TIM_enableInterruptSource ((TIM_TypeDef * )tim -> instance , TIM_IT_UPDATE );
89+ if (state )
90+ {
91+ __IO uint32_t cfg =
92+ TIM_PWMMODE_ONEPOINT |
93+ TIM_CLOCKDIVISION_DIV1 |
94+ TIM_AUTORELOADPRELOAD_ENABLE |
95+ TIM_COUNTERMODE_UP |
96+ TIM_ONEPULSEMODE_REPETITIVE ;
97+
98+ TIM_configTimeBase (htim , 200 - 1 , 100 - 1 , cfg );
99+ TIM_clearFlags (htim , TIM_FLAG_UPDATE );
100+ TIM_enableInterruptSource (htim , TIM_IT_UPDATE );
101+ }
102+ else
103+ {
104+ TIM_disableInterruptSource (htim , TIM_IT_UPDATE );
105+ TIM_disableCounter (htim , TIM_FLAG_UPDATE );
106+ }
98107}
99108
100109static rt_err_t ns800_clock_timer_start (rt_clock_timer_t * timer , rt_uint32_t cnt , rt_clock_timer_mode_t mode )
@@ -146,7 +155,6 @@ static rt_err_t ns800_clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t c
146155 case CLOCK_TIMER_CTRL_FREQ_SET :
147156 freq = * (rt_uint32_t * )args ;
148157 __set_timerx_freq (timer , freq );
149- break ;
150158 break ;
151159 case CLOCK_TIMER_CTRL_INFO_GET :
152160 * (struct rt_clock_timer_info * )args = * timer -> info ;
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