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Improve x86 flag lifting semantics
Expand x86 LLIL flag modeling for arithmetic, test, rotate, shift, double-shift, and signed multiply instructions. Add popcnt-based parity calculation, auxiliary-carry formulas, SBB/ADC carry and overflow handling, IMUL truncation checks, and count-sensitive CF/OF behavior for shifts and rotates. Use LLIL unknown for architecturally undefined flags. Fix several flag correctness issues, including PTEST/VPTEST flag polarity and cleared flags, CCMP/CTEST signed-not-less conditions, EVEX default flag values, and SHLD/SHRD count/result flag behavior. Keep variable-count register shift and rotate value lifts clean by moving count-zero/count-one flag handling into flag callbacks, while preserving count-zero no-op behavior for memory destinations. Also improve ENTER lifting for nonzero nesting levels.
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