Various sources, old and new, claim that on Nvidia hardware 3D textures are actually 2d slices! http://www-ppl.ist.osaka-u.ac.jp/research/papers/201405_sugimoto_pc.pdf https://www.sciencedirect.com/science/article/pii/S2468502X1730027X#fig1 https://forum.unity.com/threads/improving-performance-of-3d-textures-using-texture-arrays.725384/#post-4849571 For Intel this is directly documented https://www.x.org/docs/intel/BYT/intel_os_gfx_prm_vol5_-_memory_views.pdf Wasn't able to find anything on AMD, but there is sources implying the layered nature ["Two bilinear fetches are required when sampling from a volume texture with bilinear filtering"](http://amd-dev.wpengine.netdna-cdn.com/wordpress/media/2013/05/GCNPerformanceTweets.pdf) It stands to reason that making the layering explicit by using 2d texture arrays there should be some room for optimization!
Various sources, old and new, claim that on Nvidia hardware 3D textures are actually 2d slices!
http://www-ppl.ist.osaka-u.ac.jp/research/papers/201405_sugimoto_pc.pdf
https://www.sciencedirect.com/science/article/pii/S2468502X1730027X#fig1
https://forum.unity.com/threads/improving-performance-of-3d-textures-using-texture-arrays.725384/#post-4849571
For Intel this is directly documented
https://www.x.org/docs/intel/BYT/intel_os_gfx_prm_vol5_-_memory_views.pdf
Wasn't able to find anything on AMD, but there is sources implying the layered nature
"Two bilinear fetches are required when sampling from a volume texture with bilinear
filtering"
It stands to reason that making the layering explicit by using 2d texture arrays there should be some room for optimization!