part 1 of thumb long branch link

Author: evanwporter

.github/workflows/gba.yaml

@@ -119,10 +119,11 @@ jobs:
           - ldrh_strh_imm_offset
           - ldr_str_sp_rel
           - add_cmp_mov_hi
+          - add_sub_sp
           - b
           - bcc
           - bx
-          - add_sub_sp
+          - bl_blx_prefix
           # - push_pop
 
     steps:

cores/gba/rtl/cpu/ControlUnit.sv

@@ -1149,10 +1149,12 @@ module GBA_ControlUnit (
         // TODO: Currently this instr lasts an extra cycle. We need to overlap the fetch and cycle 2.
         ARM_INSTR_BRANCH_LINK: begin
           if (cycle == 8'd0) begin
-            // Rd should be R14 (LR)
+            // Rd == R14 (LR)
             control_signals.ALU_writeback = ALU_WB_REG_RD;
 
             control_signals.ALU_op = ALU_OP_SUB;
+
+            // Rn == R15 (PC)
             control_signals.A_bus_source = A_BUS_SRC_RN;
 
             control_signals.B_bus_source = B_BUS_SRC_IMM;
@@ -1200,6 +1202,31 @@ module GBA_ControlUnit (
           end
         end
 
+        ARM_INSTR_THUMB_LONG_BRANCH_LINK_0: begin
+          if (cycle == 8'd0) begin
+            control_signals.addr_bus_src = ADDR_SRC_INCR;
+            control_signals |= fetch_next_instr();
+            control_signals.pipeline_advance = 1'b1;
+            control_signals.incrementer_writeback = 1'b1;
+
+            control_signals.ALU_op = ALU_OP_ADD;
+
+            // Rn == R15 (PC)
+            control_signals.A_bus_source = A_BUS_SRC_RN;
+
+            // Rd == R14 (LR)
+            control_signals.ALU_writeback = ALU_WB_REG_RD;
+
+            control_signals.B_bus_source = B_BUS_SRC_IMM;
+            control_signals.B_bus_imm = decoder_bus.word.arm.branch.imm24;
+            control_signals.B_bus_sign_extend = 1'b1;
+
+            control_signals.shift_type = SHIFT_LSL;
+            control_signals.shift_amount = 5'd12;
+
+          end
+        end
+
         ARM_INSTR_SWI: begin
           if (cycle == 8'd0) begin
             // Rd should be R14 (LR)

cores/gba/rtl/cpu/Decoder.sv

@@ -37,6 +37,17 @@ module GBA_Decoder (
     end
   end
 
+  logic [10:0] thumb_bl_imm11;
+
+  always_ff @(posedge clk) begin
+    if (reset) begin
+      thumb_bl_imm11 <= 11'b0;
+    end else if (execution_mode == MODE_THUMB && IR_THUMB[15:11] == 5'b11110) begin
+      thumb_bl_imm11 <= IR_THUMB[10:0];
+      $display("[GBA_Decoder] Latched upper half of BL immediate value 0x%03x", IR_THUMB[10:0]);
+    end
+  end
+
   always_comb begin
     bus.instr_type = ARM_INSTR_UNDEFINED;
     bus.condition_pass = 1'b1;
@@ -344,7 +355,20 @@ module GBA_Decoder (
 
           // Long Branch with Link
           16'b1111_????_????_????: begin
-            $display("[Decoder] Detected THUMB BL instruction with IR=0x%08x", IR_THUMB);
+            if (IR_THUMB[11] == 1'b0) begin
+              // bus.instr_type = ARM_INSTR_BRANCH_LINK;
+
+              bus.instr_type = ARM_INSTR_THUMB_LONG_BRANCH_LINK_0;
+
+              // Overwrite Rn and Rd
+              bus.decoded_regs.Rn = 4'd15;
+              bus.decoded_regs.Rd = 4'd14;
+
+              bus.word.arm.branch.imm24 = {{13{IR_THUMB[10]}}, IR_THUMB[10:0]};
+              $display("[Decoder] Detected THUMB BL instruction with IR=0x%08x", IR_THUMB);
+            end else begin
+
+            end
           end
 
           // Add Offset to Stack Pointer

cores/gba/rtl/cpu/example.sv

@@ -0,0 +1,7 @@
+module ExampleModule (
+    input logic clk,
+);
+
+    always_ff @(posedge clk) begin
+        // do stuff here
+    end

cores/gba/rtl/cpu/types.sv

@@ -295,6 +295,9 @@ package gba_cpu_types_pkg;
     /// Branch and exchange (BX)
     ARM_INSTR_BRANCH_EX,
 
+    /// Thumb Long Branch with Link (BL) - first instruction
+    ARM_INSTR_THUMB_LONG_BRANCH_LINK_0,
+
     // ======================================================
     // Data Processing
     // ======================================================
@@ -355,7 +358,11 @@ package gba_cpu_types_pkg;
     ARM_INSTR_MRS,
 
     /// MSR (write CPSR/SPSR)
-    ARM_INSTR_MSR
+    ARM_INSTR_MSR,
+
+    /// This instruction is for the BL instruction in thumb mode which takes 
+    /// 2 instructions to execute.
+    ARM_INSTR_THUMB_STALL
 
   } arm_instr_t;
 

cores/gba/tests/CMakeLists.txt

@@ -4,6 +4,7 @@ add_subdirectory(golden/nba/src/nba)
 
 add_subdirectory(cpu)
 add_subdirectory(arm.gba)
+add_subdirectory(thumb.gba)
 
 add_executable(test_gba
     ${CMAKE_CURRENT_SOURCE_DIR}/main.cpp
@@ -22,6 +23,7 @@ target_link_libraries(test_gba
     PRIVATE
         test_cpu_adv
         test_arm_gba
+        test_thumb_gba
         GTest::gtest
         libcommon
 )