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evanwporterevanwporter
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3 files changed

+63
-43
lines changed

3 files changed

+63
-43
lines changed

‎cores/gba/include/gba/cpu/util.svh‎

Lines changed: 11 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -314,13 +314,18 @@
314314
end \
315315
4'd15: begin \
316316
unique case (EXEC_MODE) \
317-
MODE_ARM: (REGS).user.r15 <= (VALUE); \
317+
MODE_ARM: \
318+
if (ALIGN_PC) (REGS).user.r15 <= (VALUE) & ~32'd1; \
319+
else begin \
320+
(REGS).user.r15 <= (VALUE); \
321+
$display("Warning: writing unaligned value 0x%08x to PC in THUMB mode", (VALUE)); \
322+
end \
318323
MODE_THUMB: begin \
319-
if (ALIGN_PC) (REGS).user.r15 <= (VALUE) & ~32'd1; \
320-
else begin \
321-
(REGS).user.r15 <= (VALUE); \
322-
$display("Warning: writing unaligned value 0x%08x to PC in THUMB mode", (VALUE)); \
323-
end \
324+
if (ALIGN_PC) (REGS).user.r15 <= (VALUE) & ~32'd1; \
325+
else begin \
326+
(REGS).user.r15 <= (VALUE); \
327+
$display("Warning: writing unaligned value 0x%08x to PC in THUMB mode", (VALUE)); \
328+
end \
324329
end \
325330
endcase \
326331
end \

‎cores/gba/rtl/cpu/CPU.sv‎

Lines changed: 49 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -391,15 +391,13 @@ module ARM7TMDI (
391391
unique case (execution_mode)
392392
MODE_ARM: begin
393393
// PC = PC + 4
394-
`WRITE_REG(regs, cpu_mode, 15, read_reg(regs, cpu_mode, 15) + 32'd4, execution_mode,
395-
1'b0)
396-
$display("Incrementing PC to: %0d", read_reg(regs, cpu_mode, 15) + 32'd4);
394+
`WRITE_REG(regs, cpu_mode, 15, bus.addr + 32'd4, execution_mode, 1'b0)
395+
$display("Incrementing PC to: %0d", bus.addr + 32'd4);
397396
$fflush();
398397
end
399398
MODE_THUMB: begin
400-
`WRITE_REG(regs, cpu_mode, 15, read_reg(regs, cpu_mode, 15) + 32'd2, execution_mode,
401-
1'b0)
402-
$display("Incrementing PC to: %0d", read_reg(regs, cpu_mode, 15) + 32'd2);
399+
`WRITE_REG(regs, cpu_mode, 15, bus.addr + 32'd2, execution_mode, 1'b0)
400+
$display("Incrementing PC to: %0d", bus.addr + 32'd2);
403401
$fflush();
404402
end
405403
endcase
@@ -410,8 +408,7 @@ module ARM7TMDI (
410408

411409
if (control_signals.set_thumb_mode) begin
412410
regs.CPSR[5] <= B_bus[0];
413-
`WRITE_REG(regs, cpu_mode, 4'd15, B_bus & ~32'd1, execution_mode,
414-
!control_signals.force_no_align_pc)
411+
`WRITE_REG(regs, cpu_mode, 4'd15, B_bus & ~32'd1, execution_mode, 1'b0)
415412
flush_req <= 1'b1;
416413
$display("Setting Thumb mode bit in CPSR");
417414
end
@@ -495,23 +492,39 @@ module ARM7TMDI (
495492
end else begin
496493
$display("[CPU] addr=%0d", bus.addr);
497494

498-
unique case (control_signals.addr_bus_src)
499-
ADDR_SRC_NONE: begin
500-
// bus.addr <= 32'd0;
501-
end
495+
if (control_signals.pipeline_advance && pc_modified) begin
496+
bus.addr <= alu_bus.result & ~32'd1;
497+
$display(
498+
"Pipeline advance with ALU writeback to PC, setting address bus to ALU result: 0x%08x",
499+
alu_bus.result);
500+
end else if (control_signals.pipeline_advance && flush_req_pending) begin
501+
bus.addr <= read_reg(regs, cpu_mode, 15);
502+
$display(
503+
"Pipeline advance with pending flush request, setting address bus to PC value: 0x%08x",
504+
read_reg(regs, cpu_mode, 15));
505+
end else if (control_signals.set_thumb_mode) begin
506+
bus.addr <= B_bus & ~32'd1;
507+
$display(
508+
"Setting address bus to new Thumb mode PC value due to set_thumb_mode control signal, B_bus=0x%08x, addr=0x%08x",
509+
B_bus, bus.addr);
510+
end else begin
511+
unique case (control_signals.addr_bus_src)
512+
ADDR_SRC_NONE: begin
513+
// bus.addr <= 32'd0;
514+
end
502515

503-
ADDR_SRC_ALU: begin
504-
$display("[CPU] Driving address bus with ALU result: %0d", alu_bus.result);
505-
bus.addr <= alu_bus.result;
506-
end
516+
ADDR_SRC_ALU: begin
517+
$display("[CPU] Driving address bus with ALU result: %0d", alu_bus.result);
518+
bus.addr <= alu_bus.result & ~32'd1;
519+
end
507520

508-
ADDR_SRC_PC: begin
509-
$display("Setting address bus to PC value: 0x%08x", read_reg(regs, cpu_mode, 15));
510-
unique case (execution_mode)
511-
MODE_ARM: bus.addr <= read_reg(regs, cpu_mode, 15) & ~32'd3;
512-
MODE_THUMB: bus.addr <= read_reg(regs, cpu_mode, 15) & ~32'd1;
513-
endcase
514-
end
521+
ADDR_SRC_PC: begin
522+
$display("Setting address bus to PC value: 0x%08x", read_reg(regs, cpu_mode, 15));
523+
unique case (execution_mode)
524+
MODE_ARM: bus.addr <= read_reg(regs, cpu_mode, 15) & ~32'd3;
525+
MODE_THUMB: bus.addr <= read_reg(regs, cpu_mode, 15) & ~32'd1;
526+
endcase
527+
end
515528

516529
ADDR_SRC_PC_RESTORE: begin
517530
$display("Restoring address bus from PC value: 0x%08x", read_reg(regs, cpu_mode, 15));
@@ -521,18 +534,19 @@ module ARM7TMDI (
521534
endcase
522535
end
523536

524-
ADDR_SRC_INCR: begin
525-
unique case (execution_mode)
526-
MODE_ARM: begin
527-
bus.addr <= bus.addr + 32'd4;
528-
end
529-
MODE_THUMB: begin
530-
bus.addr <= bus.addr + 32'd4;
531-
$display("Incrementing address bus for Thumb mode: new addr=%0d", bus.addr);
532-
end
533-
endcase
534-
end
535-
endcase
537+
ADDR_SRC_INCR: begin
538+
unique case (execution_mode)
539+
MODE_ARM: begin
540+
bus.addr <= bus.addr + 32'd4;
541+
end
542+
MODE_THUMB: begin
543+
bus.addr <= bus.addr + 32'd2;
544+
$display("Incrementing address bus for Thumb mode: new addr=%0d", bus.addr);
545+
end
546+
endcase
547+
end
548+
endcase
549+
end
536550
end
537551
end
538552

‎cores/gba/rtl/cpu/ControlUnit.sv‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1128,8 +1128,9 @@ module GBA_ControlUnit (
11281128
control_signals.ALU_op = ALU_OP_MOV;
11291129
control_signals.addr_bus_src = ADDR_SRC_ALU;
11301130

1131-
// control_signals.ALU_writeback = ALU_WB_REG_RP;
1132-
// control_signals.Rp_imm = 4'd15;
1131+
control_signals.ALU_writeback = ALU_WB_REG_RP;
1132+
1133+
control_signals.Rp_imm = 4'd15;
11331134

11341135
control_signals.B_bus_source = B_BUS_SRC_REG_RN;
11351136

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