From c7ada44efa8f7d54369b518ea724c3c25387bcdf Mon Sep 17 00:00:00 2001 From: "Kornev, Nikita" Date: Fri, 29 May 2026 17:18:03 +0200 Subject: [PATCH] [SYCL] Add compatible targets to -fsycl-targets Add bmg, dg2, mtl and ptl targets. --- clang/lib/Driver/ToolChains/SYCL.cpp | 8 ++++++++ clang/test/Driver/sycl-oneapi-gpu-intelgpu.cpp | 9 +++++++++ llvm/include/llvm/SYCLLowerIR/DeviceConfigFile.td | 4 ++++ sycl/doc/UsersManual.md | 6 +++++- 4 files changed, 26 insertions(+), 1 deletion(-) diff --git a/clang/lib/Driver/ToolChains/SYCL.cpp b/clang/lib/Driver/ToolChains/SYCL.cpp index 313fc4bc683a0..8a607ebf0f36b 100644 --- a/clang/lib/Driver/ToolChains/SYCL.cpp +++ b/clang/lib/Driver/ToolChains/SYCL.cpp @@ -1136,6 +1136,10 @@ StringRef SYCL::gen::resolveGenDevice(StringRef DeviceName) { "nvl_u") .Cases({"intel_gpu_nvl_p", "intel_gpu_35_10_0"}, "nvl_p") .Cases({"intel_gpu_cri", "intel_gpu_35_11_0"}, "cri") + .Case("intel_gpu_dg2", "dg2") + .Case("intel_gpu_mtl", "mtl") + .Case("intel_gpu_bmg", "bmg") + .Case("intel_gpu_ptl", "ptl") .Case("nvidia_gpu_sm_50", "sm_50") .Case("nvidia_gpu_sm_52", "sm_52") .Case("nvidia_gpu_sm_53", "sm_53") @@ -1254,17 +1258,21 @@ SmallString<64> SYCL::gen::getGenDeviceMacro(StringRef DeviceName) { .Case("adl_p", "INTEL_GPU_ADL_P") .Case("adl_n", "INTEL_GPU_ADL_N") .Case("dg1", "INTEL_GPU_DG1") + .Case("dg2", "INTEL_GPU_DG2") .Cases({"acm_g10", "dg2_g10"}, "INTEL_GPU_ACM_G10") .Cases({"acm_g11", "dg2_g11"}, "INTEL_GPU_ACM_G11") .Cases({"acm_g12", "dg2_g12"}, "INTEL_GPU_ACM_G12") .Case("pvc", "INTEL_GPU_PVC") .Case("pvc_vg", "INTEL_GPU_PVC_VG") + .Case("mtl", "INTEL_GPU_MTL") .Cases({"mtl_u", "mtl_s", "arl_u", "arl_s"}, "INTEL_GPU_MTL_U") .Case("mtl_h", "INTEL_GPU_MTL_H") .Case("arl_h", "INTEL_GPU_ARL_H") + .Case("bmg", "INTEL_GPU_BMG") .Case("bmg_g21", "INTEL_GPU_BMG_G21") .Case("bmg_g31", "INTEL_GPU_BMG_G31") .Case("lnl_m", "INTEL_GPU_LNL_M") + .Case("ptl", "INTEL_GPU_PTL") .Case("ptl_h", "INTEL_GPU_PTL_H") .Case("ptl_u", "INTEL_GPU_PTL_U") .Case("wcl", "INTEL_GPU_WCL") diff --git a/clang/test/Driver/sycl-oneapi-gpu-intelgpu.cpp b/clang/test/Driver/sycl-oneapi-gpu-intelgpu.cpp index cad966e9d45f9..1b491a00a7454 100644 --- a/clang/test/Driver/sycl-oneapi-gpu-intelgpu.cpp +++ b/clang/test/Driver/sycl-oneapi-gpu-intelgpu.cpp @@ -91,6 +91,9 @@ // RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=dg1 -DMAC_STR=DG1 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_12_10_0 -### %s 2>&1 | \ // RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=dg1 -DMAC_STR=DG1 +// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_dg2 -### %s 2>&1 | \ +// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=dg2 \ +// RUN: -DMAC_STR=DG2 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_acm_g10 -### %s 2>&1 | \ // RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=acm_g10 \ // RUN: -DMAC_STR=ACM_G10 @@ -126,6 +129,8 @@ // RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=pvc_xt_c0_vg -DMAC_STR=PVC_VG // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_12_61_7 -### %s 2>&1 | \ // RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=pvc_xt_c0_vg -DMAC_STR=PVC_VG +// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_mtl -### %s 2>&1 | \ +// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl -DMAC_STR=MTL // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_mtl_u -### %s 2>&1 | \ // RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=mtl_s -DMAC_STR=MTL_U // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_mtl_s -### %s 2>&1 | \ @@ -144,6 +149,8 @@ // RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=xe_lpgplus_b0 -DMAC_STR=ARL_H // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_12_74_4 -### %s 2>&1 | \ // RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=xe_lpgplus_b0 -DMAC_STR=ARL_H +// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_bmg -### %s 2>&1 | \ +// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=bmg -DMAC_STR=BMG // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_bmg_g21 -### %s 2>&1 | \ // RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=bmg_g21 -DMAC_STR=BMG_G21 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_20_1_4 -### %s 2>&1 | \ @@ -156,6 +163,8 @@ // RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=lnl_m -DMAC_STR=LNL_M // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_20_4_4 -### %s 2>&1 | \ // RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=lnl_m -DMAC_STR=LNL_M +// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_ptl -### %s 2>&1 | \ +// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=ptl -DMAC_STR=PTL // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_ptl_h -### %s 2>&1 | \ // RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=ptl_h -DMAC_STR=PTL_H // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_30_0_4 -### %s 2>&1 | \ diff --git a/llvm/include/llvm/SYCLLowerIR/DeviceConfigFile.td b/llvm/include/llvm/SYCLLowerIR/DeviceConfigFile.td index 262a9dce65359..39374398a22a4 100644 --- a/llvm/include/llvm/SYCLLowerIR/DeviceConfigFile.td +++ b/llvm/include/llvm/SYCLLowerIR/DeviceConfigFile.td @@ -258,16 +258,20 @@ def : IntelTargetInfo<"intel_gpu_nvl_p", Fp16Fp64Atomic64, Sg16_32>; def : IntelTargetInfo<"intel_gpu_nvl_u", Fp16Fp64Atomic64, Sg16_32>; def : IntelTargetInfo<"intel_gpu_nvl_s", Fp16Fp64Atomic64, Sg16_32>; def : IntelTargetInfo<"intel_gpu_wcl", Fp16Fp64Atomic64, Sg16_32>; +def : IntelTargetInfo<"intel_gpu_ptl", Fp16Fp64Atomic64, Sg16_32>; def : IntelTargetInfo<"intel_gpu_ptl_u", Fp16Fp64Atomic64, Sg16_32>; def : IntelTargetInfo<"intel_gpu_ptl_h", Fp16Fp64Atomic64, Sg16_32>; +def : IntelTargetInfo<"intel_gpu_bmg", Fp16Fp64Atomic64, Sg16_32>; def : IntelTargetInfo<"intel_gpu_lnl_m", Fp16Fp64Atomic64, Sg16_32>; def : IntelTargetInfo<"intel_gpu_bmg_g31", Fp16Fp64Atomic64, Sg16_32>; def : IntelTargetInfo<"intel_gpu_bmg_g21", Fp16Fp64Atomic64, Sg16_32>; def : IntelTargetInfo<"intel_gpu_arl_h", Fp16Fp64Atomic64, Sg8_16_32>; +def : IntelTargetInfo<"intel_gpu_mtl", Fp16Fp64Atomic64, Sg8_16_32>; def : IntelTargetInfo<"intel_gpu_mtl_h", Fp16Fp64Atomic64, Sg8_16_32>; def : IntelTargetInfo<"intel_gpu_mtl_u", Fp16Fp64Atomic64, Sg8_16_32>; def : IntelTargetInfo<"intel_gpu_pvc_vg", Fp16Fp64Atomic64, Sg16_32>; def : IntelTargetInfo<"intel_gpu_pvc", Fp16Fp64Atomic64, Sg16_32>; +def : IntelTargetInfo<"intel_gpu_dg2", Fp16Atomic64, Sg8_16_32>; def : IntelTargetInfo<"intel_gpu_acm_g12", Fp16Atomic64, Sg8_16_32>; def : IntelTargetInfo<"intel_gpu_acm_g11", Fp16Atomic64, Sg8_16_32>; def : IntelTargetInfo<"intel_gpu_acm_g10", Fp16Atomic64, Sg8_16_32>; diff --git a/sycl/doc/UsersManual.md b/sycl/doc/UsersManual.md index 5ae851d63bda1..b10fd3a8d695c 100644 --- a/sycl/doc/UsersManual.md +++ b/sycl/doc/UsersManual.md @@ -46,22 +46,26 @@ and not recommended to use in production environment. Special target values specific to Intel, NVIDIA and AMD Processor Graphics support are accepted, providing a streamlined interface for AOT. - A comma-separated list of valid Intel, NVIDIA and AMD Processor Graphics values are supported. + A comma-separated list of valid Intel, NVIDIA and AMD Processor Graphics values is supported. * intel_gpu_cri, intel_gpu_35_11_0 - Crescent Island Intel graphics architecture * intel_gpu_nvl_p, intel_gpu_35_10_0 - Nova Lake P Intel graphics architecture * intel_gpu_nvl_u, intel_gpu_nvl_h, intel_gpu_30_5_0 - Nova Lake U/H Intel graphics architecture * intel_gpu_nvl_s, intel_gpu_nvl_hx, intel_gpu_nvl_ul, intel_gpu_30_4_0 - Nova Lake S/HX/UL Intel graphics architecture * intel_gpu_wcl, intel_gpu_30_3_0 - Wildcat Lake Intel graphics architecture + * intel_gpu_ptl - Panther Lake * Intel graphics architecture - compatible with all intel_gpu_ptl_* targets * intel_gpu_ptl_u, intel_gpu_30_1_1 - Panther Lake U Intel graphics architecture * intel_gpu_ptl_h, intel_gpu_30_0_4 - Panther Lake H Intel graphics architecture + * intel_gpu_bmg - Battlemage * Intel graphics architecture - compatible with all intel_gpu_bmg_g* and intel_gpu_lnl_m targets * intel_gpu_lnl_m, intel_gpu_20_4_4 - Lunar Lake Intel graphics architecture * intel_gpu_bmg_g31, intel_gpu_20_2_0 - Battlemage G31 Intel graphics architecture * intel_gpu_bmg_g21, intel_gpu_20_1_4 - Battlemage G21 Intel graphics architecture * intel_gpu_arl_h, intel_gpu_12_74_4 - Arrow Lake H Intel graphics architecture + * intel_gpu_mtl - Meteor Lake * Intel graphics architecture - compatible with all intel_gpu_mtl_* targets * intel_gpu_mtl_h, intel_gpu_12_71_4 - Meteor Lake H Intel graphics architecture * intel_gpu_mtl_u, intel_gpu_mtl_s, intel_gpu_arl_u, intel_gpu_arl_s, intel_gpu_12_70_4 - Meteor Lake U/S or Arrow Lake U/S Intel graphics architecture * intel_gpu_pvc_vg, intel_gpu_12_61_7 - Ponte Vecchio VG Intel graphics architecture * intel_gpu_pvc, intel_gpu_12_60_7 - Ponte Vecchio Intel graphics architecture + * intel_gpu_dg2 - Alchemist * Intel graphics architecture - compatible with all intel_gpu_dg2_g* targets * intel_gpu_acm_g12, intel_gpu_dg2_g12, intel_gpu_12_57_0 - Alchemist G12 Intel graphics architecture * intel_gpu_acm_g11, intel_gpu_dg2_g11, intel_gpu_12_56_5 - Alchemist G11 Intel graphics architecture * intel_gpu_acm_g10, intel_gpu_dg2_g10, intel_gpu_12_55_8 - Alchemist G10 Intel graphics architecture