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Merge pull request #1516 from JHertz5/issue-1512
Issue#1512: Added rule to align assignment operators in variable declaration arrays
2 parents 938d464 + b748bf4 commit b4861c5

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docs/configuring_keyword_alignment_rules.rst

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@@ -992,3 +992,4 @@ Rules Enforcing Keyword Alignment
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* `subprogram_body_400 <subprogram_body_rules.html#subprogram-body-400>`_
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* `subprogram_body_401 <subprogram_body_rules.html#subprogram-body-401>`_
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* `type_400 <type_rules.html#type-400>`_
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* `variable_401 <variable_rules.html#variable-401>`_

docs/rule_groups/alignment_rule_group.rst

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@@ -79,6 +79,7 @@ Rules Enforcing Alignment Rule Group
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* `subprogram_body_401 <../subprogram_body_rules.html#subprogram-body-401>`_
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* `type_400 <../type_rules.html#type-400>`_
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* `variable_400 <../variable_rules.html#variable-400>`_
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* `variable_401 <../variable_rules.html#variable-401>`_
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* `variable_assignment_004 <../variable_assignment_rules.html#variable-assignment-004>`_
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* `variable_assignment_400 <../variable_assignment_rules.html#variable-assignment-400>`_
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* `variable_assignment_401 <../variable_assignment_rules.html#variable-assignment-401>`_

docs/variable_rules.rst

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@@ -443,6 +443,35 @@ This rule checks alignment of multiline constraints in variable declarations.
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element2(3 downto 0)
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);
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variable_401
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############
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|phase_5| |error| |alignment|
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This rule checks the alignment of assignment keywords in variable declarations.
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|configuring_keyword_alignment_rules_link|
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**Violation**
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.. code-block:: vhdl
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variable v_default_values : t_address_en := (
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c_address_control => false,
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c_address_data => true,
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others => false
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);
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**Fix**
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.. code-block:: vhdl
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variable v_default_values : t_address_en := (
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c_address_control => false,
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c_address_data => true,
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others => false
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);
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variable_500
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############
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architecture rtl of fifo is
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begin
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process
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variable v_my_rec : t_my_rec :=
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(
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signal_one => '0',
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signal_onetwo => '0',
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signal_onetwothree => '0',
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signal_onetwothreefour => '0',
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-- Comment
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signal_onetwothreefourfive => '0',
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signal_onetwothreefourfivesix => '0'
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);
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variable v_default_values : t_address_en := (
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C_ADDRESS_CONTROL_A => false,
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C_ADDRESS_DATA_A => true,
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others => false
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C_ADDRESS_CONTROL_B => false,
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C_ADDRESS_DATA_B => true,
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others => false
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-- Comment
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C_ADDRESS_CONTROL_C => false,
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C_ADDRESS_DATA_C => true,
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others => false
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);
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variable v_my_rec : t_my_rec :=
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(
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signal_one => '0',
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signal_onetwo => '0',
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signal_onetwothree => '0',
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signal_onetwothreefour => '0',
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-- Comment
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signal_onetwothreefourfive => '0',
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signal_onetwothreefourfivesix => '0'
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);
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variable v_default_values : t_address_en := (
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C_ADDRESS_CONTROL_A => false,
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C_ADDRESS_DATA_A => true,
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others => false
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C_ADDRESS_CONTROL_B => false,
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C_ADDRESS_DATA_B => true,
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others => false
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-- Comment
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C_ADDRESS_CONTROL_C => false,
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C_ADDRESS_DATA_C => true,
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others => false
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);
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-- Test hierarchical assignments
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-- Desired alignment
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variable v_my_var : my_type := (
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ENUM_1 => (
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A => 1,
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B => 2,
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C => 3
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),
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ENUM_224 => (
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AA => 1,
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BB => 2,
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CC => 3
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)
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);
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-- Invalid alignment
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variable v_my_var : my_type := (
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ENUM_1 => (
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A => 1,
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B => 2,
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C => 3
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),
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ENUM_224 => (
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AA => 1,
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BB => 2,
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CC => 3
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)
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);
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-- Test single line aggregates
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variable v_my_var : my_type := (
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ENUM_1 => (
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A => 1,
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B => 2,
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C => 3
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),
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ENUM_2 => (
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AA => 1,
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BBBBBBB => ((others => '0')),
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CC => 3 -- Not aligned!
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)
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);
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begin
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end process;
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end architecture rtl;
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architecture rtl of fifo is
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begin
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process
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variable v_my_rec : t_my_rec :=
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(
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signal_one => '0',
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signal_onetwo => '0',
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signal_onetwothree => '0',
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signal_onetwothreefour => '0',
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-- Comment
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signal_onetwothreefourfive => '0',
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signal_onetwothreefourfivesix => '0'
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);
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variable v_default_values : t_address_en := (
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C_ADDRESS_CONTROL_A => false,
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C_ADDRESS_DATA_A => true,
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others => false
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C_ADDRESS_CONTROL_B => false,
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C_ADDRESS_DATA_B => true,
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others => false
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-- Comment
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C_ADDRESS_CONTROL_C => false,
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C_ADDRESS_DATA_C => true,
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others => false
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);
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variable v_my_rec : t_my_rec :=
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(
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signal_one => '0',
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signal_onetwo => '0',
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signal_onetwothree => '0',
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signal_onetwothreefour => '0',
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-- Comment
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signal_onetwothreefourfive => '0',
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signal_onetwothreefourfivesix => '0'
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);
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variable v_default_values : t_address_en := (
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C_ADDRESS_CONTROL_A => false,
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C_ADDRESS_DATA_A => true,
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others => false
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C_ADDRESS_CONTROL_B => false,
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C_ADDRESS_DATA_B => true,
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others => false
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-- Comment
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C_ADDRESS_CONTROL_C => false,
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C_ADDRESS_DATA_C => true,
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others => false
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);
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-- Test hierarchical assignments
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-- Desired alignment
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variable v_my_var : my_type := (
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ENUM_1 => (
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A => 1,
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B => 2,
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C => 3
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),
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ENUM_224 => (
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AA => 1,
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BB => 2,
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CC => 3
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)
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);
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-- Invalid alignment
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variable v_my_var : my_type := (
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ENUM_1 => (
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A => 1,
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B => 2,
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C => 3
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),
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ENUM_224 => (
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AA => 1,
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BB => 2,
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CC => 3
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)
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);
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-- Test single line aggregates
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variable v_my_var : my_type := (
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ENUM_1 => (
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A => 1,
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B => 2,
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C => 3
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),
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ENUM_2 => (
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AA => 1,
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BBBBBBB => ((others => '0')),
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CC => 3 -- Not aligned!
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)
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);
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begin
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end process;
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end architecture rtl;
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architecture rtl of fifo is
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begin
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process
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variable v_my_rec : t_my_rec :=
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(
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signal_one => '0',
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signal_onetwo => '0',
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signal_onetwothree => '0',
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signal_onetwothreefour => '0',
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-- Comment
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signal_onetwothreefourfive => '0',
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signal_onetwothreefourfivesix => '0'
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);
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variable v_default_values : t_address_en := (
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C_ADDRESS_CONTROL_A => false,
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C_ADDRESS_DATA_A => true,
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others => false
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C_ADDRESS_CONTROL_B => false,
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C_ADDRESS_DATA_B => true,
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others => false
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-- Comment
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C_ADDRESS_CONTROL_C => false,
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C_ADDRESS_DATA_C => true,
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others => false
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);
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variable v_my_rec : t_my_rec :=
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(
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signal_one => '0',
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signal_onetwo => '0',
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signal_onetwothree => '0',
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signal_onetwothreefour => '0',
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-- Comment
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signal_onetwothreefourfive => '0',
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signal_onetwothreefourfivesix => '0'
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);
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variable v_default_values : t_address_en := (
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C_ADDRESS_CONTROL_A => false,
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C_ADDRESS_DATA_A => true,
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others => false
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C_ADDRESS_CONTROL_B => false,
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C_ADDRESS_DATA_B => true,
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others => false
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-- Comment
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C_ADDRESS_CONTROL_C => false,
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C_ADDRESS_DATA_C => true,
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others => false
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);
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-- Test hierarchical assignments
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-- Desired alignment
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variable v_my_var : my_type := (
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ENUM_1 => (
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A => 1,
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B => 2,
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C => 3
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),
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ENUM_224 => (
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AA => 1,
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BB => 2,
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CC => 3
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)
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);
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-- Invalid alignment
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variable v_my_var : my_type := (
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ENUM_1 => (
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A => 1,
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B => 2,
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C => 3
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),
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ENUM_224 => (
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AA => 1,
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BB => 2,
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CC => 3
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)
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);
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-- Test single line aggregates
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variable v_my_var : my_type := (
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ENUM_1 => (
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A => 1,
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B => 2,
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C => 3
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),
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ENUM_2 => (
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AA => 1,
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BBBBBBB => ((others => '0')),
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CC => 3 -- Not aligned!
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)
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);
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begin
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end process;
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end architecture rtl;

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