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I am interested in helping add support for some of the VHDL 2019 features, at the moment the main one being interfaces.
I have some work in progress development on adding support for the new 2019 keywords and interfaces and am excited to contribute them. I am planning on making corresponding issues and PRs for each of these soon.
Assuming there is interest in these and other VHDL 2019 features, does it make sense to add a tracking issue for VHDL 2019 support similar to GHDL's? There is probably a fair amount of low hanging fruit in there that we could get the ball rolling on this.
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I am interested in helping add support for some of the VHDL 2019 features, at the moment the main one being interfaces.
I have some work in progress development on adding support for the new 2019 keywords and interfaces and am excited to contribute them. I am planning on making corresponding issues and PRs for each of these soon.
Assuming there is interest in these and other VHDL 2019 features, does it make sense to add a tracking issue for VHDL 2019 support similar to GHDL's? There is probably a fair amount of low hanging fruit in there that we could get the ball rolling on this.
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