[CI] Update CI flow.

Author: DiyouS

.gitlab-ci.yml

@@ -8,29 +8,32 @@ variables:
   GIT_SUBMODULE_STRATEGY: none
   ROOT_DIR: '$CI_PROJECT_DIR'
   APPS: "tests"
-  PATH: '/home/gitlabci/.cargo/bin:/usr/local/bin:/usr/bin:/usr/sbin:/sbin:/usr/local/condor/bin:/usr/sepp/bin:$CI_PROJECT_DIR/install/verilator/bin:/home/gitlabci/.local/bin'
+  PATH: '$HOME/.cargo/bin:/usr/local/bin:/usr/bin:/usr/sbin:/sbin:/usr/local/condor/bin:/usr/sepp/bin:$CI_PROJECT_DIR/install/verilator/bin:$HOME/.local/bin'
   OBJCACHE: ''
   CC:  '/usr/pack/gcc-11.2.0-af/linux-x64/bin/gcc'
   CXX: '/usr/pack/gcc-11.2.0-af/linux-x64/bin/g++'
   CMAKE: 'cmake-3.28.3'
   python: 'python3'
   python3: 'python3'
+  # Config to build and test
+  CI_CONFIG: 'cachepool_fpu_2g'
+  SW_PREFIX: 'test-cachepool-'
 
 default:
-  tags: [dolent]
+  tags: [shared]
 
 stages:
   - build
+  - test
 
-.base:
-  artifacts:
-    when: always
-    expire_in: 1 day
-
-build-vsim:
-  extends: .base
+# ---------------------------------------------------------------------------
+# Build stage: compile RTL and software for CI_CONFIG.
+# Parallel jobs within the same pipeline share $HOME, so the toolchain
+# installed by make quick-tool is automatically available to all test jobs.
+# ---------------------------------------------------------------------------
+build:
   stage: build
-  timeout: 5h
+  timeout: 4h 30m
   script:
     - echo "Using CC=$CC"
     - echo "Using CXX=$CXX"
@@ -39,10 +42,57 @@ build-vsim:
     - make quick-tool
     - make init
     - make dram-build
-    - cd util/auto-benchmark
-    - chmod +x ./run_ci.sh
-    - ./run_ci.sh
+    - python3 -m pip install --quiet -r requirements.txt
+    - make clean generate vsim config=$CI_CONFIG
+  artifacts:
+    when: always
+    expire_in: 1 day
+    paths:
+      # QuestaSim compiled work library
+      - sim/work/
+      # vsim wrapper scripts (exclude sim/bin/logs/ — not needed by test jobs)
+      - sim/bin/cachepool_cluster.vsim
+      - sim/bin/cachepool_cluster.vsim.gui
+      # DPI shared library
+      - sim/work-dpi/
+      # Software binaries for all kernels
+      - software/build/CachePoolTests/
+      # DRAMSys shared libraries and config files (referenced by vsim at runtime)
+      - hardware/deps/dram_rtl_sim/dramsys_lib/DRAMSys/build/lib/
+      - hardware/deps/dram_rtl_sim/dramsys_lib/DRAMSys/configs/
 
+# ---------------------------------------------------------------------------
+# Test stage: run each kernel in parallel on a separate runner.
+# Each job downloads the build artifacts, runs one simulation, and checks
+# the output log for failures.
+# ---------------------------------------------------------------------------
+test:
+  stage: test
+  timeout: 1h
+  needs: [build]
+  parallel:
+    matrix:
+      - KERNEL:
+          - spin-lock
+          - load-store_M16
+          - fdotp-32b_M32768
+          - gemv_M512_N128_K32
+          - fmatmul-32b_M64_N64_K64
+          - fft-32b_M1024_N16
+          - multi_producer_single_consumer_double_linked_list_M1_N1350_K10
+          - byte-enable
+  script:
+    # The vsim script writes a .rtlbinary marker here; ensure the dir exists.
+    - mkdir -p sim/bin/logs
+    - chmod +x sim/bin/cachepool_cluster.vsim
+    - BIN="${SW_PREFIX}${KERNEL}"
+    - sim/bin/cachepool_cluster.vsim software/build/CachePoolTests/$BIN 2>&1 | tee test_${KERNEL}.log
+    - python3 util/auto-benchmark/check-ci.py test_${KERNEL}.log
   artifacts:
+    when: always
+    expire_in: 1 day
     paths:
-      - util/auto-benchmark/logs
+      # Full simulation log
+      - test_*.log
+      # Performance-monitor trace files written by the simulator
+      - sim/bin/logs/

requirements.txt

@@ -0,0 +1,8 @@
+# Python packages required for hardware code generation (make generate).
+# dataclasses is a stdlib backport needed on Python 3.6; it is a no-op on 3.7+.
+dataclasses
+hjson
+jsonref
+jsonschema
+mako
+termcolor

sim/sim.mk

@@ -100,17 +100,24 @@ ${WORK_DIR}/compile.vsim.tcl: ${SNLIB_DIR}/rtl_lib.cc ${SNLIB_DIR}/common_lib.cc
 	echo 'return 0' >> $@
 
 # Wrapper script & GUI script
+# The generated scripts derive ROOT_DIR from their own location at runtime so
+# that they remain portable across different checkout paths (CI runners, moved
+# repos). All absolute paths baked in by make are replaced by a single sed pass.
 define QUESTASIM
 	${VSIM} -c -do "source $<; quit" | tee $(dir $<)vsim.log
 	@! grep -P "Errors: [1-9]*," $(dir $<)vsim.log
 	@mkdir -p $(SIMBIN_DIR) $(SIMBIN_DIR)/logs
-	@echo "#!/bin/bash" > $(SIMBIN_DIR)/cachepool_cluster.vsim
+	@echo '#!/bin/bash' > $(SIMBIN_DIR)/cachepool_cluster.vsim
+	@echo 'ROOT_DIR="$$(cd "$$(dirname "$$(readlink -f "$$0")")/../.." && pwd)"' >> $(SIMBIN_DIR)/cachepool_cluster.vsim
 	@echo 'echo `realpath $$1` > ${SIMBIN_DIR}/logs/.rtlbinary' >> $(SIMBIN_DIR)/cachepool_cluster.vsim
 	@echo '${VSIM} +permissive ${VSIM_FLAGS} -do "run -a" -work ${WORK_DIR} -c -ldflags "-Wl,-rpath,${GCC_LIB} -L${FESVR}/lib -lfesvr_vsim -lutil" $1 +permissive-off ++$$1 +PRELOAD=$$1' >> $(SIMBIN_DIR)/cachepool_cluster.vsim
+	@sed -i 's|$(CACHEPOOL_DIR)|$${ROOT_DIR}|g' $(SIMBIN_DIR)/cachepool_cluster.vsim
 	@chmod +x $(SIMBIN_DIR)/cachepool_cluster.vsim
-	@echo "#!/bin/bash" > $(SIMBIN_DIR)/cachepool_cluster.vsim.gui
+	@echo '#!/bin/bash' > $(SIMBIN_DIR)/cachepool_cluster.vsim.gui
+	@echo 'ROOT_DIR="$$(cd "$$(dirname "$$(readlink -f "$$0")")/../.." && pwd)"' >> $(SIMBIN_DIR)/cachepool_cluster.vsim.gui
 	@echo 'echo `realpath $$1` > ${SIMBIN_DIR}/logs/.rtlbinary' >> $(SIMBIN_DIR)/cachepool_cluster.vsim.gui
 	@echo '${VSIM} +permissive ${VSIM_FLAGS} -do "log -r /*; source ${WAVE_FILE}; run -a" -work ${WORK_DIR} -ldflags "-Wl,-rpath,${GCC_LIB} -L${FESVR}/lib -lfesvr_vsim -lutil" $1 +permissive-off ++$$1 +PRELOAD=$$1' >> $(SIMBIN_DIR)/cachepool_cluster.vsim.gui
+	@sed -i 's|$(CACHEPOOL_DIR)|$${ROOT_DIR}|g' $(SIMBIN_DIR)/cachepool_cluster.vsim.gui
 	@chmod +x $(SIMBIN_DIR)/cachepool_cluster.vsim.gui
 endef