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@blapie blapie released this 12 Jan 15:28
· 20 commits to master since this release
v26.01
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DylanFleming-arm
GPG key ID: 876F9B1DBE297FD6
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Learn about vigilant mode.
649ccc8
This commit was signed with the committer’s verified signature.
DylanFleming-arm
GPG key ID: 876F9B1DBE297FD6
Verified
Learn about vigilant mode.

This release introduces AdvSIMD/SVE log, rsqrt, and pow variants; expands fp/ with complete double-precision arithmetic and conversions; and broadens CI/platform coverage while tightening pow/log/exp special-case handling, simplifying math configuration, and improving tests and benchmarks.

Main AOR directory

Add

  • Add cygwin/newlib support for the string routines and tests.
  • Update GitHub runners to refresh apt packages before installing dependencies.

Change

  • aarch64 assembly now emits .cfi_negate_ra_state for correct unwind info.
  • bench: Fix the memset benchmark typo that overflowed the size array.

fp/

Add

  • Implement double-precision addition/subtraction, division, and comparisons.
  • Add conversions between integers and double precision as well as between single and double precision.
  • Replace the stub ui2f test with a real one and add GNU-style comparison helpers.

Change

  • Rename the aux subdirectory and register aliases to avoid Windows toolchain issues.
  • Apply multiple GNU assembler build fixes across the new fp sources.

math/

Add

  • aarch64: Implement AdvSIMD log2p1 and SVE log2p1(f).
  • aarch64: Implement AdvSIMD and SVE log10p1(f).
  • aarch64: Implement AdvSIMD and SVE rsqrt(f).
  • aarch64: Implement AdvSIMD and SVE powr(f) plus shared helpers.
  • aarch64: Provide return-by-value AdvSIMD and SVE modf(f) and sincospi(f).

Change

  • Remove float_t/double_t usage and drop WANT_SIMD_EXCEPT to simplify configuration.
  • aarch64: Rework pow(f) and powr helpers, vectorise special cases, and fix negative or special argument handling.
  • aarch64/advsimd: Optimise log/log1p/log2/log10 (float and double).
  • aarch64/advsimd: Optimise atanhf, asinhf, acoshf, tan, and sinh.
  • aarch64/advsimd: Optimise vectorised special cases for expf, exp2f, exp10f, exp2m1f, exp10m1f via new helpers.
  • aarch64/advsimd: Vectorise expm1/expm1f special cases.
  • aarch64/experimental: Remove ldexp from expm1(f).
  • aarch64/sve: Improve scalar callbacks and special-case buffers.
  • aarch64/sve: Vectorise exp/exp2/exp10/expm1 fallbacks.

Full Changelog: v25.07...v26.01

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