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  • Introduce val_pcie_enable_dpc() and val_pcie_disable_dpc() helper functions to manage DPC trigger enable bits in the DPC capability structure.
  • Use these APIs to disable DPC for all Root Ports and Downstream Ports during PCIe device table creation to avoid unintended error signaling.
  • Update Exerciser test e024 to call the new API for disabling DPC instead of manually clearing control register bits.
  • Update relevant headers and extend copyright year to 2026.
  • Fixes Enhance PCIe Test Rule PCI_IN_19 to consider the DPC #192

Change-Id: I8450efdc15d582bdbbddc90a8c885991613039e5

- Introduce `val_pcie_enable_dpc()` and `val_pcie_disable_dpc()` helper
  functions to manage DPC trigger enable bits in the DPC capability structure.
- Use these APIs to disable DPC for all Root Ports and Downstream Ports
  during PCIe device table creation to avoid unintended error signaling.
- Update Exerciser test e024 to call the new API for disabling DPC instead
  of manually clearing control register bits.
- Update relevant headers and extend copyright year to 2026.
- Fixes ARM-software#192

Change-Id: I8450efdc15d582bdbbddc90a8c885991613039e5
@prashymh prashymh merged commit 1ebd73c into ARM-software:main Jan 19, 2026
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