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STM32F4 warning compilation
[-Wparentheses-equality]
1 parent 89f554f commit 09a58b5

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5 files changed

+24
-24
lines changed

5 files changed

+24
-24
lines changed

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1369,7 +1369,7 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf
13691369
/* Enable the TSVREFE channel*/
13701370
tmpADC_Common->CCR |= ADC_CCR_TSVREFE;
13711371

1372-
if((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
1372+
if(sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
13731373
{
13741374
/* Delay for temperature sensor stabilization time */
13751375
/* Compute number of CPU cycles to wait for */

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_flash_ex.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1290,11 +1290,11 @@ static uint8_t FLASH_OB_GetRDP(void)
12901290
{
12911291
uint8_t readstatus = OB_RDP_LEVEL_0;
12921292

1293-
if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
1293+
if(*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2)
12941294
{
12951295
readstatus = OB_RDP_LEVEL_2;
12961296
}
1297-
else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1))
1297+
else if(*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1)
12981298
{
12991299
readstatus = OB_RDP_LEVEL_1;
13001300
}

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_hcd.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -344,7 +344,7 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
344344
{
345345
/* MBED */
346346
if ((hhcd->hc[ch_num].ep_is_in != direction)) {
347-
if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL)){
347+
if (hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL){
348348
/* reconfigure the endpoint !!! from tx -> rx, and rx ->tx */
349349
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
350350
if (direction)

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_tim.c

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -396,11 +396,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
396396
/* Check the parameters */
397397
assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
398398

399-
if((htim->State == HAL_TIM_STATE_BUSY))
399+
if(htim->State == HAL_TIM_STATE_BUSY)
400400
{
401401
return HAL_BUSY;
402402
}
403-
else if((htim->State == HAL_TIM_STATE_READY))
403+
else if(htim->State == HAL_TIM_STATE_READY)
404404
{
405405
if((pData == 0U) && (Length > 0))
406406
{
@@ -795,11 +795,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
795795
/* Check the parameters */
796796
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
797797

798-
if((htim->State == HAL_TIM_STATE_BUSY))
798+
if(htim->State == HAL_TIM_STATE_BUSY)
799799
{
800800
return HAL_BUSY;
801801
}
802-
else if((htim->State == HAL_TIM_STATE_READY))
802+
else if(htim->State == HAL_TIM_STATE_READY)
803803
{
804804
if(((uint32_t)pData == 0U) && (Length > 0))
805805
{
@@ -1310,11 +1310,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
13101310
/* Check the parameters */
13111311
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
13121312

1313-
if((htim->State == HAL_TIM_STATE_BUSY))
1313+
if(htim->State == HAL_TIM_STATE_BUSY)
13141314
{
13151315
return HAL_BUSY;
13161316
}
1317-
else if((htim->State == HAL_TIM_STATE_READY))
1317+
else if(htim->State == HAL_TIM_STATE_READY)
13181318
{
13191319
if(((uint32_t)pData == 0U) && (Length > 0))
13201320
{
@@ -1798,11 +1798,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
17981798
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
17991799
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
18001800

1801-
if((htim->State == HAL_TIM_STATE_BUSY))
1801+
if(htim->State == HAL_TIM_STATE_BUSY)
18021802
{
18031803
return HAL_BUSY;
18041804
}
1805-
else if((htim->State == HAL_TIM_STATE_READY))
1805+
else if(htim->State == HAL_TIM_STATE_READY)
18061806
{
18071807
if((pData == 0U) && (Length > 0))
18081808
{
@@ -2630,11 +2630,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
26302630
/* Check the parameters */
26312631
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
26322632

2633-
if((htim->State == HAL_TIM_STATE_BUSY))
2633+
if(htim->State == HAL_TIM_STATE_BUSY)
26342634
{
26352635
return HAL_BUSY;
26362636
}
2637-
else if((htim->State == HAL_TIM_STATE_READY))
2637+
else if(htim->State == HAL_TIM_STATE_READY)
26382638
{
26392639
if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0))
26402640
{
@@ -3383,11 +3383,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
33833383
assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
33843384
assert_param(IS_TIM_DMA_LENGTH(BurstLength));
33853385

3386-
if((htim->State == HAL_TIM_STATE_BUSY))
3386+
if(htim->State == HAL_TIM_STATE_BUSY)
33873387
{
33883388
return HAL_BUSY;
33893389
}
3390-
else if((htim->State == HAL_TIM_STATE_READY))
3390+
else if(htim->State == HAL_TIM_STATE_READY)
33913391
{
33923392
if((BurstBuffer == 0U) && (BurstLength > 0U))
33933393
{
@@ -3608,11 +3608,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
36083608
assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
36093609
assert_param(IS_TIM_DMA_LENGTH(BurstLength));
36103610

3611-
if((htim->State == HAL_TIM_STATE_BUSY))
3611+
if(htim->State == HAL_TIM_STATE_BUSY)
36123612
{
36133613
return HAL_BUSY;
36143614
}
3615-
else if((htim->State == HAL_TIM_STATE_READY))
3615+
else if(htim->State == HAL_TIM_STATE_READY)
36163616
{
36173617
if((BurstBuffer == 0U) && (BurstLength > 0U))
36183618
{

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_tim_ex.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -386,11 +386,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
386386
/* Check the parameters */
387387
assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
388388

389-
if((htim->State == HAL_TIM_STATE_BUSY))
389+
if(htim->State == HAL_TIM_STATE_BUSY)
390390
{
391391
return HAL_BUSY;
392392
}
393-
else if((htim->State == HAL_TIM_STATE_READY))
393+
else if(htim->State == HAL_TIM_STATE_READY)
394394
{
395395
if(((uint32_t)pData == 0U) && (Length > 0))
396396
{
@@ -688,11 +688,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
688688
/* Check the parameters */
689689
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
690690

691-
if((htim->State == HAL_TIM_STATE_BUSY))
691+
if(htim->State == HAL_TIM_STATE_BUSY)
692692
{
693693
return HAL_BUSY;
694694
}
695-
else if((htim->State == HAL_TIM_STATE_READY))
695+
else if(htim->State == HAL_TIM_STATE_READY)
696696
{
697697
if(((uint32_t)pData == 0U) && (Length > 0))
698698
{
@@ -1100,11 +1100,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
11001100
/* Check the parameters */
11011101
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
11021102

1103-
if((htim->State == HAL_TIM_STATE_BUSY))
1103+
if(htim->State == HAL_TIM_STATE_BUSY)
11041104
{
11051105
return HAL_BUSY;
11061106
}
1107-
else if((htim->State == HAL_TIM_STATE_READY))
1107+
else if(htim->State == HAL_TIM_STATE_READY)
11081108
{
11091109
if(((uint32_t)pData == 0U) && (Length > 0))
11101110
{

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