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lines changed Original file line number Diff line number Diff line change @@ -89,8 +89,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
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RCC_OscInitTypeDef RCC_OscInitStruct = {0 };
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0 };
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- /* Supply configuration update enable */
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- HAL_PWREx_ConfigSupply (PWR_LDO_SUPPLY );
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/* Configure the main internal regulator output voltage */
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__HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE1 );
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@@ -160,8 +158,6 @@ uint8_t SetSysClock_PLL_HSI(void)
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RCC_ClkInitTypeDef RCC_ClkInitStruct ;
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RCC_OscInitTypeDef RCC_OscInitStruct ;
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- /*!< Supply configuration update enable */
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- HAL_PWREx_ConfigSupply (PWR_LDO_SUPPLY );
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/* Configure the main internal regulator output voltage */
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__HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE1 );
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while (!__HAL_PWR_GET_FLAG (PWR_FLAG_VOSRDY )) {}
Original file line number Diff line number Diff line change @@ -89,8 +89,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
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RCC_OscInitTypeDef RCC_OscInitStruct = {0 };
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0 };
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- /* Supply configuration update enable */
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- HAL_PWREx_ConfigSupply (PWR_LDO_SUPPLY );
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/* Configure the main internal regulator output voltage */
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__HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE1 );
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@@ -163,8 +161,6 @@ uint8_t SetSysClock_PLL_HSI(void)
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RCC_ClkInitTypeDef RCC_ClkInitStruct ;
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RCC_OscInitTypeDef RCC_OscInitStruct ;
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- /*!< Supply configuration update enable */
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- HAL_PWREx_ConfigSupply (PWR_LDO_SUPPLY );
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/* Configure the main internal regulator output voltage */
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__HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE1 );
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while (!__HAL_PWR_GET_FLAG (PWR_FLAG_VOSRDY )) {}
Original file line number Diff line number Diff line change @@ -88,8 +88,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
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RCC_OscInitTypeDef RCC_OscInitStruct = {0 };
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0 };
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- /* Supply configuration update enable */
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- HAL_PWREx_ConfigSupply (PWR_DIRECT_SMPS_SUPPLY );
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/* Configure the main internal regulator output voltage */
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__HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE1 );
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@@ -165,8 +163,6 @@ uint8_t SetSysClock_PLL_HSI(void)
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RCC_ClkInitTypeDef RCC_ClkInitStruct ;
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RCC_OscInitTypeDef RCC_OscInitStruct ;
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- /* Supply configuration update enable */
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- HAL_PWREx_ConfigSupply (PWR_DIRECT_SMPS_SUPPLY );
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/* Configure the main internal regulator output voltage */
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__HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE1 );
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Original file line number Diff line number Diff line change @@ -88,8 +88,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
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RCC_OscInitTypeDef RCC_OscInitStruct = {0 };
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0 };
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- /* Supply configuration update enable */
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- HAL_PWREx_ConfigSupply (PWR_DIRECT_SMPS_SUPPLY );
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/* Configure the main internal regulator output voltage */
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__HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE1 );
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@@ -165,8 +163,6 @@ uint8_t SetSysClock_PLL_HSI(void)
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RCC_ClkInitTypeDef RCC_ClkInitStruct ;
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RCC_OscInitTypeDef RCC_OscInitStruct ;
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- /* Supply configuration update enable */
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- HAL_PWREx_ConfigSupply (PWR_DIRECT_SMPS_SUPPLY );
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/* Configure the main internal regulator output voltage */
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__HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE1 );
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Original file line number Diff line number Diff line change @@ -84,9 +84,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
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RCC_OscInitTypeDef RCC_OscInitStruct = {0 };
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0 };
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- /* Supply configuration update enable */
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- HAL_PWREx_ConfigSupply (PWR_DIRECT_SMPS_SUPPLY );
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-
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/* Configure the main internal regulator output voltage */
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__HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE0 );
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@@ -156,8 +153,6 @@ uint8_t SetSysClock_PLL_HSI(void)
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RCC_ClkInitTypeDef RCC_ClkInitStruct ;
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RCC_OscInitTypeDef RCC_OscInitStruct ;
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- /*!< Supply configuration update enable */
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- HAL_PWREx_ConfigSupply (PWR_LDO_SUPPLY );
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/* Configure the main internal regulator output voltage */
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__HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE1 );
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while (!__HAL_PWR_GET_FLAG (PWR_FLAG_VOSRDY )) {}
Original file line number Diff line number Diff line change @@ -240,6 +240,15 @@ void mbed_sdk_init()
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LSEDriveConfig ();
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}
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#endif
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+
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+ #if defined(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY )
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+ #if IS_PWR_SUPPLY (MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY )
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+ HAL_PWREx_ConfigSupply (MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY );
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+ #else
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+ #error system_power_supply not configured
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+ #endif
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+ #endif
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+
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SetSysClock ();
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SystemCoreClockUpdate ();
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@@ -268,6 +277,14 @@ void mbed_sdk_init()
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}
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#endif
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+ #if defined(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY )
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+ #if IS_PWR_SUPPLY (MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY )
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+ HAL_PWREx_ConfigSupply (MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY );
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+ #else
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+ #error system_power_supply not configured
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+ #endif
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+ #endif
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+
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SetSysClock ();
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SystemCoreClockUpdate ();
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#endif /* DUAL_CORE */
Original file line number Diff line number Diff line change 2722
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"lse_drive_load_level" : {
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"help" : " HSE drive load level RCC_LSEDRIVE_LOW | RCC_LSEDRIVE_MEDIUMLOW | RCC_LSEDRIVE_MEDIUMHIGH | RCC_LSEDRIVE_HIGH" ,
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"value" : " RCC_LSEDRIVE_LOW"
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+ },
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+ "system_power_supply" : {
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+ "expected_value1" : " PWR_LDO_SUPPLY | PWR_DIRECT_SMPS_SUPPLY" ,
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+ "expected_value2" : " PWR_SMPS_1V8_SUPPLIES_LDO | PWR_SMPS_2V5_SUPPLIES_LDO | PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO | PWR_SMPS_2V5_SUPPLIES_EXT_AND_LDO" ,
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+ "expected_value3" : " PWR_SMPS_1V8_SUPPLIES_EXT | PWR_SMPS_2V5_SUPPLIES_EXT | PWR_EXTERNAL_SOURCE_SUPPLY" ,
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+ "value" : " NC"
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}
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},
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"components_add" : [
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],
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"macros_add" : [
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" STM32H743xx"
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- ]
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+ ],
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+ "overrides" : {
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+ "system_power_supply" : " PWR_LDO_SUPPLY"
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+ }
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},
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"NUCLEO_H743ZI2" : {
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"inherits" : [
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],
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"macros_add" : [
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" STM32H745xx"
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- ]
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+ ],
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+ "overrides" : {
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+ "system_power_supply" : " PWR_DIRECT_SMPS_SUPPLY"
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+ }
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},
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"MCU_STM32H745xI_CM4" : {
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"inherits" : [
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],
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"macros_add" : [
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" STM32H747xx"
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- ]
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+ ],
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+ "overrides" : {
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+ "system_power_supply" : " PWR_DIRECT_SMPS_SUPPLY"
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+ }
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},
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"MCU_STM32H747xI_CM7" : {
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"inherits" : [
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],
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"macros_add" : [
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" STM32H7A3xxQ"
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- ]
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+ ],
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+ "overrides" : {
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+ "system_power_supply" : " PWR_DIRECT_SMPS_SUPPLY"
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+ }
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},
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"NUCLEO_H7A3ZI_Q" : {
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"inherits" : [
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