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jeromecoutantadbridge
jeromecoutant
authored and
adbridge
committed
TARGET_STM32F7 astyle
1 parent b6cbec8 commit 7fa433d

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18 files changed

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-401
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18 files changed

+403
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lines changed

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PinNames.h

Lines changed: 50 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -47,27 +47,27 @@ typedef enum {
4747

4848
typedef enum {
4949
PA_0 = 0x00,
50-
PA_0_ALT0 = PA_0|ALT0,
51-
PA_0_ALT1 = PA_0|ALT1,
50+
PA_0_ALT0 = PA_0 | ALT0,
51+
PA_0_ALT1 = PA_0 | ALT1,
5252
PA_1 = 0x01,
53-
PA_1_ALT0 = PA_1|ALT0,
54-
PA_1_ALT1 = PA_1|ALT1,
53+
PA_1_ALT0 = PA_1 | ALT0,
54+
PA_1_ALT1 = PA_1 | ALT1,
5555
PA_2 = 0x02,
56-
PA_2_ALT0 = PA_2|ALT0,
57-
PA_2_ALT1 = PA_2|ALT1,
56+
PA_2_ALT0 = PA_2 | ALT0,
57+
PA_2_ALT1 = PA_2 | ALT1,
5858
PA_3 = 0x03,
59-
PA_3_ALT0 = PA_3|ALT0,
60-
PA_3_ALT1 = PA_3|ALT1,
59+
PA_3_ALT0 = PA_3 | ALT0,
60+
PA_3_ALT1 = PA_3 | ALT1,
6161
PA_4 = 0x04,
62-
PA_4_ALT0 = PA_4|ALT0,
62+
PA_4_ALT0 = PA_4 | ALT0,
6363
PA_5 = 0x05,
64-
PA_5_ALT0 = PA_5|ALT0,
64+
PA_5_ALT0 = PA_5 | ALT0,
6565
PA_6 = 0x06,
66-
PA_6_ALT0 = PA_6|ALT0,
66+
PA_6_ALT0 = PA_6 | ALT0,
6767
PA_7 = 0x07,
68-
PA_7_ALT0 = PA_7|ALT0,
69-
PA_7_ALT1 = PA_7|ALT1,
70-
PA_7_ALT2 = PA_7|ALT2,
68+
PA_7_ALT0 = PA_7 | ALT0,
69+
PA_7_ALT1 = PA_7 | ALT1,
70+
PA_7_ALT2 = PA_7 | ALT2,
7171
PA_8 = 0x08,
7272
PA_9 = 0x09,
7373
PA_10 = 0x0A,
@@ -76,68 +76,68 @@ typedef enum {
7676
PA_13 = 0x0D,
7777
PA_14 = 0x0E,
7878
PA_15 = 0x0F,
79-
PA_15_ALT0 = PA_15|ALT0,
79+
PA_15_ALT0 = PA_15 | ALT0,
8080

8181
PB_0 = 0x10,
82-
PB_0_ALT0 = PB_0|ALT0,
83-
PB_0_ALT1 = PB_0|ALT1,
82+
PB_0_ALT0 = PB_0 | ALT0,
83+
PB_0_ALT1 = PB_0 | ALT1,
8484
PB_1 = 0x11,
85-
PB_1_ALT0 = PB_1|ALT0,
86-
PB_1_ALT1 = PB_1|ALT1,
85+
PB_1_ALT0 = PB_1 | ALT0,
86+
PB_1_ALT1 = PB_1 | ALT1,
8787
PB_2 = 0x12,
8888
PB_3 = 0x13,
89-
PB_3_ALT0 = PB_3|ALT0,
89+
PB_3_ALT0 = PB_3 | ALT0,
9090
PB_4 = 0x14,
91-
PB_4_ALT0 = PB_4|ALT0,
92-
PB_4_ALT1 = PB_4|ALT1,
91+
PB_4_ALT0 = PB_4 | ALT0,
92+
PB_4_ALT1 = PB_4 | ALT1,
9393
PB_5 = 0x15,
94-
PB_5_ALT0 = PB_5|ALT0,
95-
PB_5_ALT1 = PB_5|ALT1,
94+
PB_5_ALT0 = PB_5 | ALT0,
95+
PB_5_ALT1 = PB_5 | ALT1,
9696
PB_6 = 0x16,
9797
PB_7 = 0x17,
9898
PB_8 = 0x18,
99-
PB_8_ALT0 = PB_8|ALT0,
99+
PB_8_ALT0 = PB_8 | ALT0,
100100
PB_9 = 0x19,
101-
PB_9_ALT0 = PB_9|ALT0,
101+
PB_9_ALT0 = PB_9 | ALT0,
102102
PB_10 = 0x1A,
103103
PB_11 = 0x1B,
104104
PB_12 = 0x1C,
105105
PB_13 = 0x1D,
106106
PB_14 = 0x1E,
107-
PB_14_ALT0 = PB_14|ALT0,
108-
PB_14_ALT1 = PB_14|ALT1,
107+
PB_14_ALT0 = PB_14 | ALT0,
108+
PB_14_ALT1 = PB_14 | ALT1,
109109
PB_15 = 0x1F,
110-
PB_15_ALT0 = PB_15|ALT0,
111-
PB_15_ALT1 = PB_15|ALT1,
110+
PB_15_ALT0 = PB_15 | ALT0,
111+
PB_15_ALT1 = PB_15 | ALT1,
112112

113113
PC_0 = 0x20,
114-
PC_0_ALT0 = PC_0|ALT0,
115-
PC_0_ALT1 = PC_0|ALT1,
114+
PC_0_ALT0 = PC_0 | ALT0,
115+
PC_0_ALT1 = PC_0 | ALT1,
116116
PC_1 = 0x21,
117-
PC_1_ALT0 = PC_1|ALT0,
118-
PC_1_ALT1 = PC_1|ALT1,
117+
PC_1_ALT0 = PC_1 | ALT0,
118+
PC_1_ALT1 = PC_1 | ALT1,
119119
PC_2 = 0x22,
120-
PC_2_ALT0 = PC_2|ALT0,
121-
PC_2_ALT1 = PC_2|ALT1,
120+
PC_2_ALT0 = PC_2 | ALT0,
121+
PC_2_ALT1 = PC_2 | ALT1,
122122
PC_3 = 0x23,
123-
PC_3_ALT0 = PC_3|ALT0,
124-
PC_3_ALT1 = PC_3|ALT1,
123+
PC_3_ALT0 = PC_3 | ALT0,
124+
PC_3_ALT1 = PC_3 | ALT1,
125125
PC_4 = 0x24,
126-
PC_4_ALT0 = PC_4|ALT0,
126+
PC_4_ALT0 = PC_4 | ALT0,
127127
PC_5 = 0x25,
128-
PC_5_ALT0 = PC_5|ALT0,
128+
PC_5_ALT0 = PC_5 | ALT0,
129129
PC_6 = 0x26,
130-
PC_6_ALT0 = PC_6|ALT0,
130+
PC_6_ALT0 = PC_6 | ALT0,
131131
PC_7 = 0x27,
132-
PC_7_ALT0 = PC_7|ALT0,
132+
PC_7_ALT0 = PC_7 | ALT0,
133133
PC_8 = 0x28,
134-
PC_8_ALT0 = PC_8|ALT0,
134+
PC_8_ALT0 = PC_8 | ALT0,
135135
PC_9 = 0x29,
136-
PC_9_ALT0 = PC_9|ALT0,
136+
PC_9_ALT0 = PC_9 | ALT0,
137137
PC_10 = 0x2A,
138-
PC_10_ALT0 = PC_10|ALT0,
138+
PC_10_ALT0 = PC_10 | ALT0,
139139
PC_11 = 0x2B,
140-
PC_11_ALT0 = PC_11|ALT0,
140+
PC_11_ALT0 = PC_11 | ALT0,
141141
PC_12 = 0x2C,
142142
PC_13 = 0x2D,
143143
PC_14 = 0x2E,
@@ -332,7 +332,7 @@ typedef enum {
332332
SPI_CS = D10,
333333
PWM_OUT = D9,
334334

335-
/**** USB pins ****/
335+
/**** USB pins ****/
336336
USB_OTG_FS_DM = PA_11,
337337
USB_OTG_FS_DP = PA_12,
338338
USB_OTG_FS_ID = PA_10,
@@ -358,7 +358,7 @@ typedef enum {
358358
USB_OTG_HS_ULPI_STP = PC_0,
359359
USB_OTG_HS_VBUS = PB_13,
360360

361-
/**** ETHERNET pins ****/
361+
/**** ETHERNET pins ****/
362362
ETH_COL = PH_3,
363363
ETH_COL_ALT0 = PA_3,
364364
ETH_CRS = PH_2,
@@ -390,13 +390,13 @@ typedef enum {
390390
ETH_TX_EN = PG_11,
391391
ETH_TX_EN_ALT0 = PB_11,
392392

393-
/**** OSCILLATOR pins ****/
393+
/**** OSCILLATOR pins ****/
394394
RCC_OSC32_IN = PC_14,
395395
RCC_OSC32_OUT = PC_15,
396396
RCC_OSC_IN = PH_0,
397397
RCC_OSC_OUT = PH_1,
398398

399-
/**** DEBUG pins ****/
399+
/**** DEBUG pins ****/
400400
SYS_JTCK_SWCLK = PA_14,
401401
SYS_JTDI = PA_15,
402402
SYS_JTDO_SWO = PB_3,

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/system_clock.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,7 @@ void SystemInit(void)
6363
{
6464
/* FPU settings ------------------------------------------------------------*/
6565
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
66-
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
66+
SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10 and CP11 Full Access */
6767
#endif
6868
/* Reset the RCC clock configuration to the default reset state ------------*/
6969
/* Set HSION bit */
@@ -123,7 +123,7 @@ void SetSysClock(void)
123123
if (SetSysClock_PLL_HSI() == 0)
124124
#endif
125125
{
126-
while(1) {
126+
while (1) {
127127
MBED_ASSERT(1);
128128
}
129129
}

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PinNames.h

Lines changed: 50 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -47,27 +47,27 @@ typedef enum {
4747

4848
typedef enum {
4949
PA_0 = 0x00,
50-
PA_0_ALT0 = PA_0|ALT0,
51-
PA_0_ALT1 = PA_0|ALT1,
50+
PA_0_ALT0 = PA_0 | ALT0,
51+
PA_0_ALT1 = PA_0 | ALT1,
5252
PA_1 = 0x01,
53-
PA_1_ALT0 = PA_1|ALT0,
54-
PA_1_ALT1 = PA_1|ALT1,
53+
PA_1_ALT0 = PA_1 | ALT0,
54+
PA_1_ALT1 = PA_1 | ALT1,
5555
PA_2 = 0x02,
56-
PA_2_ALT0 = PA_2|ALT0,
57-
PA_2_ALT1 = PA_2|ALT1,
56+
PA_2_ALT0 = PA_2 | ALT0,
57+
PA_2_ALT1 = PA_2 | ALT1,
5858
PA_3 = 0x03,
59-
PA_3_ALT0 = PA_3|ALT0,
60-
PA_3_ALT1 = PA_3|ALT1,
59+
PA_3_ALT0 = PA_3 | ALT0,
60+
PA_3_ALT1 = PA_3 | ALT1,
6161
PA_4 = 0x04,
62-
PA_4_ALT0 = PA_4|ALT0,
62+
PA_4_ALT0 = PA_4 | ALT0,
6363
PA_5 = 0x05,
64-
PA_5_ALT0 = PA_5|ALT0,
64+
PA_5_ALT0 = PA_5 | ALT0,
6565
PA_6 = 0x06,
66-
PA_6_ALT0 = PA_6|ALT0,
66+
PA_6_ALT0 = PA_6 | ALT0,
6767
PA_7 = 0x07,
68-
PA_7_ALT0 = PA_7|ALT0,
69-
PA_7_ALT1 = PA_7|ALT1,
70-
PA_7_ALT2 = PA_7|ALT2,
68+
PA_7_ALT0 = PA_7 | ALT0,
69+
PA_7_ALT1 = PA_7 | ALT1,
70+
PA_7_ALT2 = PA_7 | ALT2,
7171
PA_8 = 0x08,
7272
PA_9 = 0x09,
7373
PA_10 = 0x0A,
@@ -76,66 +76,66 @@ typedef enum {
7676
PA_13 = 0x0D,
7777
PA_14 = 0x0E,
7878
PA_15 = 0x0F,
79-
PA_15_ALT0 = PA_15|ALT0,
79+
PA_15_ALT0 = PA_15 | ALT0,
8080

8181
PB_0 = 0x10,
82-
PB_0_ALT0 = PB_0|ALT0,
83-
PB_0_ALT1 = PB_0|ALT1,
82+
PB_0_ALT0 = PB_0 | ALT0,
83+
PB_0_ALT1 = PB_0 | ALT1,
8484
PB_1 = 0x11,
85-
PB_1_ALT0 = PB_1|ALT0,
86-
PB_1_ALT1 = PB_1|ALT1,
85+
PB_1_ALT0 = PB_1 | ALT0,
86+
PB_1_ALT1 = PB_1 | ALT1,
8787
PB_2 = 0x12,
8888
PB_3 = 0x13,
89-
PB_3_ALT0 = PB_3|ALT0,
89+
PB_3_ALT0 = PB_3 | ALT0,
9090
PB_4 = 0x14,
91-
PB_4_ALT0 = PB_4|ALT0,
92-
PB_4_ALT1 = PB_4|ALT1,
91+
PB_4_ALT0 = PB_4 | ALT0,
92+
PB_4_ALT1 = PB_4 | ALT1,
9393
PB_5 = 0x15,
94-
PB_5_ALT0 = PB_5|ALT0,
95-
PB_5_ALT1 = PB_5|ALT1,
94+
PB_5_ALT0 = PB_5 | ALT0,
95+
PB_5_ALT1 = PB_5 | ALT1,
9696
PB_6 = 0x16,
9797
PB_7 = 0x17,
9898
PB_8 = 0x18,
99-
PB_8_ALT0 = PB_8|ALT0,
100-
PB_8_ALT1 = PB_8|ALT1,
99+
PB_8_ALT0 = PB_8 | ALT0,
100+
PB_8_ALT1 = PB_8 | ALT1,
101101
PB_9 = 0x19,
102-
PB_9_ALT0 = PB_9|ALT0,
103-
PB_9_ALT1 = PB_9|ALT1,
102+
PB_9_ALT0 = PB_9 | ALT0,
103+
PB_9_ALT1 = PB_9 | ALT1,
104104
PB_10 = 0x1A,
105105
PB_11 = 0x1B,
106106
PB_12 = 0x1C,
107107
PB_13 = 0x1D,
108108
PB_14 = 0x1E,
109-
PB_14_ALT0 = PB_14|ALT0,
110-
PB_14_ALT1 = PB_14|ALT1,
109+
PB_14_ALT0 = PB_14 | ALT0,
110+
PB_14_ALT1 = PB_14 | ALT1,
111111
PB_15 = 0x1F,
112-
PB_15_ALT0 = PB_15|ALT0,
113-
PB_15_ALT1 = PB_15|ALT1,
112+
PB_15_ALT0 = PB_15 | ALT0,
113+
PB_15_ALT1 = PB_15 | ALT1,
114114

115115
PC_0 = 0x20,
116-
PC_0_ALT0 = PC_0|ALT0,
117-
PC_0_ALT1 = PC_0|ALT1,
116+
PC_0_ALT0 = PC_0 | ALT0,
117+
PC_0_ALT1 = PC_0 | ALT1,
118118
PC_1 = 0x21,
119-
PC_1_ALT0 = PC_1|ALT0,
120-
PC_1_ALT1 = PC_1|ALT1,
119+
PC_1_ALT0 = PC_1 | ALT0,
120+
PC_1_ALT1 = PC_1 | ALT1,
121121
PC_2 = 0x22,
122-
PC_2_ALT0 = PC_2|ALT0,
123-
PC_2_ALT1 = PC_2|ALT1,
122+
PC_2_ALT0 = PC_2 | ALT0,
123+
PC_2_ALT1 = PC_2 | ALT1,
124124
PC_3 = 0x23,
125-
PC_3_ALT0 = PC_3|ALT0,
126-
PC_3_ALT1 = PC_3|ALT1,
125+
PC_3_ALT0 = PC_3 | ALT0,
126+
PC_3_ALT1 = PC_3 | ALT1,
127127
PC_4 = 0x24,
128-
PC_4_ALT0 = PC_4|ALT0,
128+
PC_4_ALT0 = PC_4 | ALT0,
129129
PC_5 = 0x25,
130-
PC_5_ALT0 = PC_5|ALT0,
130+
PC_5_ALT0 = PC_5 | ALT0,
131131
PC_6 = 0x26,
132-
PC_6_ALT0 = PC_6|ALT0,
132+
PC_6_ALT0 = PC_6 | ALT0,
133133
PC_7 = 0x27,
134-
PC_7_ALT0 = PC_7|ALT0,
134+
PC_7_ALT0 = PC_7 | ALT0,
135135
PC_8 = 0x28,
136-
PC_8_ALT0 = PC_8|ALT0,
136+
PC_8_ALT0 = PC_8 | ALT0,
137137
PC_9 = 0x29,
138-
PC_9_ALT0 = PC_9|ALT0,
138+
PC_9_ALT0 = PC_9 | ALT0,
139139
PC_10 = 0x2A,
140140
PC_11 = 0x2B,
141141
PC_12 = 0x2C,
@@ -275,7 +275,7 @@ typedef enum {
275275
SPI_CS = D10,
276276
PWM_OUT = D9,
277277

278-
/**** USB pins ****/
278+
/**** USB pins ****/
279279
USB_OTG_FS_DM = PA_11,
280280
USB_OTG_FS_DP = PA_12,
281281
USB_OTG_FS_ID = PA_10,
@@ -299,7 +299,7 @@ typedef enum {
299299
USB_OTG_HS_ULPI_STP = PC_0,
300300
USB_OTG_HS_VBUS = PB_13,
301301

302-
/**** ETHERNET pins ****/
302+
/**** ETHERNET pins ****/
303303
ETH_COL = PA_3,
304304
ETH_CRS = PA_0,
305305
ETH_CRS_DV = PA_7,
@@ -326,13 +326,13 @@ typedef enum {
326326
ETH_TX_EN = PB_11,
327327
ETH_TX_EN_ALT0 = PG_11,
328328

329-
/**** OSCILLATOR pins ****/
329+
/**** OSCILLATOR pins ****/
330330
RCC_OSC32_IN = PC_14,
331331
RCC_OSC32_OUT = PC_15,
332332
RCC_OSC_IN = PH_0,
333333
RCC_OSC_OUT = PH_1,
334334

335-
/**** DEBUG pins ****/
335+
/**** DEBUG pins ****/
336336
SYS_JTCK_SWCLK = PA_14,
337337
SYS_JTDI = PA_15,
338338
SYS_JTDO_SWO = PB_3,

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/system_clock.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@ void SystemInit(void)
6464
{
6565
/* FPU settings ------------------------------------------------------------*/
6666
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
67-
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
67+
SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10 and CP11 Full Access */
6868
#endif
6969
/* Reset the RCC clock configuration to the default reset state ------------*/
7070
/* Set HSION bit */
@@ -124,7 +124,7 @@ void SetSysClock(void)
124124
if (SetSysClock_PLL_HSI() == 0)
125125
#endif
126126
{
127-
while(1) {
127+
while (1) {
128128
MBED_ASSERT(1);
129129
}
130130
}

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